AS4C8M32S Search Results

AS4C4M32S-6BIN

Abstract: AS4C4M32S
Contextual Info: AS4C4M32S Revision History AS4C4M32S- 90 Ball TFBGA PACKAGE Revision Rev 1.0 Rev 2.0 Rev 3.0 Details Preliminary datasheet Added 166MHz option -6 clock cycle time Typing error page 1 – change to header of Key Specificatons from AS4C8M32S to AS4C4M32S Typing error Frequency in Ordering information

Contextual Info: AS4C8M32S 8M x 32 bit Synchronous DRAM SDRAM Confidential Advanced (Rev. 1.1, Feb. /2013) Features Overview •      Fast access time from clock: 5/5.4 ns Fast clock rate: 166/133MHz Fully synchronous operation Internal pipelined architecture

AS4C8M32S-7BCN

Abstract: AS4C8M32S
Contextual Info: AS4C8M32S Revision History AS4C8M32S- 90 Ball TFBGA PACKAGE Revision Rev 1.0 Rev 1.1 Rev 2.0 Details Preliminary datasheet Added 166MHz option -6 clock cycle time Typing error page 1 – fast clock rate error 133MHz should be 143MHz Typing error - Frequency in Table 2. Ordering information

Contextual Info: AS4C8M32S 8M x 32 bit Synchronous DRAM SDRAM Confidential Advanced (Rev. 1.1, Feb. /2013) Features Overview Fast access time from clock: 5/5.4 ns Fast clock rate: 166/133MHz Fully synchronous operation Internal pipelined architecture 2M word x 32-bit x 4-bank

Contextual Info: AS4C4M32S 4M x 32 bit Synchronous DRAM SDRAM Confidential Advanced (Rev. 2.0, Feb. /2013) Features •              Overview The 128Mb AS4C4M32S SDRAM is a highspeed CMOS synchronous DRAM containing 128 Mbits. It is internally configured as a quad 1M x 32