AMD SUPERNET Search Results

NX686

Abstract: Am29050 Am29040 AM29005 AMD AM29050
Contextual Info: AMD - Trademark Information AMD Trademarks AMD, the AMD logo, and combinations thereof are trademarks of Advanced Micro Devices, Inc. GENERAL NOTICE: The following are marks of Advanced Micro Devices, Inc. This list is not intended to be an exhaustive or comprehensive list of all AMD marks. Other product names used in this web site are for

PQR168

Abstract: Am79C830A CGX169 4570 pin out diagram LG plc plc lg FDD11994 PQR120 15502C
Contextual Info: AMD a Am 79C830A FORMAC Plus CGX169 169-Lead Pin Grid Array Without H eat Sink measured in inches Physical Dimensions 6-3 i l AMD Am 79C830A FORMAC Plus PQR168 168-Pin Plastic Quad FlatPack (Trimmed and Formed) (measured in inches) TOP VIEW 6-4 The SUPERNET 2 Family for FDD11994 Data Book

lm2311

Abstract: 2N3546 PN2369 EQUIVALENT 2N3639 4N32 pinout "1N6263" AM79865 1N6263 2N2369 C6 FTP
Contextual Info: Advanced Micro Devices FDDI on Copper with AMD PHY Components by Eugen Gershon Publication # 15923 Rev. Amendment A /0 Issue Date 6/91  1991 Advanced Micro Devices, Inc. FDDI on Copper with AMD PHY Components by Eugen Gershon and pin-out compatible with the MIC device found on

AM79865

Abstract: AM79866A
Contextual Info: AMD£I Am79865/Am79866A Physical Data Transmitter/Physical Data Receiver DISTINCTIVE CHARACTERISTICS • Fully compliant with ANSI X3T9.5 FDDI, TP-FDDI, and 100BASE-TX/FX PHY standards ■ The on-chip Phase-Locked-Loop PLL only requires an external frequency reference

Contextual Info: FINAL AMD£I Am79865/Am79866A Physical DataTransmitter/Physical Data Receiver DISTINCTIVE CHARACTERISTICS • Fully compliant with ANSI X3T9.5 FDDI, TP-FDDI, and 100BASE-TX/FX PHY standards ■ The on-chip Phase-Locked-Loop PLL only requires an external frequency reference

PCM sbec

Abstract: SUPERNET 2 Family Am79C830A TS5430 SUPERNET AM79C850 BD15 PQJ208 PQR208 NP548
Contextual Info: PRELIMINARY Advanced Micro Devices Am79C850 SUPERNET 3 DISTINCTIVE CHARACTERISTICS • Compliant with the ANSI X3T9.5/ISO 9314 specification — 100 Mbps data rate — Timed token-passing protocol — Ring topology ■ Complete memory management — Supports 256K bytes of local frame buffer

SUPERNET

Contextual Info: P R E L IM IN A R Y Advanced Micro Devices Am79C850 SUPERNET 3 DISTINCTIVE CHARACTERISTICS • Compliant with the ANSI X3T9.5/ISO 9314 specification ■ ANSI-com pliant TP-PM D Stream Cipher Scram bling/Descram bling — 100 Mbps data rate ■ Full duplex operation: 200 Mbps continuous

Contextual Info: a PRELIMINARY FASTcard 2 FDDI PC/AT-Based SUPERNET 2 Technology Card FASTcard Dual Attachment Concentrator Board Set and Software Package Advanced Micro Devices DISTINCTIVE CHARACTERISTICS • IBM PC-AT or compatible plug-ln board to Implement an FDDI station

SUPERNET

Abstract: Base Station Drivers AMD PLC Am79C830A 32kx8 SRAM
Contextual Info: PRELIMINARY FASTcardTM 2 FDDI PC/AT-Based SUPERNET 2 Technology Card FASTcard Dual Attachment Concentrator Board Set and Software Package Advanced Micro Devices DISTINCTIVE CHARACTERISTICS • IBM PC-AT or compatible plug-in board to implement an FDDI station

Contextual Info: a Preliminary Advanced Micro Devices Am79865/Am79866 Physical Data Transmitter/Physical Data Receiver DISTINCTIVE CHARACTERISTICS • ■ ■ ■ Parallel Input to the PDT Is a 5-bit encoded NRZ symbol clocked by LSCLK Parallel output from the PDR is a 5-bit

5PDT

Abstract: AM79866 79866 AM79865
Contextual Info: H Preliminary Am79865/Am79866 Advanced Micro Devices Physical Data Transmitter/Physical Data Receiver DISTINCTIVE CHARACTERISTICS • ■ ■ ■ Parallel Input to the PDT Is a 5-bit encoded NRZ symbol clocked by LSCLK Parallel output from the PDR Is a 5-bit

Contextual Info: H Preliminary Advanced Micro Devices Am79865/Am79866 Physical Data Transmitter/Physical Data Receiver DISTINCTIVE CHARACTERISTICS • ■ ■ ■ Parallel Input to the PDT Is a 5-bit encoded NRZ symbol clocked by LSCLK Parallel output from the PDR Is a 5-bit

Contextual Info: a P R E L IM IN A R Y Advanced Micro Devices Am79865/Am79866A Physical Data Transmitter/Physical Data Receiver DISTINCTIVE CHARACTERISTICS • Parallel Input to the PDT is a 5-blt encoded NRZ symbol clocked by LSCLK 125 MBaud 100 Mbps serial link data rate

Contextual Info: P R E L IM IN A R Y Advanced Micro Devices Am79C830 FORMAC Plus DISTINCTIVE CHARACTERISTICS • Implements the FDDI Media Access Control MAC layer protocol for ISO standard 9314-2 ■ Buffer-memory clock frequency range: 12.5 MHz to 25 MHz ■ Full-duplex operation: 200 Mbps continuous

T-75-49

Abstract: AM79865 AMD Supernet 2 AM79866JC MAE 411
Contextual Info: ADV MICRO T E L E C O M MAE D □ 257527 0 0 3 0 ^ 2 □ • AMD3 Preliminary a Advanced Micro Devices Am79865/Am79866 Physical Data Transmitter/Physical Data Receiver DISTINCTIVE CHARACTERISTICS ■ ■ ■ ■ Parallel Input to the PDT Is a 5-bit encoded

NP920

Abstract: SUPERNET 2 Family pcms AM79C864A NP10 AMD Supernet am79864a AMD Supernet 2 NP5-12 NP1223
Contextual Info: PRELIMINARY Am79C864A Physical Layer Controller With Scrambler PLC-S Advanced Micro Devices DISTINCTIVE CHARACTERISTICS • Implements FDDI PHY layer protocol for ISO standard (FDDI) 9314-1 ■ Line state detection ■ Implements ANSI standard Stream Cipher

Contextual Info: a PRELIMINARY Advanced Micro Devices Am79C830 FORMAC Plus DISTINCTIVE CHARACTERISTICS Implements the FDDI Media Access Control MAC layer protocol for ISO standard 9314-2 • ■ Supports transmit linked-list addressing ■ Buffer-memory clock frequency range:

Am79C83

Contextual Info: Am79C83 Fiber Optic Ring Media Access Controller FORMAC Advanced Micro Devices DISTINCTIVE CHARACTERISTICS • Implements Media Access Control (MAC) layer protocol for the ANSI X3T9.5 standard (Fiber Distributed Data Interface, FDDI) ■ Error detection capability

nrzi circuit diagram MLT-3

Abstract: line code MLT synchronization PE68502 nrzi PLC siemens LOGO mlt resistor AM79865 Diode RJ 4B serial/4b/5b encoder SUPERNET 2 Family
Contextual Info: Advanced Micro Devices Implementing FDDI Over Copper; The ANSI X3T9.5 Standard Application Note The American National Standards Institute ANSI X3T9 Committee is developing the standard for the implementation of FDDI links (PMD layer) on copper-shielded and unshielded twisted-pair cables.

footprint jedec MS-026 TQFP

Abstract: footprint jedec MS-026 LQFP JEDEC TRAY ssop footprint jedec MS-026 LQFP 64 pin footprint jedec MS-026 TQFP 44 MS-026 BED BGA package tray 40 x 40 AMD Package moisture MO-069 footprint jedec MS-026 TQFP 144
Contextual Info: u Chapter 2 Package Design CHAPTER 2 PACKAGE DESIGN Surface-Mount Array Packages Column Grid Array Packages Surface-Mount Leaded Packages Thru-Hole Packages Packages and Packing Publication Revision A 3/1/03 2-1 u Chapter 2 Package Design SURFACE-MOUNT ARRAY PACKAGES

Contextual Info: a P R E L IM IN A R Y Advanced Micro Devices Am79C830A FORMAC Plus DISTINCTIVE CHARACTERISTICS • Implements the FDDI Media Access Control MAC layer protocol for ISO standard 9314-2 ■ Pointers to claim and beacon frames ■ Buffer-memory clock frequency range:

JRC 45600

Abstract: YD 803 SGS 45600 JRC TDA 7277 TDA 5072 krp power source sps 6360 2904 JRC Sony SHA T90 SA philips HFE 4541
Contextual Info: I SEMICON INDEXES Contents and Introduction Manufacturers' Information V O LU M E 3 INTERNATIONAL INTEGRATED CIRCUITS INDEX 15th EDITION 1997 Numerical Listing of Integrated Circuits Substitution Guide U D C 621.382.3 Diagram s THE S E M IC O N INTERNATIONAL INDEXES

OE57S

Abstract: BD847 BDP282 Am79C82 AMD AM3 Processor Functional DD30 NP10 CC03X amd am3 pin latches BD23
Contextual Info: ADV MI CR O T E L E C O M 4ÖE D 0257527 0D30Ö05 fl • AMD3 P R E L IM IN A R Y Advanced Micro Devices Am79C830 FORMAC Plus DISTINCTIVE CHARACTERISTICS ■ Implements the FDDI Media Access Control (MAC) layer protocol for ISO standard 9314-2 Pointers to claim and beacon frames

AM79C83B

Contextual Info: a PR E LIM IN A R Y Advanced Micro Devices Am79C830A FORMAC Plus DISTINCTIVE CHARACTERISTICS • Implements the FDDI Media Access Control MAC layer protocol for ISO standard 9314-2 ■ Pointers to claim and beacon frames ■ Buffer-memory clock frequency range: