ALLOCATOR Search Results

SPRU217

Abstract: SPRA069 TMS320C80 Y-delta connection with timer on delay texas 4mb dram SPRA066 SPRU178
Contextual Info: TMS320C8x Register Allocator and Code Compactor Release 2.00 User’s Guide 1997 Digital Signal Processing Solutions Printed in U.S.A., February 1997 D418022–9741 revision * * SPRU217 TMS320C8x Register Allocator and Code Compactor User’s Guide Release 2.00

GOERTZEL ALGORITHM SOURCE CODE

Abstract: SPRA069 Position Estimation TMS320C80 SPRA066 SPRS023
Contextual Info: TMS320C8x Register Allocator and Code Compactor User’s Guide Release 2.00 Literature Number: SPRU217 Manufacturing Part Number: D418022–9741 revision * February 1997 Printed on Recycled Paper IMPORTANT NOTICE Texas Instruments TI reserves the right to make changes to its products or to discontinue any

MT90812AL1

Abstract: TGE-5 EB32
Contextual Info: MT90812 Integrated Digital Switch IDX Advance Information Mar 2011 Features • • • • • • • • • • • • • • • • • • MT90812AP MT90812AL MT90812APR MT90812AP1 MT90812AL1 MT90812APR1 192 channel x 192 channel non-blocking switching

SLAS554F

Abstract: SLAS554 5E002 01a26 Nearson SLAU259 MAX812 lcd 1x16 green OOK ASK receiver 433mhz 433MHz Active RFID tag
Contextual Info: ECCN 5E002 TSPA - Technology / Software Publicly Available CC430F613x CC430F612x CC430F513x SLAS554F – MAY 2009 – REVISED DECEMBER 2011 www.ti.com MSP430 SoC with RF Core FEATURES 1 • 23 • • • True System-on-Chip SoC for Low-Power Wireless Communication Applications

cypress flash 370

Abstract: logic block diagram of cypress flash 370 device 22v10 CY7C375 FLASH370 o112i cypress flash 370 CPLD cypress flash 370 device technology
Contextual Info: fax id: 6130 For new designs see CY7C375i CY7C375 UltraLogic 128-Macrocell Flash CPLD Features Functional Description • 28 macrocells in eight logic blocks • 28 I/O pins • 6 dedicated inputs including 4 clock pins • Bus Hold capabilities on all I/Os and dedicated inputs

XC9572

Abstract: XC9572-10PC44C xc9572-15PQ100 15PC44I xc9572 data sheet XC9572-7PC44C PC44 PC84 xc9572-10pq100c XC9572-15PC84C
Contextual Info: XC9572 In-System Programmable CPLD R DS065 v4.2 April 15, 2005 5 Product Specification Features Description • • 7.5 ns pin-to-pin logic delays on all pins fCNT to 125 MHz • • • 72 macrocells with 1,600 usable gates Up to 72 user I/O pins 5V in-system programmable

4032V

Abstract: DS1017 LC4032V-10TN48I 4512c application LC4256V-75TN176C marking 17Z 4000B AEC-Q100 DS1020 22z2
Contextual Info: ispMACH 4000V/B/C/Z Family 3.3V/2.5V/1.8V In-System Programmable SuperFAST TM High Density PLDs Coolest Power May 2009 C Features Data Sheet DS1020 TM • Broad Device Offering • Multiple temperature range support – Commercial: 0 to 90°C junction Tj

PSD813F2-90U

Abstract: HATTELAND intel 80196 microcontroller WSI PSD 813 WSI PSD813F ZPSD813F1-90J 80C251 PSD813F PSD813F1 PSD813F2
Contextual Info: PSD813F Family PSD813F ZPSD813F ZPSD813FV Flash In-System-Programmable Microcontroller Peripherals July, 2000 Preliminary 47280 Kato Road, Fremont, California 94538 Tel: 510-656-5400 Fax: 510-657-8495 800-TEAM-WSI 800-832-6974 Web Site: http://www.waferscale.com

MACH445

Abstract: PAL22V10
Contextual Info: FINAL COM’L: -12/15/20 MACH445-12/15/20 Lattice Semiconductor High-Density EE CMOS Programmable Logic DISTINCTIVE CHARACTERISTICS • 100-pin version of the MACH435 in PQFP ■ Up to 20 product terms per function, with XOR ■ 5 V, in-circuit programmable

MACH130-20

Abstract: MACH130 MACH230 PAL22V10 PAL26V16
Contextual Info: FINAL COM’L: -15/20 IND: -18/24 MACH130-15/20 Lattice Semiconductor High-Density EE CMOS Programmable Logic DISTINCTIVE CHARACTERISTICS 84 Pins 64 Outputs 64 Macrocells 64 Flip-flops; 4 clock choices 15 ns tPD Commercial 18 ns tPD Industrial 4 “PAL26V16” Blocks

Contextual Info: CY7C371i UltraLogic 32-Macrocell Flash CPLD Features signed to bring the ease of use and high performance of the 22V10, as well as PCI Local Bus Specification support, to high-density CPLDs. • • • • 32 macrocells in two logic blocks 32 I/O pins

XC95144XL-10TQ144I

Abstract: XC95144XL-10TQG100C XAPP114 XAPP427 XC9500XL XC95144 XC95144XL XC95144XL-5-CS144 XC95144XL-5TQ100 xc95144xl tq144
Contextual Info: XC95144XL High Performance CPLD R DS056 v1.8 July 15, 2005 5 Product Specification Features Power Estimation • • • • Power dissipation in CPLDs can vary substantially depending on the system frequency, design application and output loading. To help reduce power dissipation, each macrocell

PAL26V12

Abstract: MACH120 MACH220 PAL22V10
Contextual Info: FINAL COM’L: -10/12/15/20 IND: -14/18/24 MACH220-10/12/15/20 Lattice Semiconductor High-Density EE CMOS Programmable Logic DISTINCTIVE CHARACTERISTICS 68 Pins 48 Outputs 96 Macrocells 96 Flip-flops; 4 clock choices 10 ns tPD 8 “PAL26V12” blocks with buried macrocells

84 PIN CERAMIC QUAD FLAT PACK

Abstract: 2600 corning cypress flash 370 7C374-100 7C374-66 7C374L-66 CY7C373 CY7C374 FLASH370 CY7C374-83GC
Contextual Info: fax id: 6129 —— — - = : ! W Æ j r I 1 CY7C374 17 Q Q IT C O O UltraLogic 128-Macrocell Flash CPLD Features The logic blocks in the FLASH370 architecture are connected with an extremely fast and predictable routing resource— the Programmable Interconnect Matrix PIM . The PIM brings flex­

PAL26V16

Abstract: teradyne lasar
Contextual Info: FINAL COM’L: -15/20 IND: -18/24 Z I Advanced Micro Devices M A C H 1 3 0 - 1 5 /2 0 High-Density EE CMOS Programmable Logic DISTINCTIVE CHARACTERISTICS • 84 Pins ■ 64 Outputs ■ 64 Macrocells ■ 64 Flip-flops; 4 clock choices ■ 15 ns tpD Commercial

23TI

Abstract: UPS3200 TQFP52 TQFP80 uPSD3253B uPSD3253BV uPSD3254A uPSD3254BV uPSD325X BV-24
Contextual Info: uPSD3254A, uPSD3254BV uPSD3253B, uPSD3253BV Flash Programmable System Devices with 8032 Microcontroller Core FEATURES SUMMARY • The uPSD325X devices combine a Flash PSD architecture with an 8032 microcontroller core. The uPSD325X devices of Flash PSDs feature dual banks of Flash memory, SRAM,

mach 1 to 5 from amd

Abstract: mach 3 family amd mach 3 amd mach 3 mach 4 family amd 7466D-1 Simulating MACH Designs mach-355 MACH445 mach 1 to 5 family amd
Contextual Info: Cl CONDENSED Advanced Micro Devices MACH 3 and 4 Device Families High-Density EE CMOS Programmable Logic DISTINCTIVE CHARACTERISTICS • High-performance, high-density electrically-erasable CMOS PLD families ■ Predictable design-independent 12-, 15- and

TMS320DM357

Contextual Info: TMS320DM357 DVEVM v2.05 Getting Started Guide Literature Number: SPRUGH0 December 2008 Printed on Recycled Paper IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries TI reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any

MX 0541

Abstract: mx 0541 b CY7C373
Contextual Info: fax id: 6138 CY7C373Ì CYPRESS UltraLogic 64-Macrocell Flash CPLD Functional Description Features • 64 m a cro cells in fo u r logic blocks The C Y 7 C 3 73i is an In-System R eprogram m able C om plex P rogram m able Logic Device CPLD and is pa rt of the

Contextual Info: – PRODUCT OBSOLETE / UNDER OBSOLESCENCE – k XC9500 In-System Programmable CPLD Family R DS063 v6.0 May 17, 2013 Product Specification Features - Advanced CMOS 5V FastFLASH technology • - Supports parallel programming of multiple XC9500 devices High-performance

527-01

Contextual Info: CodeWarrior Development Studio for Microcontrollers V10.x ColdFire Build Tools Reference Manual Document Number: CWMCUCFCMPREF Rev 10.5, 09/2013 CodeWarrior Development Studio for Microcontrollers V10.x ColdFire Build Tools Reference Manual, Rev. 10.5, 09/2013

hdk POTENTIOMETER

Contextual Info: Freescale Semiconductor Release Notes Document Number: MQXRN Rev. 26, 08/2013 Freescale MQX RTOS 4.0.2 Release Notes PRODUCT: Freescale MQX™ RTOS PRODUCT VERSION: 4.0.2 DESCRIPTION: Freescale MQX™ RTOS, version 4.0.2 RELEASE DATE: August, 2013 2013 Freescale Semiconductor, Inc. All rights reserved.

4032 k14

Abstract: 4512c PX6A10 4256b L5591 a/4032 k14 am 4512C LC45 4064C m6 pt80
Contextual Info: TM ispMACH 4000B/C Family 2.5V/1.8V In-System Programmable SuperFAST TM High Density PLDs December 2001 Data Sheet • Broad Device Offering Features • • • • ■ High Performance • fMAX = 350MHz maximum operating frequency • tPD = 2.5ns propagation delay

PLCC-48 footprint

Abstract: XC95108 XC95144 XC95216 XC95288 XC9536 XC9572 XC9500 XC9500 pinout
Contextual Info: XC9500 In-System Programmable CPLD Family R December 14, 1998 Version 3.0 1* Features Family Overview • The XC9500 CPLD family provides advanced in-system programming and test capabilities for high performance, general purpose logic integration. All devices are in-system