36V18 Search Results

Contextual Info: KXILINX XC95432 In-System Programmable CPLD Jun e 1, 1996 V ersion 1.0 Advance Product Specification Features Description • • • • • The XC95432 is a high-performance CPLD providing advanced in-system programming and test capabilities for general purpose logic integration. It is comprised of twentyfour 36V18 Function Blocks, providing 9,600 usable gates

Contextual Info:  XC95576 In-System Programmable CPLD June 1, 1996 Version 1.0 Advance Product Specification Features Description • • • • • The XC95576 is a high-performance CPLD providing advanced in-system programming and test capabilities for general purpose logic integration. It is comprised of thirtytwo 36V18 Function Blocks, providing 12,800 usable gates

36V18

Contextual Info:  XC95432 In-System Programmable CPLD June 1, 1996 Version 1.0 Advance Product Specification Features Description • • • • • The XC95432 is a high-performance CPLD providing advanced in-system programming and test capabilities for general purpose logic integration. It is comprised of twentyfour 36V18 Function Blocks, providing 9,600 usable gates

Contextual Info: tlX IU N X XC95432 In-System Programmable CPLD January, 1997 Version 1.0 Advanced Product Specification Features Description • • • • • The XC95432 is a high-performance CPLD providing advanced in-system programming and test capabilities for general purpose logic integration. It is comprised of twentyfour 36V18 Function Blocks, providing 9,600 usable gates

XC9572

Abstract: XC9572-10PC44C xc9572-15PQ100 15PC44I xc9572 data sheet XC9572-7PC44C PC44 PC84 xc9572-10pq100c XC9572-15PC84C
Contextual Info: XC9572 In-System Programmable CPLD R DS065 v4.2 April 15, 2005 5 Product Specification Features Description • • 7.5 ns pin-to-pin logic delays on all pins fCNT to 125 MHz • • • 72 macrocells with 1,600 usable gates Up to 72 user I/O pins 5V in-system programmable

Contextual Info: – PRODUCT OBSOLETE / UNDER OBSOLESCENCE – k XC9500 In-System Programmable CPLD Family R DS063 v6.0 May 17, 2013 Product Specification Features - Advanced CMOS 5V FastFLASH technology • - Supports parallel programming of multiple XC9500 devices High-performance

PLCC-48 footprint

Abstract: XC95108 XC95144 XC95216 XC95288 XC9536 XC9572 XC9500 XC9500 pinout
Contextual Info: XC9500 In-System Programmable CPLD Family R December 14, 1998 Version 3.0 1* Features Family Overview • The XC9500 CPLD family provides advanced in-system programming and test capabilities for high performance, general purpose logic integration. All devices are in-system

XC9500

Abstract: XC95108 GSR 10,8
Contextual Info: 1 XC95108 In-System Programmable CPLD  December 4, 1998 Version 3.0 1 1* Product Specification Features Power Management • • 7.5 ns pin-to-pin logic delays on all pins fCNT to 125 MHz • • • 108 macrocells with 2400 usable gates Up to 108 user I/O pins

XC95108

Abstract: XC95108-10PQ160C xc95108-10pqg100i XC95108-20PQG160I TQG100 XC95108-15PC84C PGC84 XC95108-20PQ100I
Contextual Info: – PRODUCT OBSOLETE / UNDER OBSOLESCENCE – XC95108 In-System Programmable CPLD R DS066 v5.0 May 17, 2013 5 Product Specification Features Description • • 7.5 ns pin-to-pin logic delays on all pins fCNT to 125 MHz • • • 108 macrocells with 2,400 usable gates

Contextual Info: flX IU N X XC9536 In-System Programmable CPLD October 29, 1997 Version 2.0 Product Specification Features Power Management 5 ns pin-to-pin logic delays on all pins • • • • • • • • • • • • • fcNT to MHz 36 macrocells with 800 usable gates

XC9572

Abstract: XC9572 Family PC84 PQ100 XC9500 xc9572 tq100
Contextual Info: 1 XC9572 In-System Programmable CPLD  December 4, 1998 Version 3.0 1 1* Product Specification Features Power Management • • 7.5 ns pin-to-pin logic delays on all pins fCNT to 125 MHz • • • 72 macrocells with 1,600 usable gates Up to 72 user I/O pins

XC95288

Contextual Info: flXIUNX XC95288 In-System Programmable CPLD December 4, 1998 Version 3.0 Product Specification Features Power Management • • 15 ns pin-to-pin logic delays on all pins fcN T 95 MHz • • • 288 macrocells with 6,400 usable gates Up to 192 user I/O pins

XC4010-5PG191M

Abstract: XC4005-5PG156M PA44-48U adapter datasheet pa44-48u SDP72 xilinx 1736a 5962-9230503MXC XC4010-5CB196B SDP-UNIV-44 XC4010-5CB196M
Contextual Info: XCELL THE QUARTERLY Issue 19 Fourth Quarter 1995 JOURNAL FOR XILINX PROGRAMMABLE LOGIC USERS GENERALFEATURES R The Programmable Logic CompanySM Inside This Issue: GENERAL Fawcett: 100,000+ Gates . 2 Guest Editorial . 3

471 E25

Abstract: PQ160 XC9500 XC95216
Contextual Info: XC95216 In-System Programmable CPLD  October 28, 1997 Version 2.0 3* Product Specification Features Power Management • • • • • Power dissipation can be reduced in the XC95216 by configuring macrocells to standard or low-power modes of operation. Unused macrocells are turned off to minimize

471 E25

Abstract: XC95216 Family 134-174 PQ160 XC9500 XC95216
Contextual Info: 1 XC95216 In-System Programmable CPLD  August 21, 2001 Version 3.1 1 0* Product Specification Features Power Management • • 10 ns pin-to-pin logic delays on all pins fCNT to 111 MHz • • • 216 macrocells with 4800 usable gates Up to 166 user I/O pins

XC95216-20PQG160I

Abstract: XC95216-15PQ160I 471 E25 XC95216 Family XC95216-10PQ160C XC95216-10PQ160I XC95216-15PQG160C XC95216-15PQG160I XC95216-10PQG160I XC9500
Contextual Info: XC95216 In-System Programmable CPLD R 5 Note: The 352-pin BGA packages are being discontinued for XC95216 devices. You cannot order these packages after May 14, 2008. Xilinx recommends replacing XC95216 in 352-pin BGA packages with XC95288 devices in 352-pin BGA packages in all designs as soon as possible. Recommended replacements are pin compatible, but

XC9536

Abstract: XC9536-6 XC9536-7 XC9500 XC9536-10 XC9536-15 XC9536-5 xc9536 44 pin vqfp
Contextual Info: 9 1 XC9536 In-System Programmable CPLD  December 4, 1998 Version 5.0 1 1* Product Specification Features Power Management • • 5 ns pin-to-pin logic delays on all pins fCNT to 100 MHz • • • 36 macrocells with 800 usable gates Up to 34 user I/O pins

XC9572

Abstract: PC84 PQ100 XC9500
Contextual Info: 1 XC9572 In-System Programmable CPLD  December 4, 1998 Version 3.0 1 1* Product Specification Features Power Management • • 7.5 ns pin-to-pin logic delays on all pins fCNT to 125 MHz • • • 72 macrocells with 1,600 usable gates Up to 72 user I/O pins

XC95144

Abstract: XC95144-10PQG100I XC95144-10PQG160C xc9514415pqg160i Plastic Quad Flat Pack PQFP XC95144-10TQG100I xc95144-15pqg100i XC95144-7PQG160C XC95144-15PQG160C XC95144-15pqg160i
Contextual Info: XC95144 In-System Programmable CPLD R DS067 v5.6 April 3, 2006 5 Product Specification Features Description • • 7.5 ns pin-to-pin logic delays on all pins fCNT to 111 MHz • • • 144 macrocells with 3,200 usable gates Up to 133 user I/O pins 5V in-system programmable

XC95288

Abstract: BG352 HQ208 XC9500 n439
Contextual Info: XC95288 In-System Programmable CPLD R DS069 v4.1 August 21, 2003 5 Product Specification Features Description • • 15 ns pin-to-pin logic delays on all pins fCNT to 95 MHz • • • 288 macrocells with 6,400 usable gates Up to 166 user I/O pins 5V in-system programmable

XC95144

Abstract: DS06 HW130 XC9500 XC95108 XC95216 XC95288 XC9536 XC9572 xc95144 pinout
Contextual Info: k XC9500 In-System Programmable CPLD Family R DS063 v5.1 September 22, 2003 Product Specification Features - Advanced CMOS 5V Fast FLASH technology • - Supports parallel programming of multiple XC9500 devices • High-performance - 5 ns pin-to-pin logic delays on all pins

xc9572-44 pin

Abstract: xc9536 44 pin vqfp XC9536 36V18 TQ100 VQ44 XC9500 XC9536-15VQ44Q XC9572 XC9572-15TQ100Q
Contextual Info: k XC9500 In-System Programmable CPLD Automotive IQ Family R DS120-1 v1.2 October 18, 2004 Features • System frequency up to 55 MHz • Guaranteed to meet full electrical specifications over TA = –40 to +125°C • 5V in-system programmable - Endurance of 10,000 program/erase cycles

XC95144 PQ100

Abstract: XC95144 XC95144-15TQG100C XC95144-15TQG100I XC95144-10PQ100I PQ100 PQ160 TQ100 XC9500 XC95144-15PQ100
Contextual Info: XC95144 In-System Programmable CPLD R DS067 v5.7 May 28, 2009 5 Product Specification Features Description • • 7.5 ns pin-to-pin logic delays on all pins fCNT to 111 MHz • • • 144 macrocells with 3,200 usable gates Up to 133 user I/O pins 5V in-system programmable

471 E25

Abstract: xc95288 XC95288-15HQ208I AD9318 A23 780-4 BG352 HQ208 XC9500 h3144 n439
Contextual Info: XC95288 In-System Programmable CPLD R DS069 v4.3 April 3, 2006 5 Product Specification Features Description • • 15 ns pin-to-pin logic delays on all pins fCNT to 95 MHz • • • 288 macrocells with 6,400 usable gates Up to 166 user I/O pins 5V in-system programmable