AL13 Search Results

IDT7M145S

Contextual Info: 8K x 8 16K x 8 CMOS DUAL-PORT STATIC RAM MODULE SLAVE IDT7M144S IDT7M145S FEATURES: eigh t 2 K x 8 d u a l-p o rt static R A M s . • H ig h -d e n s ity 6 4 K /1 2 8 K C M O S S L A V E D u a l-P o rt static option, th e AL13 a n d AR13 n e e d to b e e xte rn a lly grou n d e d

sensotec model 41 load cell

Abstract: al131 Sensotec 53 Sensotec Sensotec 060 Sensotec 42 sensotec model 41 sensotec model 41 load cell 25 lb sensotec model 75 load cell DV-05
Contextual Info: Model 53 Low Cost Load Cell Order Code AL131 5 to 50,000 lb. Stainless Steel Mini Footprint Button Style Design mV/V Output n n n n n Spherical Load Button ø D2 Spring Strain Relief Wiring Code L Cable/ Unamplified Red Black Green White H ø D1 + Excitation

al1336

Abstract: al13
Contextual Info: page 1 2 3 4 5 6 7 AL13-36 sheet 1 2 3 4 A B FP date 1957.03.03 1957.03.03 1957.03.03 1957.03.03 1957.03.03 1957.03.03 2000.03.06

mip 291

Abstract: mip 290
Contextual Info: SMJ320C80 DIGITAL SIGNAL PROCESSOR SGUS025 – AUGUST 1998 D D D D D D D D D D D D D Single-Chip Parallel Multiple Instruction / Multiple Data MIMD Digital Signal Processor (DSP) More Than Two Billion RISC-Equivalent Operations per Second Master Processor (MP)

MC 4011 BCP

Abstract: PKT 4113 API ncp 6131 SWITCHING SYSTEMS INTERNATIONAL sqm 225 leach 1522 her 4541 MSP SNCP t 1451 n 52 toh SWITCHING SYSTEMS INTERNATIONAL sqm 350 k2400 EQUIVALENT
Contextual Info: EtherPHAST -24 Device 2x OC-12/STM-4 SONET/SDH Ethernet Mapper TXC-06745 DATA SHEET TXC-06745-MB, Ed. 2 February 2006 FEATURES APPLICATIONS • Client Interfaces: 2x GMII/24x SMII/4x TBI/MPI 24 channel packet all pin shared • Two serial Gigabit Ethernet (1.25 Gbit/s) ports with integrated CRSU/SerDes (8B/10B)

Contextual Info: 66AK2E05, 66AK2E02 SPRS865B—June 2013—Revised January 2014 Multicore DSP+ARM KeyStone II System-on-Chip SoC 1 66AK2E05/02 Features and Description • ARM Cortex -A15 MPCore™ CorePac – Up to Four ARM Cortex-A15 Processor Cores at up to 1.4-GHz

18n5o

Abstract: BA2N15 SGX530 PowerVR SGX530 0x4803 Ps3 MOTHERBOARD CIRCUIT diagram DDR2-800 AM38x 15F4 17 inch lcd monitor
Contextual Info: AM3894 AM3892 www.ti.com SPRS681A – OCTOBER 2010 – REVISED MARCH 2011 AM389x Sitara ARM Microprocessors MPUs Check for Samples: AM3894, AM3892 1 Device Summary 1.1 Features • High-Performance Sitara ARM Microprocessors (MPUs) – ARM® Cortex™-A8 RISC MPU

dSMC

Abstract: WinChip-2 Phoenix BIOS manual f.34 cyrix Cyrix 6x86mx AK-02 diode T35 12H P54C P55C TR12
Contextual Info: Preliminary Information PROCESSOR Data Sheet Preliminary Information April 1999 IDT WINCHIPTM 3 PROCESSOR DATA SHEET This is Version 0.9 of the IDT WinChip 3 Processor data sheet. The latest versions of this data sheet may be obtained from www.winchip.com

ah30 diode

Abstract: AH34 mosfet ak24 diode thermistor M33 irf7832 ISL62882 n34 transistor w8 mosfet transistor c36 Burndy y34 lug specifications
Contextual Info: ISL62882EVAL2Z User Guide Application Note April 9, 2009 AN1461.0 Author: Jia Wei Introduction Interface Connections The ISL62882EVAL2Z evaluation board demonstrates the performance of the ISL62882 multiphase synchronous-buck PWM VCORE controller implementing Intel IMVP-6.5

00XXX001

Abstract: BA 5979 R15C3 OR3T125 OR3T20 OR3T30 OR3T55 PT10 PT11 PT12
Contextual Info: Data Sheet November 2006 ORCA Series 3C and 3T Field-Programmable Gate Arrays Features • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ Baseline FPGA family used in Series 3+ FPSCs field programmable system chips which combine FPGA logic

SuperSPARC

Abstract: Mbus master 250 slave circuit tmx390 STP1091-60
Contextual Info: S un M icroelectronics July 1997 Multi-Cache Controller DATA SHEET Integrated Cache Controller for SuperSPARC D e s c r ip t io n The STP1091 is a high-performance external cache controller for the STP1020 SuperSPARC and STP1021 (SuperSPARC-II) microprocessors. It is used when a large secondary cache or an interface to a non-MBus sys­

Contextual Info: Freescale Semiconductor MPC8349EEC Rev. 2, 5/2005 Advance Information MPC8349E PowerQUICC II Pro Integrated Host Processor Hardware Specifications The MPC8349E contains a PowerPC processor core with system logic required for networking, storage, and general-purpose embedded applications. For functional

Contextual Info: SMJ320C80 DIGITAL SIGNAL PROCESSOR SGUS025B - AUGUST 1998 - REVISED JUNE 2002 D Single-Chip Parallel Multiple D D D D D D D D D D D D Instruction/Multiple Data MIMD Digital Signal Processor (DSP) More Than Two Billion RISC-Equivalent Operations per Second

Contextual Info: TMS320DM8168, TMS320DM8167 TMS320DM8166, TMS320DM8165 www.ti.com SPRS614 – MARCH 2011 TMS320DM816x DaVinci Digital Media Processors Check for Samples: TMS320DM8168, TMS320DM8167, TMS320DM8166, TMS320DM8165 1 Device Summary 1.1 Features • High-Performance DaVinci Digital Media

Contextual Info: SMJ320C40, TMP320C40 DIGITAL SIGNAL PROCESSORS SGUS017H - OCTOBER 1993 - REVISED OCTOBER 2001 D D D D D D D D D D D D D SMJ: QML Processing to MIL-PRF-38535 SM: Standard Processing TMP: Commercial Level Processing TAB Operating Temperature Ranges: - Military M -55°C to 125°C

Contextual Info: SMJ320C40, TMP320C40 DIGITAL SIGNAL PROCESSORS SGUS017H - OCTOBER 1993 - REVISED OCTOBER 2001 D D D D D D D D D D D D D SMJ: QML Processing to MIL-PRF-38535 SM: Standard Processing TMP: Commercial Level Processing TAB Operating Temperature Ranges: - Military M -55°C to 125°C

Contextual Info: SMJ320C80 DIGITAL SIGNAL PROCESSOR SGUS025B - AUGUST 1998 - REVISED JUNE 2002 D Single-Chip Parallel Multiple D D D D D D D D D D D D Instruction/Multiple Data MIMD Digital Signal Processor (DSP) More Than Two Billion RISC-Equivalent Operations per Second

Contextual Info: SMJ320C40, TMP320C40 DIGITAL SIGNAL PROCESSORS SGUS017H – OCTOBER 1993 – REVISED OCTOBER 2001 D D D D D D D D D D D D D SMJ: QML Processing to MIL–PRF–38535 SM: Standard Processing TMP: Commercial Level Processing TAB Operating Temperature Ranges:

Contextual Info: SMJ320C40, TMP320C40 DIGITAL SIGNAL PROCESSORS SGUS017H - OCTOBER 1993 - REVISED OCTOBER 2001 D D D D D D D D D D D D D SMJ: QML Processing to MIL-PRF-38535 SM: Standard Processing TMP: Commercial Level Processing TAB Operating Temperature Ranges: - Military M -55°C to 125°C

APA600

Abstract: AA23 APA075 APA1000 APA150 APA300 APA450 APA750
Contextual Info: ProASICPLUS Flash Family FPGAs Package Pin Assignments 100-Pin TQFP 1 100 100-Pin TQFP Note For Package Manufacturing and Environmental information, visit the Package Resource center at . v5.8 2-1 ProASICPLUS Flash Family FPGAs

Contextual Info: Freescale Semiconductor MPC8349EEC Rev. 8, 2/2007 Technical Data MPC8349E PowerQUICC II Pro Integrated Host Processor Hardware Specifications The MPC8349E PowerQUICC™ II Pro is a next generation PowerQUICC II integrated host processor. The MPC8349E contains a PowerPC™ processor core built on Power

729-Pin

Abstract: Axcelerator FPGAs AX125 IO126PB3F11 AG18 FBGA 896 896-Pin Axcelerator Family FPGAs
Contextual Info: Axcelerator Family FPGAs Package Pin Assignments 180-Pin CSP A1 Ball Pad Corner 14 13 12 11 10 9 8 7 6 5 4 3 2 1 A B C D E F G H J K L M N P Figure 3-1 • 180-Pin CSP Bottom View Note For Package Manufacturing and Environmental information, visit Resource center at

VR12000

Abstract: uPD30710 0PC25 SGI DSD uPD30700 tag 9022 VR10000 VR5000TM uPD30710RS-300 U12703EJ1V0DS00
Contextual Info: DATA SHEET MOS INTEGRATED CIRCUIT µPD30700,30700L,30710 VR10000TM, VR12000TM 64-BIT MICROPROCESSORS DESCRIPTION The µPD30700 and 30700L VR10000 and µPD30710 (VR12000) are new members of NEC’s VR seriesTM RISC (Reduced Instruction Set Computer) microprocessors. These new high-performance 64-bit microprocessors employ

C8050

Abstract: AB32 AB34 TMS320C80
Contextual Info: TMS320C80 Digital Signal Processor Data Sheet 1997 Digital Signal Processing Solutions Printed in U.S.A., October 1997 SPRS023B Book Type Data Sheet TMS320C80 DSP 1997 TMS320C80 DIGITAL SIGNAL PROCESSOR SPRS023B – JULY 1994 – REVISED OCTOBER 1997 D D D