A7L TRANSISTOR Search Results
A7L TRANSISTOR Result Highlights (5)
Part | ECAD Model | Manufacturer | Description | Download | Buy |
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2SC6026MFV |
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NPN Bipolar Transistor / VCEO=50 V / IC=0.15 A / hFE=120~400 / VCE(sat)=0.25 V / SOT-723 | Datasheet | ||
TTC5886A |
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NPN Bipolar Transistor / VCEO=50 V / IC=5 A / hFE=400~1000 / VCE(sat)=0.22 V / tf=120 ns / New PW-Mold | Datasheet | ||
TTA2097 |
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PNP Bipolar Transistor / VCEO=-50 V / IC=-5 A / hFE=200~500 / VCE(sat)=-0.27 V / tf=60 ns / New PW-Mold | Datasheet | ||
TTA012 |
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PNP Bipolar Transistor / VCEO=-80 V / IC=-4 A / hFE=100~200 / VCE(sat)=-0.22 V / tf=35 ns / PW-Mini | Datasheet | ||
TPCP8514 |
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NPN Bipolar Transistor / VCEO=120 V / IC=3 A / hFE=120~240 / VCE(sat)=0.15 V / tf=170 ns / PS-8 | Datasheet |
A7L TRANSISTOR Datasheets Context Search
Catalog Datasheet | Type | Document Tags | |
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a7l transistor
Abstract: transistor a7p HTC one m7 a7p 18 74 HTC 612 a7p18 LTQY UF 730 L UTC QQG1322 UM91271
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OCR Scan |
QQG1322 UM9127172 32-diglt 16-diglt UM91271 16-digit 32-digit DDD1332 UM9127Ã M91271/72 a7l transistor transistor a7p HTC one m7 a7p 18 74 HTC 612 a7p18 LTQY UF 730 L UTC QQG1322 | |
Contextual Info: CY7C130, CY7C130A CY7C131, CY7C131A 1 K x 8 Dual-Port Static RAM 1 K × 8 Dual-Port Static RAM Functional Description Features • True dual-ported memory cells, which allow simultaneous reads of the same memory location ■ 1 K × 8 organization ■ 0.65 micron CMOS for optimum speed and power |
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CY7C130, CY7C130A CY7C131, CY7C131A CY7C130/130A/CY7C131/131A CY7C140/CY7C141 CY7C130/130A/CY7C131/131A; 48-pinout | |
CY7C
Abstract: CY7C130 CY7C131 CY7C140 CY7C141
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CY7C130, CY7C130A CY7C131, CY7C131A CY7C130/130A/CY7C131/131A/CY7C140 CY7C141 CY7C130/130A/CY7C131/131A CY7C CY7C130 CY7C131 CY7C140 CY7C141 | |
CY7C130
Abstract: CY7C131 CY7C140 CY7C141
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CY7C130, CY7C130A CY7C131, CY7C131A CY7C130/130A/CY7C131/131A CY7C140/CY7C141 CY7C130/130A/CY7C131/131A; 48-pin CY7C13ication CY7C130 CY7C131 CY7C140 CY7C141 | |
MN3101
Abstract: 4007A J201A transistor a 501523 transistor j201 Transistor 4007A 0022J a7l transistor NJM4560 pins 1m50e1
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10K-7 047MD7 47K-7 27K-7 0015J 10KD7 MN3101 4007A J201A transistor a 501523 transistor j201 Transistor 4007A 0022J a7l transistor NJM4560 pins 1m50e1 | |
a7r transistor
Abstract: transistor a4L A12L transistor A0LA A12L CY7C144 CY7C145
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CY7C144 CY7C144) CY7C145) 65-micron CY7C144 CY7C145 CY7C144/5 a7r transistor transistor a4L A12L transistor A0LA A12L | |
MS6130L-70JCContextual Info: MS6130 FEBRUARY 1992 1K x 8 CMOS Dual Port SRAM FEATURES DESCRIPTION • High-speed - 55/70/90 ns The MOSEL MS6130 is a 8,192 bit dual port static random access memory organized as 1,024 words by 8 bits. It is built with MOSEL's high perofrmance twin tub CMOS process. Eight-transistor full CMOS memory cell |
OCR Scan |
MS6130 MS6130 48-pin 52-pin 325mW MS6130-70PC MS6130L-70PC MS6130-90PC MS6130L-90PC MS6130L-70JC | |
transistor a4L
Abstract: a7l transistor 55AX A12L CY7C144 CY7C145 CY7C CY7C144-15AI
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CY7C144 CY7C145 CY7C144) CY7C145) 65-micron transistor a4L a7l transistor 55AX A12L CY7C145 CY7C CY7C144-15AI | |
CY7C136-55JCContextual Info: CY7C132, CY7C136 CY7C136A, CY7C142, CY7C146 2K x 8 Dual-Port Static RAM Functional Description Features • True dual-ported memory cells that enable simultaneous reads of the same memory location ■ 2K x 8 organization ■ 0.65 micron CMOS for optimum speed and power |
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CY7C132, CY7C136 CY7C136A, CY7C142, CY7C146 CY7C132/CY7C136/CY7C136A CY7C142/CY7C146 CY7C132/CY7C136/CY7C136A; 52-Pin CY7C136-55JC | |
transistor a4L
Abstract: CY7C132 CY7C136 CY7C142 CY7C146 a7r transistor CY7C136-55NC
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CY7C132, CY7C136 CY7C136A, CY7C142, CY7C146 CY7C136, transistor a4L CY7C132 CY7C136 CY7C142 CY7C146 a7r transistor CY7C136-55NC | |
CY7C136EContextual Info: CY7C131E, CY7C131AE CY7C136E, CY7C136AE 1 K / 2 K x 8 Dual-port Static RAM 1 K / 2 K × 8 Dual-port Static RAM Functional Description Features • True dual-ported memory cells, which allow simultaneous reads of the same memory location ■ 1 K / 2 K × 8 organization |
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CY7C131E, CY7C131AE CY7C136E, CY7C136AE 52-pin CY7C136E | |
CY7C136EContextual Info: CY7C131E/CY7C131AE CY7C136E/CY7C136AE 1 K / 2 K x 8 Dual-port Static RAM 1 K / 2 K × 8 Dual-port Static RAM Features Functional Description • True dual-ported memory cells, which allow simultaneous reads of the same memory location ■ 1 K / 2 K × 8 organization |
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CY7C131E/CY7C131AE CY7C136E/CY7C136AE CY7C131E CY7C131AE CY7C136E CY7C136AE CY7C136Eout | |
CY7C136E
Abstract: CY7C131AE-15JXI CY7C136AE-55NXI
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CY7C131E, CY7C131AE CY7C136E, CY7C136AE CY7C131E CY7C136E CY7C136AE CY7C131AE-15JXI CY7C136AE-55NXI | |
CY7C131E-55
Abstract: N5210 30380 CY7C136E
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CY7C131E, CY7C131AE CY7C136E, CY7C136AE CY7C131E CY7C136E CY7C136AE CY7C131E-55 N5210 30380 | |
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Contextual Info: CY7C007A16 K x 8 Dual-Port Static RAM CY7C006A 16 K × 8 Dual-Port Static RAM 16 K × 8 Dual-Port Static RAM Features • Expandable data bus to 16 bits or more using Master/Slave chip select when using more than one device ■ On-chip arbitration logic ■ |
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CY7C007A16 CY7C006A CY7C006A) 35-micron | |
CY7C136EContextual Info: CY7C131E, CY7C131AE CY7C136E, CY7C136AE 1 K / 2 K x 8 Dual-port Static RAM 1 K / 2 K × 8 Dual-port Static RAM Features Functional Description • True dual-ported memory cells, which allow simultaneous reads of the same memory location ■ 1 K / 2 K × 8 organization |
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CY7C131E, CY7C131AE CY7C136E, CY7C136AE CY7C131E CY7C136E CY7C136AE | |
Contextual Info: CY7C007A16 K x 8 Dual-Port Static RAM CY7C006A 16 K × 8 Dual-Port Static RAM 16 K × 8 Dual-Port Static RAM Features • Expandable data bus to 16 bits or more using Master/Slave chip select when using more than one device ■ On-chip arbitration logic ■ |
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CY7C007A16 CY7C006A CY7C006A) 35-micron | |
CY7C09099VContextual Info: CY7C09079V/89V/99V CY7C09179V/89V/99V CY7C09099V CY7C09179V 3.3 V 32K/128K x 8/9 Synchronous Dual-Port Static RAM 3.3 V 32 K/64 K/128 K × 8/9 Synchronous Dual-Port Static RAM Features • True Dual-Ported memory cells which enable simultaneous access of the same memory location |
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CY7C09079V/89V/99V CY7C09179V/89V/99V CY7C09099V CY7C09179V 32K/128K K/128 CY7C09179V) CY7C09099V) CY7C09099V | |
Contextual Info: CY7C138AV CY7C139AV CY7C144AV CY7C145AV CY7C006AV CY7C016AV CY7C007AV CY7C017AV 3.3 V 8 K / 16 K x 8 Dual-Port Static RAM CY7C144AV CY7C006AV 3.3 V 8 K / 16 K × 8 Dual-Port Static RAM 3.3 V 8 K / 16 K × 8 Dual-Port Static RAM Features • True dual-ported memory cells which allow simultaneous |
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CY7C138AV CY7C139AV CY7C144AV CY7C145AV CY7C006AV CY7C016AV CY7C007AV CY7C017AV CY7C006AV | |
CY7C09279V
Abstract: CY7C09389V-9AI
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CY7C09269V/79V/89V CY7C09369V/89V CY7C09269V/369V) CY7C09279V) CY7C09289V/389V) CY7C09279V CY7C09389V-9AI | |
Contextual Info: CY7C09269V/79V/89V CY7C09369V/89V 3.3 V 16 K / 32 K / 64 K x 16 / 18 Synchronous Dual-Port Static RAM 3.3 V 16 K / 32 K / 64 K × 16 / 18 Synchronous Dual-Port Static RAM Features • ■ True dual-ported memory cells that allow simultaneous access of the same memory location |
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CY7C09269V/79V/89V CY7C09369V/89V CY7C09269V/369V) CY7C09279V) CY7C09289V/389V) | |
Contextual Info: CY7C09269V/79V/89V CY7C09369V/89V 3.3 V 16 K / 32 K / 64 K x 16 / 18 Synchronous Dual-Port Static RAM 3.3 V 16 K / 32 K / 64 K × 16 / 18 Synchronous Dual-Port Static RAM Features • True dual-ported memory cells that allow simultaneous access of the same memory location |
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CY7C09269V/79V/89V CY7C09369V/89V 100-pin | |
CY7C09099VContextual Info: CY7C09079V/89V/99V CY7C09179V/89V/99V CY7C09089V/99V CY7C09179V/99V 3.3 V 32 K/64 K/128 K x 8/9 Synchronous Dual-Port Static RAM 3.3 V 32 K/64 K/128 K × 8/9 Synchronous Dual-Port Static RAM Features • High speed clock to data access 6.5[1]/7.5[1]/9/12 ns max. |
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CY7C09079V/89V/99V CY7C09179V/89V/99V CY7C09089V/99V CY7C09179V/99V K/128 100-pin CY7C09099V | |
Contextual Info: CY7C09269V/79V/89V CY7C09369V/89V 3.3 V 16 K / 32 K / 64 K x 16 / 18 Synchronous Dual-Port Static RAM 3.3 V 16 K / 32 K / 64 K × 16 / 18 Synchronous Dual-Port Static RAM Features • ■ True dual-ported memory cells that allow simultaneous access of the same memory location |
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CY7C09269V/79V/89V CY7C09369V/89V 100-pin |