A7L TRANSISTOR Search Results
A7L TRANSISTOR Result Highlights (5)
| Part | ECAD Model | Manufacturer | Description | Download | Buy |
|---|---|---|---|---|---|
| BLA1011-300 | Rochester Electronics LLC | BLA1011-300 - 300W LDMOS Avionics Power Transistor |
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| 54F151LM/B | Rochester Electronics LLC | 54F151 - Multiplexer, 1-Func, 8 Line Input, TTL |
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| ICL7667MJA | Rochester Electronics LLC | ICL7667 - Buffer/Inverter Based MOSFET Driver, CMOS, CDIP8 |
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| 93L422ADM/B | Rochester Electronics LLC | 93L422A - 256 x 4 TTL SRAM |
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| 54F151/BEA | Rochester Electronics LLC | 54F151 - Multiplexer, 1-Func, 8 Line Input, TTL, CDIP16 - Dual marked (M38510/33901BEA) |
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A7L TRANSISTOR Datasheets Context Search
| Catalog Datasheet | Type | Document Tags | |
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a7l transistor
Abstract: transistor a7p HTC one m7 a7p 18 74 HTC 612 a7p18 LTQY UF 730 L UTC QQG1322 UM91271
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OCR Scan |
qqg1322um912717232-diglt16-diglt+14 | |
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Contextual Info: CY7C130, CY7C130A CY7C131, CY7C131A 1 K x 8 Dual-Port Static RAM 1 K × 8 Dual-Port Static RAM Functional Description Features • True dual-ported memory cells, which allow simultaneous reads of the same memory location ■ 1 K × 8 organization ■ 0.65 micron CMOS for optimum speed and power |
Original |
cy7c130cy7c130acy7c131cy7c131a+3 | |
CY7C
Abstract: CY7C130 CY7C131 CY7C140 CY7C141
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cy7c130cy7c130acy7c131cy7c131a+5 | |
CY7C130
Abstract: CY7C131 CY7C140 CY7C141
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cy7c130cy7c130acy7c131cy7c131a+6 | |
MN3101
Abstract: 4007A J201A transistor a 501523 transistor j201 Transistor 4007A 0022J a7l transistor NJM4560 pins 1m50e1
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Original |
10k-7047md747k-727k-7+12 | |
a7r transistor
Abstract: transistor a4L A12L transistor A0LA A12L CY7C144 CY7C145
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Original |
cy7c144cy7c14565-microncy7c144/5+5 | |
MS6130L-70JCContextual Info: MS6130 FEBRUARY 1992 1K x 8 CMOS Dual Port SRAM FEATURES DESCRIPTION • High-speed - 55/70/90 ns The MOSEL MS6130 is a 8,192 bit dual port static random access memory organized as 1,024 words by 8 bits. It is built with MOSEL's high perofrmance twin tub CMOS process. Eight-transistor full CMOS memory cell |
OCR Scan |
ms613048-pin52-pin325mw+5 | |
transistor a4L
Abstract: a7l transistor 55AX A12L CY7C144 CY7C145 CY7C CY7C144-15AI
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cy7c144cy7c14565-microntransistor a4l+5 | |
CY7C136-55JCContextual Info: CY7C132, CY7C136 CY7C136A, CY7C142, CY7C146 2K x 8 Dual-Port Static RAM Functional Description Features • True dual-ported memory cells that enable simultaneous reads of the same memory location ■ 2K x 8 organization ■ 0.65 micron CMOS for optimum speed and power |
Original |
cy7c132cy7c136cy7c136acy7c142+5 | |
transistor a4L
Abstract: CY7C132 CY7C136 CY7C142 CY7C146 a7r transistor CY7C136-55NC
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cy7c132cy7c136cy7c136acy7c142+4 | |
CY7C136EContextual Info: CY7C131E, CY7C131AE CY7C136E, CY7C136AE 1 K / 2 K x 8 Dual-port Static RAM 1 K / 2 K × 8 Dual-port Static RAM Functional Description Features • True dual-ported memory cells, which allow simultaneous reads of the same memory location ■ 1 K / 2 K × 8 organization |
Original |
cy7c131ecy7c131aecy7c136ecy7c136ae+1 | |
CY7C136EContextual Info: CY7C131E/CY7C131AE CY7C136E/CY7C136AE 1 K / 2 K x 8 Dual-port Static RAM 1 K / 2 K × 8 Dual-port Static RAM Features Functional Description • True dual-ported memory cells, which allow simultaneous reads of the same memory location ■ 1 K / 2 K × 8 organization |
Original |
cy7c131e/cy7c131aecy7c136e/cy7c136aecy7c131ecy7c131ae+3 | |
CY7C136E
Abstract: CY7C131AE-15JXI CY7C136AE-55NXI
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cy7c131ecy7c131aecy7c136ecy7c136ae+2 | |
CY7C131E-55
Abstract: N5210 30380 CY7C136E
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cy7c131ecy7c131aecy7c136ecy7c136ae+3 | |
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Contextual Info: CY7C007A16 K x 8 Dual-Port Static RAM CY7C006A 16 K × 8 Dual-Port Static RAM 16 K × 8 Dual-Port Static RAM Features • Expandable data bus to 16 bits or more using Master/Slave chip select when using more than one device ■ On-chip arbitration logic ■ |
Original |
cy7c007a16cy7c006a35-micron | |
CY7C136EContextual Info: CY7C131E, CY7C131AE CY7C136E, CY7C136AE 1 K / 2 K x 8 Dual-port Static RAM 1 K / 2 K × 8 Dual-port Static RAM Features Functional Description • True dual-ported memory cells, which allow simultaneous reads of the same memory location ■ 1 K / 2 K × 8 organization |
Original |
cy7c131ecy7c131aecy7c136ecy7c136ae | |
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Contextual Info: CY7C007A16 K x 8 Dual-Port Static RAM CY7C006A 16 K × 8 Dual-Port Static RAM 16 K × 8 Dual-Port Static RAM Features • Expandable data bus to 16 bits or more using Master/Slave chip select when using more than one device ■ On-chip arbitration logic ■ |
Original |
cy7c007a16cy7c006a35-micron | |
CY7C09099VContextual Info: CY7C09079V/89V/99V CY7C09179V/89V/99V CY7C09099V CY7C09179V 3.3 V 32K/128K x 8/9 Synchronous Dual-Port Static RAM 3.3 V 32 K/64 K/128 K × 8/9 Synchronous Dual-Port Static RAM Features • True Dual-Ported memory cells which enable simultaneous access of the same memory location |
Original |
cy7c09079v/89v/99vcy7c09179v/89v/99vcy7c09099vcy7c09179v+2 | |
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Contextual Info: CY7C138AV CY7C139AV CY7C144AV CY7C145AV CY7C006AV CY7C016AV CY7C007AV CY7C017AV 3.3 V 8 K / 16 K x 8 Dual-Port Static RAM CY7C144AV CY7C006AV 3.3 V 8 K / 16 K × 8 Dual-Port Static RAM 3.3 V 8 K / 16 K × 8 Dual-Port Static RAM Features • True dual-ported memory cells which allow simultaneous |
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cy7c138avcy7c139avcy7c144avcy7c145av+4 | |
CY7C09279V
Abstract: CY7C09389V-9AI
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Original |
cy7c09269v/79v/89vcy7c09369v/89vcy7c09269v/369vcy7c09279v+2 | |
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Contextual Info: CY7C09269V/79V/89V CY7C09369V/89V 3.3 V 16 K / 32 K / 64 K x 16 / 18 Synchronous Dual-Port Static RAM 3.3 V 16 K / 32 K / 64 K × 16 / 18 Synchronous Dual-Port Static RAM Features • ■ True dual-ported memory cells that allow simultaneous access of the same memory location |
Original |
cy7c09269v/79v/89vcy7c09369v/89vcy7c09269v/369vcy7c09279v+1 | |
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Contextual Info: CY7C09269V/79V/89V CY7C09369V/89V 3.3 V 16 K / 32 K / 64 K x 16 / 18 Synchronous Dual-Port Static RAM 3.3 V 16 K / 32 K / 64 K × 16 / 18 Synchronous Dual-Port Static RAM Features • True dual-ported memory cells that allow simultaneous access of the same memory location |
Original |
cy7c09269v/79v/89vcy7c09369v/89v100-pin | |
CY7C09099VContextual Info: CY7C09079V/89V/99V CY7C09179V/89V/99V CY7C09089V/99V CY7C09179V/99V 3.3 V 32 K/64 K/128 K x 8/9 Synchronous Dual-Port Static RAM 3.3 V 32 K/64 K/128 K × 8/9 Synchronous Dual-Port Static RAM Features • High speed clock to data access 6.5[1]/7.5[1]/9/12 ns max. |
Original |
cy7c09079v/89v/99vcy7c09179v/89v/99vcy7c09089v/99vcy7c09179v/99v+3 | |
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Contextual Info: CY7C09269V/79V/89V CY7C09369V/89V 3.3 V 16 K / 32 K / 64 K x 16 / 18 Synchronous Dual-Port Static RAM 3.3 V 16 K / 32 K / 64 K × 16 / 18 Synchronous Dual-Port Static RAM Features • ■ True dual-ported memory cells that allow simultaneous access of the same memory location |
Original |
cy7c09269v/79v/89vcy7c09369v/89v100-pin | |