A7 MOE Search Results

arbitration scheme

Contextual Info: AIC-301 adaptec, inc. Dual-Port Buffer Controller PRELIMINARY Direct 16-Bit Buffer Addressing n Fully Downward Compatible With The AIC-300F <<<<u : o « ' î n w r- srco o jf— o ^ •>» 'T ^ / A4 A5 A6 A7 SHPOR-A8 SDP OR -A9 ALE -RST PORT A REQ -CLK AIO

AIC-011

Abstract: 8085 microprocessor ram 4k AIC-500l AIC-301 AIC-010 AIC-100 cpu intel 8085 AIC-300F AIC-301L LS373
Contextual Info: A IC -301 adaptec, inc. Dual-Port Buffer Controller PRELIMINARY Direct 16-Bit Buffer Addressing {5 Fully Downward C om patible With The AIC-300F CO CO . I I I I / A4 A5 A6 A7 SHPOR-A8 SDP OR -A9 ALE -RST PORT A REQ -CLK AIO •O ï q o — o — 7 — 8 — 9

Contextual Info: TEXAS INSTRUMENTS INC MOE » • 00ÔD3ÔD D ■ Till SMJ27C210 1,048,576-BIT UV ERASABLE PROGRAMMABLE READ ONLY MEMORY p\ • Wide-Word Organization . . . 64K x 16 • Single 5-V Power Supply J PACKAGE TOP VIEW Operationally Compatible with Existing Megabit EPRO M s

37C65

Abstract: c5287 FE3001 FE3031 T58-T57 D 80287-8 em-180 PFA 10Z FE3010B FE3021
Contextual Info: WESTERN DIGITAL CORP 4QE D m =1710220 Q0QbSS3 Q •■ bil>C fri . „ SYST EM S L Ö GIC / P ERIP H ERA L " ' I ^ T S 1 ^ 3 » '2 . \ FE3021 Address Buffer and Memory Controller •HÜWESTERN DIGITAL H Powered by ICminer.com Electronic-Library Service CopyRight 2003

CP106

Abstract: MT48LC32M16A2P-75 fc-135 32.768khz DM1AA-SF-PEJ cp87 CP113 SDA14 FC-135 32,768kHz MT48LC32M16A2P 21136NA
Contextual Info: 5 4 3 SDRAM D 3.3V GND 2 USB MPU SDA[14.0] SDD[31.0] SDA[14.0] SDD[31.0] SDCS0# SDCS1# SDWE# SDRAS# SDCAS# SDCLKEN SDCLK SDDQM3# SDDQM2# SDDQM1# SDDQM0# SDA[14.0] SDD[31.0] SDCS0# SDCS1# SDWE# SDRAS# SDCAS# SDCLKEN SDCLK SDDQM3# SDDQM2# SDDQM1# SDDQM0#

pal16v8

Abstract: MACH Technical Briefs Manual MACH110 cross reference PAL 16V8 79C960 MICROPROCESSOR 68000 manual MC68000 M68000FR amd 29000 motorola SEMICONDUCTOR APPLICATION NOTE
Contextual Info: Advanced Micro Devices PCnetTM Application Examples PCnet-ISA to MC68000 PCnet-ISA with a Big Endian Processor Application Note PCnet Application Examples Advanced Micro Devices Application Note Mike Keith & Mike Santoro I. PCnet-ISA CONTROLLER IN AN EMBEDDED APPLICATION

SMJ320C10

Abstract: SMJ320E15 D1278
Contextual Info: TEXAS I N S T R U M E N T S flTbl721 OGflOOlD G • T i l l , 4DE D INC SMJ320 FIRST-GENERATION DIGITAL SIGNAL PROCESSORS APRIL 1990 SMJ320C10, SMJ320C15 JD PACKAGE TOP VIEW • 160/200-ns Instruction Cycle • 144/256-Word On-Chip Data RAM • 1.5K/4K-Word On-Chip Program ROM

3VXD4

Abstract: DDQS 5-pin BD 7954 bd 4914 16C256 Er1003P trident vga fd1004 341S KDS1
Contextual Info: MINI AAVCC L\D POWER JACK/OUT J1004 O -✓Vo - c=H- 4 S 3 2 15 A I 3 r r C O N ! ^ H E C 3 6 00 1 - SA C40 F 0. lu 0603£ C44 0 .0 1 U 0603B CND_CHASSIS CND_CJ i A S S I S R1002 - A W - AC N D _ _ T V CONNECT C 100 2 lOU R1012 1 OK 0 603B _ -r«. C ; O 0 5

PCT303D

Abstract: PCT303W FB901 PCT303 ZF MicroSystems 486 EA7 SMD MT48LC1M16A1TG fb120 EA6 SMD R4.7K
Contextual Info: B C VDD_CORE P14 FLASHCSX0 FLASHCSX1 MEMRX MEMWX SA[23.0] SD[15.0] FLASHCSX0 FLASHCSX1 IRQ7 IRQ[3.5] IRQ[9.12] MEMRX MEMWX SHD_DIS PCBEEP ZRSTX FLASHCSX0 FLASHCSX1 DRD[31.0] DRA[13.0] DRDQM[3.0] DRCLK0 DRCLK1 DRCLK2 DRCLK3 DRCSX0 DRCSX1 DRCSX2 DRCSX3

Contextual Info: PRELIMINARY 4 MEG X 9 DRAM MOEDULE 5EM1CQHOUCTOR. IH£L 4 MEG DRAM MODULE X 9 DRAM FAST PAGE MODE FEATURES • Industry-standard pinout in a 30-pin, single-in-line memory module • High-performance CMOS silicon-gate process • Single 5V ±10% power supply

data circuit schematics satellite connector

Abstract: 21D17 16D22 18D20 VMEbus Handbook 22D16 TMS320C40GFL VAC068 register TMS320C40 TIB82S105BC
Contextual Info: Prototyping the TI TMS320C40 to the Cypress VIC068/VAC068 Interface Application Report Peter F. Siy and David L. Merriman The MITRE Corporation Timothy V. Blanchard Cypress Semiconductor SPRA105 February 1994 Printed on Recycled Paper IMPORTANT NOTICE Texas Instruments TI reserves the right to make changes to its products or to discontinue any

transistor dk qe

Abstract: philips cd18 ld12 st sam9708 SAM3303 PCI08-DK sam9708 ATMEL MIDI SEQUENCER 3C U11C 74HC595 sdi dk qb
Contextual Info: Overview The 08PIA-DK is a high quality stand-alone evaluation board based on the ATSAM9708 and the ATSAM3303 dedicated to digital piano and keyboard instruments. In addition to the ATSAM9708 and ATSAM3303, the 08PIA-DK hardware includes: • 1 Audio CODEC: AKM AK4528 24-bit 108 dB SNR

2R37

Contextual Info: MOSAIC SEMICONDUCTOR INC MOE bBSBB?^ D 0000503 Ô IflOC 7 ^ -/3 -2 7 PUMA 2F4000 PUMA 2F4000-12/15/20 Issue 1.1 : April 1991 ADVANCE PRODUCT INFORMATION Mosaic Sem iconductor In c Pin Definition 4,194,304 bit CMOS High Speed FLASH EEPROM Block Diagram A 0 - A 1 6 -^

la25p

Abstract: CY7C161A CY7C162A range-26
Contextual Info: MOE D CY PR ESS S E M I C O N D U C T O R EH 250^2 DOOMfibH 0 B B C V P 7= tf-2> /0 CY7C161A CY7C162A CYPRESS SEMICONDUCTOR Features • Automatic power-down when dese­ lected • TVansparent write 7C161A • CMOS for optimum speed/power • High speed

KF50

Contextual Info: b427525 D0H2243 c172 « N E Œ MOS INTEGRATED CIRCUIT , u P D 4 2 S 1 6 9 0 0 , 4 2 S 1 7 9 0 0 16 M BIT D Y N A M IC RAM FAST PAGE M O DE PRELIMINARY DESCRIPTION The NEC ¿¿PD42S16900 and ¿¿PD42S17900 are 2 097 152 words by 9 b its dynamic CMOS RAM with optional fa s t page mode. CMOS sense anpl i f ier, peripheral c ir c u it s and 1 tra n s is to r

Contextual Info: Lattice ispLSI 6192 " ; Semiconductor • ■ ■ Corporation High Density Programmable Logic wjth Dedicated Memory and Register/Counter Modules — 96 I/O Pins with Input Registers — Security Cell Prevents Unauthorized Design C opy­ ing Features • A FAMILY OF HIGHLY INTEGRATED, CELL-BASED,

Contextual Info: p ilC R O N M T5C1005 SRAM 256Kx 4 SRAM FEATURES PIN ASSIGNM ENT Top View • High speed: 20, 25, 35 and 45ns • H igh-perform ance, low -pow er, CM O S double-m etal process • Single +5V ±10% pow er supply • Easy m em ory expansion w ith CE and OE options

pal22V10D

Abstract: VMEbus Handbook VME P0 COnnector VIC068 TMS320 TMS320C40 VAC068 Cypress VMEbus Interface Handbook VIC068-VAC068 VAC068A disable
Contextual Info: Connecting the Cypress VIC068/VAC068 to the TI TMS320C40: A Prototype Design Introduction The Cypress Semiconductor VIC068 VMEbus Interface Controller and its companion VAC068 VMEbus Address Controller provide a complete VMEbus interface including master and slave capability Reference 2 . As these components can

g0424

Abstract: transistor B42 350
Contextual Info: bM2752S 00’ 23bb 35Ü H N E C E / / M OS IN TEG RA TED C IR C U IT JU P D 42S 16 1 7 0 ,4 2 S 1 7 1 7 0 ,4 2 S 1 8 1 7 0 16 M B IT D Y N A M IC RAM (FA S T PA G E M O D E & B Y T E W R IT E M ODE -PRELIMINARY-DESCRIPTIO N The NEC #PD42S16170, // PD42S17170 and ¿¿PD42S18170 are 1 048 576 words by 16 bits dynamic

0820R

Abstract: KM62256B
Contextual Info: KM681OOOBLI/BLI-L ~l3 1 , 0 V2 W O R D X CMOS SRAM 8 B it C M O S S ts tic R A M Industrial Temperature Range Operation FEATURES GENERAL DESCRIPTION • Industrial Temperature Range : -40 to 85° C • Fast Access Time: 7 0 ,100ns(max.) • Low Power Dissipation

Contextual Info: SONY CXK5T81OOOATM/AYM/AM/ATN/AYN -10LLX/12LLX 131072-word x 8-bit High Speed CMOS Static RAM Description The CXK5T81 OOOATM/AYM/AM/ATN/AYN is a high speed CMOS static RAM organized as 131072words by 8-bits. Special feature are low power consumption and high speed.

Contextual Info: ispLSI 6192 High Density Programmable Logic with Dedicated Memory and Register/Counter Modules — 96 I/O Pins with Input Registers — Security Cell Prevents Unauthorized Design Copying Features • A FAMILY OF HIGHLY INTEGRATED, CELL-BASED, PROGRAMMABLE LOGIC DEVICES CONSISTING OF:

TAA141

Abstract: TAA 141
Contextual Info: Specifications ispLSI 6192 ispLSI 6192 High Density Programmable Logic with Dedicated Memory and Register/Counter Modules — 96 I/O Pins with Input Registers — Security Cell Prevents Unauthorized Design Copying Features • A FAMILY OF HIGHLY INTEGRATED, CELL-BASED,

lattice 1996

Contextual Info: Specifications ispLSI and pLSI 6192 ® ispLSI and pLSI 6192 High Density Programmable Logic with Dedicated Memory and Register/Counter Modules — 96 I/O Pins with Input Registers — Security Cell Prevents Unauthorized Design Copying Features • A FAMILY OF HIGHLY INTEGRATED, CELL-BASED,