A7 MOE Search Results

2732 rom

Abstract: a7 moe ram 2732 MN86157 QFP044-P-1010
Contextual Info: For Communications Equipment MN86157 Shading Correction LSI Features Choice of correction range 50% or 75% depending on extent of shading distortion Parallel A/D converter functions Resolution: 7 bits A6 A7 A8 A9 A10 A11 N.C. MODE ENBO CKSH ENBI A5 A4 A3

arbitration scheme

Contextual Info: AIC-301 adaptec, inc. Dual-Port Buffer Controller PRELIMINARY Direct 16-Bit Buffer Addressing n Fully Downward Compatible With The AIC-300F <<<<u : o « ' î n w r- srco o jf— o ^ •>» 'T ^ / A4 A5 A6 A7 SHPOR-A8 SDP OR -A9 ALE -RST PORT A REQ -CLK AIO

AIC-011

Abstract: 8085 microprocessor ram 4k AIC-500l AIC-301 AIC-010 AIC-100 cpu intel 8085 AIC-300F AIC-301L LS373
Contextual Info: A IC -301 adaptec, inc. Dual-Port Buffer Controller PRELIMINARY Direct 16-Bit Buffer Addressing {5 Fully Downward C om patible With The AIC-300F CO CO . I I I I / A4 A5 A6 A7 SHPOR-A8 SDP OR -A9 ALE -RST PORT A REQ -CLK AIO •O ï q o — o — 7 — 8 — 9

M22-WS-MS

Abstract: M22-WS3 M22-WRS-MS M22-WRS M22-WS3-MS M22ES ms-1 M22-WRS3 M22-WRS-GVP HPL0211
Contextual Info: 02/018 Moeller HPL0211-2001/2002 RMQ Titan Key-Operated Actuators, Individual Lock Mechanisms Control Circuit Devices Function V = Stay-put v = Spring-return Key withdrawable in position Front ring titanium Front ring black Type Article no. Type Article no.

Contextual Info: TEXAS INSTRUMENTS INC MOE » • 00ÔD3ÔD D ■ Till SMJ27C210 1,048,576-BIT UV ERASABLE PROGRAMMABLE READ ONLY MEMORY p\ • Wide-Word Organization . . . 64K x 16 • Single 5-V Power Supply J PACKAGE TOP VIEW Operationally Compatible with Existing Megabit EPRO M s

Contextual Info: VIS VG36644041DT / VG36648041DT / VG36641641DT CMOS Synchronous Dynamic RAM Description The VG36644041D, VG36648041D and VG36641641D are high-speed 67,108,864-bit synchronous dynamic random-access moeories, organized as 4,194,304 x 4 x 4, 2,097,152 x 8 x 4 and 1,048,576 x 16 x 4

GLT5640L16-7TC

Abstract: GLT5640L16-6TC activa 150
Contextual Info: G -LINK GLT5640L16 CMOS Synchronous Dynamic RAM Description The GLT5640L16 are high-speed 67,108,864-bit synchronous dynamic random-access moeories, organized as 1,048,576 x 16 x 4 word x bit x bank , respectively. The synchronous DRAMs achieved high-speed data transfer using the pipeline architecture and clock

BA7720S

Abstract: a7721 BA7721S A7721S BA7721 ba7720
Contextual Info: R O H M CO L T D VTR 7620^ MOE D IC /IC s for VTR Applications BÄ BA 7720S 7721S ' ODGSD'ib 7 BiRHM BA7720S/BA7721S T -7 7 -2 / HiFi - X - 9 J HiFi Audio Peak Noise Reductions • ^•Jfi'tfiiH /D im en sio n s Unit : mm BA7720S/BA7721S l i , VHS-H iFl

416c256

Abstract: j5021
Contextual Info: 1 2 3 4 5 6 7 8 BANK 0 2 MB 9 AA[0.8] AA[0.8] 9 VMD[0.63] VMD[0.63] +5V 2 1 (-CASAH) (-CASAL) GND 16 17 18 19 22 23 24 25 26 15 11 12 30 13 14 27 28 29 21 35 40 GND DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 2 3 4 5 7 8

fe3021

Abstract: 64K DRAM 80286 schematic 80286 mouse D4000-D7FFF 0F80000FFFFF 8042 keyboard controller LIM EMS 4.0 FE3010B
Contextual Info: WESTERN DIGITAL CORP “'" system s lòg' i c / 4DE D • T71fl22ä aG0bSS3 Q Hlii»C péripheral t - 5 2 ,- 3 3 - 2 - 1 FE3021 Address Bujfer and Memory Controller f SS WESTERN DIGITAL WESTERN D IG IT A L CORP 40E D ■ 1716223 OOQbSSM 2 H l i l DC FE3021

jtag s29gl128p

Abstract: MT48LC32M16A2P-75 SDA14 MT48LC32M16A2P MT48LC32M16A2P-75 by S29GL128P SDD26 BYP52 0/a7 moe MT48LC32M16A2P-75 cas
Contextual Info: 1 2 3 SDRAM.Sch D 3.3V GND 4 5 CPU.Sch SDA[14.0] SDD[31.0] SDA[14.0] SDD[31.0] SDCS0# SDCS1# SDWE# SDRAS# SDCAS# SDCLKEN SDCLK SDDQM3# SDDQM2# SDDQM1# SDDQM0# 6 USB.Sch SDA[14.0] SDD[31.0] SDCS0# SDCS1# SDWE# SDRAS# SDCAS# SDCLKEN SDCLK SDDQM3# SDDQM2#

HCT541

Contextual Info: SGS-THOMSON ELiO IM M S M54HCT540/541 M74HCT540/541 OCTAL BUS BUFFER WITH 3 STATE OUTPUTS HCT540: INVERTED - HCT541 NON INVERTED • HIGH SPEED tPD = 10 ns TYP. at Vcc = 5V . LOW POWER DISSIPATION Ice = 4 nA (MAX.) at Ta = 25 °C ■ COMPATIBLE WITH TTL OUTPUTS

37C65

Abstract: c5287 FE3001 FE3031 T58-T57 D 80287-8 em-180 PFA 10Z FE3010B FE3021
Contextual Info: WESTERN DIGITAL CORP 4QE D m =1710220 Q0QbSS3 Q •■ bil>C fri . „ SYST EM S L Ö GIC / P ERIP H ERA L " ' I ^ T S 1 ^ 3 » '2 . \ FE3021 Address Buffer and Memory Controller •HÜWESTERN DIGITAL H Powered by ICminer.com Electronic-Library Service CopyRight 2003

80286 schematic

Abstract: fe3031 80286 mouse Western Digital floppy disk FE3021A FE3001a FE3031A CHIPset for 80286 8042 keyboard controller floppy controller
Contextual Info: V m =1710226 O O G b b ll T • UDC " T '5 2 - 3 V 2 . 1 FE3021A Address Buffer and Memory Controller g? WESTERN DIGITAL WESTERN D IG IT A L CORP HOE D H =1716523 aO O bblE 1 HUDC FE3021A TABLE OF C O N TEN TS T-52-33-21 Page P R E F A C E .

b30 c250

Abstract: TP082 2C162 82430VX TP1003 intel C236 TP032 TP1026 TP1033 RY 227
Contextual Info: Page# 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 Page Title Index PRIMARY CPU Socket 7 Clock Generator 82437VX Chipset TVX 82438VX Chipset TDX Synchronous Cache, 256K Memory Modules 0 & 1 Memory Modules 2 & 3 System ROM PIIX3 PCI IDE Interface

CP106

Abstract: MT48LC32M16A2P-75 fc-135 32.768khz DM1AA-SF-PEJ cp87 CP113 SDA14 FC-135 32,768kHz MT48LC32M16A2P 21136NA
Contextual Info: 5 4 3 SDRAM D 3.3V GND 2 USB MPU SDA[14.0] SDD[31.0] SDA[14.0] SDD[31.0] SDCS0# SDCS1# SDWE# SDRAS# SDCAS# SDCLKEN SDCLK SDDQM3# SDDQM2# SDDQM1# SDDQM0# SDA[14.0] SDD[31.0] SDCS0# SDCS1# SDWE# SDRAS# SDCAS# SDCLKEN SDCLK SDDQM3# SDDQM2# SDDQM1# SDDQM0#

pbE1 sot23

Abstract: A10 sot23-5 F1 J37 J119 SOT23 M7 j632 IO830 sot23-5 a17 H12 SOT23-5 A44 SOT23-5 cc150
Contextual Info: tied low = A B T11 TO T16 P11 TO P16 M11 TO M16 NC 1 2 J23 1 2 APPROVALS DRAWN DAN JEFF C SCOTT CHECKED ENGINEER MULLIN 303 543-2029 B 1 VGG 1 1 1 1 2 2 J100 2 J90 2 J96 2 J95 2 J89 2 J94 2 J91 2 J92 2 J93 2 J99 2 J115 DATE SIZE SCALE: TRST TCK TMS PCITDI

Symbios Logic 53c885

Abstract: Symbios 53C885 53C885 53C876 sym53c876e SYM53C876 SYM53C8XX c 876e SYM53C875 53c87
Contextual Info: SYM53C876/876E PCI-Dual Channel SCSI Multi-Function Controller Data Manual Version 2.0 . I N C R E A S I N G S C S I R E L I A B I L I T Y TolerANT A C T I V E T76972I 1197-1MH N E G A T I O N T E C H N O L O G Y The products described in this publication are products of Symbios Logic Inc.

B32AD

Abstract: IO830 b29ad j6812 pbE1 sot23 1C101 j78 transistor PBE1 B21AD 1C44
Contextual Info: 4 A B 10K 2 1 R3 CC +3V NC 1 2 J117 1 2 APPROVALS DRAWN DAN C SCOTT ENGINEER David Jones 303 545-5088 DATE SIZE B CODE SCALE: 1C99 CC .01 2 MINDSPEED BOULDER, CHECKED CN8234 PCB: NONE OR IDENT NO. 8236/8250 VSS 66MHZ 7 2 1 R53 CC 49.9 2 TRST TCK TMS PCITDI

pal16v8

Abstract: MACH Technical Briefs Manual MACH110 cross reference PAL 16V8 79C960 MICROPROCESSOR 68000 manual MC68000 M68000FR amd 29000 motorola SEMICONDUCTOR APPLICATION NOTE
Contextual Info: Advanced Micro Devices PCnetTM Application Examples PCnet-ISA to MC68000 PCnet-ISA with a Big Endian Processor Application Note PCnet Application Examples Advanced Micro Devices Application Note Mike Keith & Mike Santoro I. PCnet-ISA CONTROLLER IN AN EMBEDDED APPLICATION

SMJ320C10

Abstract: SMJ320E15 D1278
Contextual Info: TEXAS I N S T R U M E N T S flTbl721 OGflOOlD G • T i l l , 4DE D INC SMJ320 FIRST-GENERATION DIGITAL SIGNAL PROCESSORS APRIL 1990 SMJ320C10, SMJ320C15 JD PACKAGE TOP VIEW • 160/200-ns Instruction Cycle • 144/256-Word On-Chip Data RAM • 1.5K/4K-Word On-Chip Program ROM

RM17

Abstract: MJ179P mj-179p HWW-4PW-G S1S65010 CP45 TMS DASP BRPG1201W upc2933t MT48LC8M16A2TG-75
Contextual Info: 5 4 3 2 GPIOA[7.0] CAMVDD CAMVDD R1 4.7K SW1 CHS-06B GPIOB[7.0] 1 R2 4.7K R3 220 1 2 3 4 5 6 12 11 10 9 8 7 I2C_SDA I2C_SCL R4 220 R5 220 R6 220 CP1 U1 0.1uF BR24L16RFVM-W 1 A0 VCC 8 2 A1 WP 7 3 A2 SCL 6 4 GND SDA 5 D RM1 10K-4 3.3V D R7 10K URAT_CTS URAT_RTS

3VXD4

Abstract: DDQS 5-pin BD 7954 bd 4914 16C256 Er1003P trident vga fd1004 341S KDS1
Contextual Info: MINI AAVCC L\D POWER JACK/OUT J1004 O -✓Vo - c=H- 4 S 3 2 15 A I 3 r r C O N ! ^ H E C 3 6 00 1 - SA C40 F 0. lu 0603£ C44 0 .0 1 U 0603B CND_CHASSIS CND_CJ i A S S I S R1002 - A W - AC N D _ _ T V CONNECT C 100 2 lOU R1012 1 OK 0 603B _ -r«. C ; O 0 5

MITAC schematic

Abstract: mitac 5033 Trident Cyber9385 CCS C TOUCHPAD CIRCUIT CLPD6701 MITAC SO-DIMM 144-pin trident schematic keyboard and touchpad schematic ha7 msd
Contextual Info: 5033 Circuit Diagram Index Table Sheet# 01 02 03 04 05 06 07 08 09 10 11 12 13 Description Jumper Settings CPU MTXC Cache Memory Clock Synthesizer and Driver PIIX4 Primary IDE and G.Pad Connector Trident 9385 Video Memory Bank 0 LCD Connector PCMCIA Controller