A14V40A Search Results

SiS 486 schematic

Contextual Info: Accelerator Series FPGAs - ACT 3 Family Features • Replaces up to twenty 32 macro-cell CPLDs • Up to 10,000 Gate Array Equivalent Gates up to 25,000 equivalent P L IJ Gates • Replaces up to one hundred 20-pin PAL Packages • Highly Predictable Performance with 100% Automatic

Contextual Info: Revision 3 Accelerator Series FPGAs – ACT 3 Family Features • Up to 10,000 Gate Array Equivalent Gates up to 25,000 equivalent PLD Gates • Highly Predictable Performance with 100% Automatic Placeand-Route • As Low as 9.0 ns Clock-to-Output Times (–1 Speed Grade)

Contextual Info: Component Selector Guide 5 V o lt C o m p o n e n t S e le c t o r G u id e Flip-Flops Device Pkg1 A1010B PG PL A1020B A1225A A1225XL* A1240A A1240XL* Speed Option2 Temp.3 User I/O 84 Std, -1 C, M, B 57 1,200 44 Std, - 1 , - 2 , -3 C, I 34 1,200 C, I 57 1,200

A1415

Abstract: A1425 A1425A-3 A1440 A1460 Actel Accelerator fpga A1460 actel
Contextual Info: Accelerator Series FPGAs – ACT 3 Family Features • Replaces up to twenty 32 macro-cell CPLDs • Up to 10,000 Gate Array Equivalent Gates up to 25,000 equivalent PLD Gates • Replaces up to one hundred 20-pin PAL Packages • Highly Predictable Performance with 100% Automatic

A1415

Abstract: A1425 A1425A-3 A1440 A1460 Ai46 ami 0.6 micron ami equivalent gates AI460A
Contextual Info: Axelerator Series FPGAs - yO 3 Family Features Replaces up to twenty 32 macro-cell CPLDs • Up to 10,000 Gate Array Equivalent Gates up to 25,000 equivalent PLD Gates Replaces up to one hundred 20-pin PAL Packages • Highly Predictable Performance with 100%Automatic

QFN108

Abstract: QFN-132 kl1-v1 208 pin rqfp drawing qfn132 RT3PE3000L CQ256 DIMENSIONS pqfp 100 actel package mechanical drawing Actel A40MX04 PBGA 23X23 0.8 pitch
Contextual Info: v 11. 2 Package Mechanical Drawings Ceramic Pin Grid Array 84-Pin CPGA Top View 0.050" ± 0.010" Pin #1 ID 0.045" 0.055" 0.015" 0.018" ± 0.002" 0.100" BSC 1.100" ± 0.020" square 0.072" 0.088" L 0.120" 0.140" Side View K J H G F 1.000" BSC E D C B A 1 2 3

Actel Accelerator fpga

Contextual Info: J^ctel -m Accelerator Series FPGAs -ACT 3 Family • • • • • • • • • F e a tu re s • Up to 10,000 Gate Array Equivalent Gates up to 25,000 equivalent PLD Gates • Highly Predictable Performance with 100% Automatic

RD212

Abstract: A1415 A1425 A1425A-3 A1440 A1460 actcl AH25A-3
Contextual Info: Accelerator Series FPGAs - ACT 3 Family Features Replaces up to twenty 32 macro-cell CPLDs • Up to 10,000 Gate Array Equivalent Gates up to 25,000 equivalent PLD Gates Replaces up to one hundred 20-pin PAL Packages Up to 1153 Dedicated Flip-Flops

RT54SX72SCQ208

Abstract: A42MX16 RT54SX32S-CQ208 CQ208 CQ256
Contextual Info: v3.0 Component Selector Guide PCI 5.0 Volt Tolerant — 5 Volt I/O — Yes Yes Yes — — Yes 3.3 Volt I/O 3,000 2.5 Volt I/O Gates 36 JTAG I/O User I/O C, I SRAM Bits Screening –F, Std, –P Wide Decodes Speed Grade CS49 Flip-Flops/Dedicated Max Package

Contextual Info: BACK Accelerator Series FPGAs – ACT 3 Family Features • Replaces up to twenty 32 macro-cell CPLDs • Up to 10,000 Gate Array Equivalent Gates up to 25,000 equivalent PLD Gates • Replaces up to one hundred 20-pin PAL Packages • Up to 1153 Dedicated Flip-Flops

PG1005

Abstract: PG1335 PG207 PL84 PQ100 PQ160 PQ208 TQ176 VQ100 PG257
Contextual Info: Revision 2 Accelerator Series FPGAs – ACT 3 Family Features • Up to 10,000 Gate Array Equivalent Gates up to 25,000 equivalent PLD Gates • Highly Predictable Performance with 100% Automatic Placeand-Route • As Low as 9.0 ns Clock-to-Output Times (–1 Speed Grade)

spw 068

Contextual Info: Accelerator Series FPGAs - ACT 3 Family F e a tu re s • Replaces up to twenty 32 macro-cell CPLDs • Up to 10,000 Gate Array Equivalent Gates up to 25,000 equivalent PLD Gates • Replaces up to one hundred 20-pin PAL Packages • Highly Predictable Performance with 100% Automatic

A1280XL

Abstract: A32100DX A3265DX A40MX02 A40MX04 A42MX09 A42MX16 A42MX24 A42MX36 A1225XL
Contextual Info: Component Selector Guide Mixed Voltage FPGA Selector Guide These FPGAs operate in 5.0V-only, 3.3V-only, or mixed 5.0V/3.3V systems. Device Type Speed Option2 Temp.3 Range 44 Std, -1, -2, -3 68 Std, -1, -2, -3 100 Std, -1, -2, -3 Pkg1 No. Pins PL PL PQ User

CQ256

Abstract: CQ208 4PMX 4pm smd
Contextual Info: te /e • / Speed Grade JTAG I/O 3.3 Volt 5 Volt PCI 5.0 Volt Tolerant at 3.3V VQ100 Std, - 1 , - 2 , - 3 129 8,000 256 512 - — Yes Yes — — Yes PQ208 Std, - 1 , - 2 , - 3 129 8,000 256 512 — — Yes Yes — — Yes TQ144 Std, - 1 , - 2 , - 3 129 8,000

Contextual Info: Component Selector Guide 5 Volt FPGA S e le c to r Guide Device Type A1225XL A1240XL A3265DX A1280XL A32100DX A32140DX A32200DX A32300DX A32400DX * Pkg1 No. Pins PG PL Speed Option2 Temp.3 Range 100 S td ,-1 ,-2 84 S td ,-1, -2 PQ 100 VQ PG User I/O Logic

Contextual Info: Accelerator Series FPGAs - A C T 3 Family Features Replaces up to twenty 32 macro-cell CPLDs • Replaces up to one hundred 20-pin PAL Packages Up to 10,000 Gate Array Equivalent Gates u p to 25,000equivalent PLD Gates • Up to 1153 Dedicated Flip-Flops

baugh-wooley multiplier verilog

Abstract: 1BG25 LPQ100 9572xv BC356 LPQ240 block diagram baugh-wooley multiplier 4 BIT ALU design with vhdl code using structural XC3000A actel a1240
Contextual Info: LeonardoSpectrum Synthesis and Technology v1999.1 Copyright Copyright 1991-1999 Exemplar Logic, Inc., A Mentor Graphics Company All Rights Reserved Trademarks Exemplar Logic and its Logo are trademarks of Exemplar Logic, Inc. LeonardoSpectrum™, LeonardoInsight™, FlowTabs™, HdlInventor™, SmartScripts™,

Actel

Abstract: CMOS OR Gates vq 44 quad flatpack 44 pin actel
Contextual Info: Addendum Accelerator Series FPGAs – ACT 3 Family The Ordering Information was updated to include RoHS information. A114100 A _ 1 RQ G 208 C Application Temperature Range C = Commercial (0 to +70˚C) I = Industrial (–40 to +85˚C) M = Military (–55 to +125˚C)

Contextual Info: ACT 3 3.3 Volt Field Programmable Gate Arrays F eatu res • 3.3V Functionality specifications fully compliant with JEDEC Replaces up to 250 TTL Packages Replaces up to 100 20-pin PAL Packages • Highly Predictable Performance with 100% Automatic Placement and Routing

32 Bit loadable counter

Abstract: ACT 3 accelerator FPGAs Actel Accelerator fpga datasheet DLM8 A1415 A1425 A1425A-3 A1440 A1460 175-PIN
Contextual Info: Accelerator Series FPGAs – ACT 3 Family Features • Replaces up to twenty 32 macro-cell CPLDs • Up to 10,000 Gate Array Equivalent Gates up to 25,000 equivalent PLD Gates • Replaces up to one hundred 20-pin PAL Packages • Up to 1153 Dedicated Flip-Flops

DLM8

Abstract: dfm8
Contextual Info: ACT 3 3.3 Volt Field Programmable Gate Arrays Features • • • • • • • • • 3.3V Functionality fully compliant with JEDEC specifications • Highly Predictable Performance with 100% Automatic Placement and Routing • 13 ns Clock-to-Output Times

Pl84

Contextual Info: Component Selector Guide April 1999 1999 Actel Corporation 1 Package Speed Grade SRAM Bits JTAG I/O 3.3 Volt 5 Volt PCI 5.0 Volt Tolerant at 3.3V VQ100 Std, –1, –2, –3 78 8,000 256 512 — — Yes Yes — — Yes PQ208 Std, –1, –2, –3 129 8,000

SM84PG-ACTEL

Abstract: A1240XL SM-10 SM68P-ACTEL SM160PQ-ACTEL SM132CQ-ACTEL A42MX36 1200XL SM176TQ-ACTEL A1010DXV
Contextual Info: Silicon Sculptor - Adapter Module Selector Guide Page 1 of 3 BACK Adapter Module Selector Guide Package Types: BG - Plastic Ball Grid Array CQ - Ceramic Quad Flat Pack PG - Ceramic Pin Grid Array PL - Plastic J-Leaded Chip Carrier Device Type A1010B A1010B