A11I Search Results

a1310a

Contextual Info: SN54ABTH18504A, SN54ABTH182504A, SN74ABTH18504A, SN74ABTH182504A SCAN TEST DEVICES WITH 20-BIT UNIVERSAL BUS TRANSCEIVERS _ _ SCBS165A-AUGUST 1 9 9 3 - REVISED AUGUST 1994 Members of the Texas Instruments

LVTH18514

Abstract: LVTH182514 SN54LVTH182514 SN54LVTH18514 SN74LVTH182514 SN74LVTH18514 78 hkc
Contextual Info: SN54LVTH18514, SN54LVTH182514, SN74LVTH18514, SN74LVTH182514 3.3-V ABT SCAN TEST DEVICES WITH 20-BIT UNIVERSAL BUS TRANSCEIVERS SCBS670C – AUGUST 1996 – REVISED MARCH 1998 D D D D D D D D D D Members of the Texas Instruments TI SCOPE  Family of Testability Products

KVT 20 Temperature

Abstract: SN54ABTH182504A SN54ABTH18504A SN74ABTH182504A SN74ABTH18504A
Contextual Info: SN54ABTH18504A, SN54ABTH182504A, SN74ABTH18504A, SN74ABTH182504A SCAN TEST DEVICES WITH 20-BIT UNIVERSAL BUS TRANSCEIVERS - S C B S 1 6 5 A - AU G U S T 1993 - REVISED AU G U S T 1994 ' Members of the Texas Instruments

EN 60352

Abstract: FLASH PRO MC52-MC31
Contextual Info: AMDÌ1 P R E L IM IN A R Y A m 1 8 6 E S /E S L V a n d A m 188™ E S /E S L V High Performance, 80C186-/80C188-Compatible and 80L186-/80L188-Compatible, 16-Bit Embedded Microcontrollers DISTINCTIVE CHARACTERISTICS • ■ E86™ family 80C186-/188- and 80L186-/188compatible microcontrollers with enhanced bus

Contextual Info: HY51V16100B Series -HYUNDAI 16M x 1-bit CMOS DRAM PRELIMINARY DESCRIPTION The HY51V16100B is the new generation and fast dynamic RAM organized 16,777,216 x 4-bit. The HY51V16100B utilizes Hyundai's CMOS silicon gate process technology as well as advanced circuit techniques

Contextual Info: SN54LVTH18504A, SN54LVTH182504A, SN74LVTH18504A, SN74LVTH182504A 3.3-V ABT SCAN TEST DEVICES WITH 20-BIT UNIVERSAL BUS TRANSCEIVERS SCBS667B - JULY 1996 - REVISED JUNE 1997 Members of the Texas Instruments SCOPE Family of Testability Products Members of the Texas Instruments

Contextual Info: Advance Data Sheet June 1992 ^ B A T s iT ^ ^ ^ M ic ro e le c tro n ic s ATT3000 Series Military Field-Programmable Gate Arrays Features • User-programmable gate array ■ Low-power, CMOS, static memory technology ■ Standard product; 100% factory tested

Contextual Info: IM P O R T A N T N O TIC E All new designs should use XC3000A or XC3100A. Information on XC3000 and XC3100 is presented here as reference for existing designs. £ x il in x XC3000, XC3000A, XC3000L, XC3100, XC3100A Logic Cell Array Families Product Description

Contextual Info: SN54ABT18504, SN74ABT18504 SCAN TEST DEVICES WITH 20-BIT UNIVERSAL BUS TRANSCEIVERS SCBS108B – AUGUST 1992 – REVISED JUNE 1993 • • • • • • • Members of the Texas Instruments SCOPE  Family of Testability Products Members of the Texas Instruments

SN54ABT18504

Abstract: SN74ABT18504
Contextual Info: SN54ABT18504, SN74ABT18504 SCAN TEST DEVICES WITH 20-BIT UNIVERSAL BUS TRANSCEIVERS SCBS108B – AUGUST 1992 – REVISED JUNE 1993 • • • • • • • Members of the Texas Instruments SCOPE  Family of Testability Products Members of the Texas Instruments

Contextual Info: SN54ABT18504, SN74ABT18504 SCAN TEST DEVICES WITH 20-BIT UNIVERSAL BUS TRANSCEIVERS SCBS108B – AUGUST 1992 – REVISED JUNE 1993 • • • • • • • Members of the Texas Instruments SCOPE  Family of Testability Products Members of the Texas Instruments

Contextual Info: SN54ABT18504, SN74ABT18504 SCAN TEST DEVICES WITH 20-BIT UNIVERSAL BUS TRANSCEIVERS SCBS108B – AUGUST 1992 – REVISED JUNE 1993 • • • • • • • Members of the Texas Instruments SCOPE  Family of Testability Products Members of the Texas Instruments

KM44C16100AS

Contextual Info: K M 4 4 C 161 OOAS CMOS DRAM ELECTRONICS 1 6 M x 4 B i t CMOS Dynamic RAM with Fast Page Mode DESCRIPTION This is a family of 16,777,216 x 4 bit Fast Page Mode CMOS DRAMs. Fast Page Mode offers high speed random access of memory cells within the same row. Access time -5, -6, or -7 , package type(SOJ or

IDC7X2

Abstract: PLM250S40T1 73D34 Y4A16 12062R104K9BB2 746X101 ADSP-21160MKB-80X CR21-4701F-T FER002 TRANSISTOR c104
Contextual Info: ADSP-21160 EZ-KIT Lite Evaluation System Manual Revision 4.0, January 2005 Part Number 82-000513-01 Analog Devices, Inc. One Technology Way Norwood, Mass. 02062-9106 a Copyright Information 2005 Analog Devices, Inc., ALL RIGHTS RESERVED. This document may not be reproduced in any form without prior, express written

1510135UG3

Abstract: 1510135UR3 1510135UY3 1510135XXX
Contextual Info: 16 max. o Lampensockel nach DIN EN 60061-1: SX6s / Lamp base in accordance to DIN EN 60061-1: SX6s Elektrische und optische Daten sind bei einer Umgebungstemperatur von 25°C gemessen. Electrical and optical data are measured at an ambient temperature of 25°C.

SN54ABT18504

Abstract: SN74ABT18504 A14O
Contextual Info: SN54ABT18504, SN74ABT18504 SCAN TEST DEVICES WITH 20-BIT UNIVERSAL BUS TRANSCEIVERS SCBS108B – AUGUST 1992 – REVISED JUNE 1993 • • • • • • • Members of the Texas Instruments SCOPE  Family of Testability Products Members of the Texas Instruments

Contextual Info: SN54LVTH18504A, SN54LVTH182504A, SN74LVTH18504A, SN74LVTH182504A 3.3-V ABT SCAN TEST DEVICES WITH 20-BIT UNIVERSAL BUS TRANSCEIVERS SCBS667B – JULY 1996 – REVISED JUNE 1997 D D D D D D D Members of the Texas Instruments SCOPE  Family of Testability Products

TME 57

Abstract: DQ131 45VCci a81s DQ111 A5173
Contextual Info: m EDI9F232256BC 1 2x256Kx32 SRAM Module x ELECTRONIC DESIGNI N C. 2x256Kx32 Static RAM CMOS, High SpeedModule Features The EDI9F232256B is a high speed 16 megabit Static RAM module organized as 2x256K words by 32 bits. This module is constructed from sixteen 256Kx4 Static RAMs in SOJ

M3P1

Abstract: KD 2107 X3032
Contextual Info: XC3000, XC3000A, XC3000L, XC3100, XC3100A Logic Cell Array Families £ Product Description Features • Complete XACT Development System - Schematic capture, automatic place and route - Logic and timing simulation - Interactive design editor for design optimization

Contextual Info: P r e l im in a r y P r o d u c t S p e c if ic a t io n 9 O _i •m Z 8 E 0 0 0 N F e a t u r e -R ic h Z 8 p l u s O n e -T im e P r o g r a m m a b l e M ic r o c o n t r o l l e r F o r S m a l l P r o d u c t io n R u n s Totally Logical FEATURES ROM

Contextual Info: im A p p l ic a t io n N o t e A V A I L A B L E AN95 • AN103 • AN107 X84161/641/129 16K/64K/128K MPS EEPROM |jPort Saver EEPROM FEATURES DESCRIPTION • Up to 10MHz data transfer rate • 25ns Read Access Time • Direct Interface to Microprocessors and

A18I

Contextual Info: SN54ABTH18504A, SN54ABTH182504A, SN74ABTH18504A, SN74ABTH182504A SCAN TEST DEVICES WITH 20-BIT UNIVERSAL BUS TRANSCEIVERS SCBS165C – AUGUST 1993 – REVISED JULY 1996 D D D D D D D D Members of the Texas Instruments SCOPE  Family of Testability Products

Contextual Info: SN54ABTH18504A, SN54ABTH182504A, SN74ABTH18504A, SN74ABTH182504A SCAN TEST DEVICES WITH 20-BIT UNIVERSAL BUS TRANSCEIVERS SCBS165C – AUGUST 1993 – REVISED JULY 1996 D D D D D D D D Members of the Texas Instruments SCOPE  Family of Testability Products

Contextual Info: SN54ABT18504, SN74ABT18504 SCAN TEST DEVICES WITH 20-BIT UNIVERSAL BUS TRANSCEIVERS SCBS108B – AUGUST 1992 – REVISED JUNE 1993 • • • • • • • Members of the Texas Instruments SCOPE  Family of Testability Products Members of the Texas Instruments