A0A23 Search Results

AMD Series D flash memory card

Contextual Info: AMDËI AmCOOXCFLKA 1,2, or 4 Megabyte 5.0 Volt-only “C-Series” Flash Memory PC Card DISTINCTIVE CHARACTERISTICS • High performance — 150 ns maximum access time ■ Single supply operation — 5.0 V ± 5% for read, write and erase ■ CMOS low power consumption

0x1000000

Abstract: RF cmos LNA ATSAM3S8CA-AU CI 4046 RS232 Wireless Bluetooth Transceiver 0x4143 ATSAM3S l 7135 SD812 DSAASSA000857.
Contextual Info: Features • Core • • • • • • • – ARM Cortex®-M3 revision 2.0 running at up to 64 MHz – Memory Protection Unit MPU – Thumb®-2 instruction set Pin-to-pin compatible with AT91SAM7S legacy products (64-pin versions), SAM3S4/2/1 products

tms 3617

Abstract: TMS 3511 NS TMP1962F-10
Contextual Info: TMP1962F10AXBG 32-Bit RISC Microprocessor TX19 Family TMP1962F10AXBG 1. Features The TX19 is a family of high-performance 32-bit microprocessors that offers the speed of a 32-bit RISC solution with the added advantage of a significantly reduced code size of a 16-bit architecture. The instruction set

Contextual Info: 47E D SIEMENS • fi23SbOS 0031bl0 <3 ■ SIEG SIEMENS AKTIENGESEL LSCHAF SAB 82C212 Page/Interleave Memory Controller of Siemens PC-AT Chipset Advance Information 157 3.90 M7E » I fl2 3 5 b 0 5 G 0 3 1 b ll SIEMENS AKTIENGESELLSCHAF □ ■ S IE G SAB 82C212

nec v53 cpu

Contextual Info: NEC NEC Electronics Inc. Description The V53” is a high-speed, high-integration 16-bit CMOS microprocessor with a CPU that is object and source code compatible with the V20 /V30®. Integrated on the same die is a 4-channel DMA controller, a UART, three

D70236

Contextual Info: NEC NEC Electronics Inc. Description The V53 is a high-speed, high-integration 16-bit CMOS microprocessor with a CPU that is object and source code compatible with the V20 /V30®. integrated on the same die is a 4-channel DMA controller, a UART, three timer/counters, an interrupt controller, a refresh

W29GL256P

Abstract: W29GL256
Contextual Info: W29GL256P 256M-BIT 3.0-VOLT PARALLEL FLASH MEMORY WITH PAGE MODE W29GL256P Table of Contents 1 2 3 4 5 6 7 GENERAL DESCRIPTION . 1 FEATURES . 1

AEN 6

Abstract: 80C286 80C86 80C88 82C237 82C37A 82C82 CP82C237 CS82C237 IP82C237
Contextual Info: 82C237 CMOS High Performance Programmable DMA Controller March 1997 Features Description • Fully Compatible with Intersil 82C37A - 82C237 May be Used in 8MHz and 12.5MHz 82C37A Sockets The 82C237 is a modified version of the 82C37A. The 82C237 is fully software and pin for pin compatible with the

MB86686A

Contextual Info: MB86683B Edition 1.0 1. OVERVIEW The NTC is a full duplex device which can be used to provide broadband termination functions in a variety of applications. Its primary use is for terminating the user or network ends of a user-network interface based on ITU-T,

Contextual Info: Features • Incorporates the ARM7TDMI ARM Thumb® Processor Core - High-performance 32-bit RISC Architecture - High-density 16-bit Instruction Set - Leader in MIPS/Watt - Embedded ICE In Circuit Emulation • 4K Bytes Internal RAM • Fully Programmable External Bus Interface (EBI)

STP3010

Abstract: SUN HOLD ras 0910 ras 0910 STP3010PGA display duplo 27C256 MARK 4C7 BT467
Contextual Info: STP3010 July 1997 TGX DATA SHEET TurboGX Graphics Accelerator DESCRIPTION The STP3010 employs over 128,000 gates and implements an extended superset of previous GX architectures. This chip provides an integral SBus interface, VRAM video random-access memory controller, a high-performance math engine, plus a high-performance rendering (or drawing) engine. A complete graphics

65C22S

Abstract: CMOS 65C02 65C265S
Contextual Info: WDC THE WESTERN DESIGN CENTER, INC. W65C265S IN TR O D U C TIO N The W DC W 65C265S microcomputer is a com plete fully static 16-bit computer fabricated on a single chip using a H i-Rel low power CMOS process. The W 65C265S complements an established and growing line

s027a

Abstract: tms320c32 read TMS320C32 C3240
Contextual Info: TMS320C32 DIGITAL SIGNAL PROCESSOR I S P R S027A - JANUARY 1995 - R E VIS ED A U G U S T 1995 Two 256 x 32-Bit Single-Cycle Dual-Access On-Chip RAM Blocks Flexible Boot-Program Loader On-Chip Memory-Mapped Peripherals: - One Serial Port - Two 32-Bit Timers

Contextual Info: Edition 2.0 1. MB86687A OVERVIEW The ALC simultaneously supports autonomous segmentation and reassembly of user data packets on up to 1024 virtual circuits VCs . User data packets are transferred to and from shared data structure memory using a high speed intelligent DMA

b2x 85C

Abstract: AT91M63200
Contextual Info: Features • Utilizes the ARM7TDMI ARM Thumb® Processor Core • • • • • • • • • • • • • • • • • – High-performance 32-bit RISC Architecture – High-density 16-bit Instruction Set – Leader in MIPS/Watt – Embedded ICE In-Circuit Emulation

Contextual Info: March 1994 Edition 1.0 FUJITSU DATA SHEET MB98A 8113X-/8 123x- / 8 1 33x- / 8 143x-20 FLASH MEMORY CARD FLASH ERASABLE AND PROGRAMMABLE MEMORY CARD 2M / 4M / 8M / 1 6M-BYTE The Fujitsu MB98A8113x, MB98A8123x, MB98A8133x and MB98A8143x are electrically erasable and programmable Flash memory cards capable of storing

ntc 47d

Abstract: ti75b NTC 4.7d -7 BIG IP F5 D30 ntc 5 om d21 ufc 101 vc
Contextual Info: MB86683B Edition 2.0 1. OVERVIEW The NTC is a full duplex device which can be used to provide broadband term ination functions in a variety of applications. Its primary use is for term inating the user or network ends of a user-netw ork interface based on ITU-T,

S30MS-P

Abstract: AMB128 S29WS-P S75WS256PEFJF5 S75WS256PEFKFF S75WS-P UtRAM Density Spansion NAND Flash DIE MS512P
Contextual Info: S75WS-P based MCP/POP Products 1.8 Volt-only x16 Simultaneous Read/Write, Burst Mode Flash NOR Interface S30MS-P (NAND Interface) ORNAND Flash pSRAM Type 2 S75WS-P based MCP/POP Products Cover Sheet Data Sheet (Advance Information) Notice to Readers: This document states the current technical specifications regarding the Spansion

11061

Abstract: SAM3S Microcontroller Series Schematic Check List at91sam3s atmel SAM3S atmel dac adc sam3 arm SAM3S-EK
Contextual Info: SAM3S Microcontroller Series Schematic Check List 1. Introduction This Application Note is a schematic review check list for systems embedding Atmel’s SAM3S series of ARM Cortex -M3, Thumb®2-based microcontrollers. It gives requirements concerning the different pin connections that must be considered before starting any new board design and describes the minimum hardware

a6583

Abstract: CR10 J-STD-020B M30L0R8000B0 M30L0R8000T0
Contextual Info: M30L0R8000T0 M30L0R8000B0 256 Mbit 16Mb x16, Multiple Bank, Multi-Level, Burst 1.8V Supply Flash Memory FEATURES SUMMARY • ■ ■ ■ ■ ■ ■ ■ ■ ■ SUPPLY VOLTAGE – VDD = 1.7V to 2.0V for program, erase and read – VDDQ = 1.7V to 2.0V for I/O Buffers

Atmel sam3x smc sram

Contextual Info: Features • Core • • • • • • • – ARM Cortex®-M4 with a 2 Kbytes cache running at up to 120 MHz – Memory Protection Unit MPU – DSP Instruction Set – Thumb®-2 instruction set Pin-to-pin compatible with SAM3N, SAM3S products (64- and 100- pin versions) and

Contextual Info: Features • Utilizes the ARM7TDMI ARM® Thumb® Processor Core • • • • • • • • • • • • • • • • – High-performance 32-bit RISC Architecture – High-density 16-bit Instruction Set – Leader in MIPS/Watt – Embedded ICE In-circuit Emulation

TLCS-90

Abstract: 0P-61F "PWM Controllers" UC 3842 FMN5 lear layout of 4 channel 315 rf transmitter TMP91C820AF tlp 748 ah202f ay- 8500 system philips semiconductor data handbook
Contextual Info: Data Book 16bit Micro controller TLCS-900/L1 series TMP91C820AF Rev. 2.5 07/December/2001 contents - Contents -TLCS-900/L1 LSI DEVICES TMP91C820AF 1. 2. Outline and Device Characteristics Pin Assignment and Pin Functions 2.1 Pin Assignment Diagram

samsung electronics ba41

Abstract: BA175
Contextual Info: Preliminary FLASH MEMORY K8C56 57 15ET(B)M 256Mb M-die MLC NOR Specification INFORMATION IN THIS DOCUMENT IS PROVIDED IN RELATION TO SAMSUNG PRODUCTS, AND IS SUBJECT TO CHANGE WITHOUT NOTICE. NOTHING IN THIS DOCUMENT SHALL BE CONSTRUED AS GRANTING ANY LICENSE,