VCC02 Search Results

Contextual Info: DALLAS DS122?7 s e m ic o n d u c to r K ickstarter Chip PIN ASSIGNMENT FEATURES • Provides step-up regulation and microenergy management for battery-operated systems VCC02 £ 1 VCC03 [ 2 VCC01 [ 3 • Converts +3V to +6V DC input power source to +5V DC out for system power

DIODE 1N418

Abstract: 1N5418V Nytronics PL B64290-K38 nytronics delay
Contextual Info: DALLAS SEMICONDUCTOR DS1227 Kickstarter Chip PIN ASSIGNMENT FEATURES • Provides step-up regulation and microenergy management for battery-operated systems VCC02 £ 1 VCC03[ 2 VCCOI [ 3 pwron[ 4 VDCO[ S • Converts +3V to +6V DC input power source to +5V

Contextual Info: DS1227 PRELIMINARY DALLAS SEMICONDUCTOR DS1227 Kickstarter Chip FEATURES PIN DESCRIPTION . Provides step-up regulation and microenergy management for battery-operated systems • Converts +3V to +6V DC input power source to +5 V DC out for system power VCC02 C 1

10ST10

Abstract: lq55
Contextual Info: Ordering n u m b e r:EN4794B CMOS LSI LC3564S, SS, SM, ST-70/85/10 64K 8192wordsX8 bits SRAM Overview The LC3564S, LC3564SS, LC3564SM, and LC3564ST are asynchronous silicon gate CMOS static RAMs with an 8192-word X 8-bit organization. These SRAMs are full CMOS type

IEC134

Abstract: TDF8704 TDF8704T x90 v7
Contextual Info: Philips Semiconductors Product specification 8-bit high-speed analog-to-digital converter TDF8704 FEATURES APPLICATIONS • 8-bit resolution • General purpose high-speed analog-to-digital conversion for extended temperature applications • Sampling rate up to 50 MHz

8051 code assembler for data encryption standard

Abstract: t3th HM628128 8051 coding for data encryption standard DS5000 DS5001FP DS5002FP DS5002FP-12 DS5002FP-16 DS5002FPM-12
Contextual Info: DS5002FP ti4 E D 2hmi3D DALLAS □D D7 S1 S SEMICONDUCTOR DALLAS SEMICONDUCTOR PIN ASSIGNMENT • 8051 compatible uC for secure/sensitive applications 8 8 B ^ Ù5.,_ S ° Access 32, 64, or 128K bytes of nonvolatile SRAM for program and/or data storage - In-system programming via on-chip serial port

SN74LV14

Abstract: schmitt-trigger hex inverter texas instruments
Contextual Info: SN74LV14 HEX SCHMITT-TRIGGER INVERTER SCLS187A-FEBRUARY 1993- REVISED JULY1995 D, DB, OR PW PACKAGE TOP VIEW • EPIC (Enhanced-Performance Implanted CMOS) 2-|i Process • Typical • • • • Vq lp (Output Ground Bounce) 1A [ 1 < 0.8 V at VCC = 3.3 V, TA = 25°C

1S26

Abstract: P4C116 P4C116L AD5e
Contextual Info: PERFORMANCE SEMICONDUCTOR SDE V • 7 0 b 2 5 cl7 0001780 3äb * P S C P4C116/P4C116L ULTRA HIGH SPEED 2K x 8 STATIC CMOS RAMS SCRAMS FEATURES ■ Full CMOS, 6T Cell Single 5V±10% Power Supply ■ High Speed (Equal Access and Cycle Times) -12,15/20/25/35 ns (Commercial)

Contextual Info: SN74LVC32 QUADRUPLE 2-INPUT POSITIVE-OR GATE SCAS286B - JANUARY 1993 - REVISED JULY 19SS | D, DB, OR PW PACKAGE TOP VIEW • EPIC (Enhanced-Performance Implanted CMOS) Submicron Process • ESD Protection Exceeds 2000 V Per MII-STD-883C, Method 3015; Exceeds 200 V

54LV373

Contextual Info: SN54LV373, SN74LV373 OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS _SCLS196C - FEBRUARY 1993 - REVISED APRIL 1996 EPIC Enhanced-Performance Implanted CMOS 2-\i Process SN54LV373 . . . J OR W PACKAGE SN74LV373. . . DB, DW, OR PW PACKAGE

ic 74 LS 138 DECODER

Contextual Info: TOSHIBA TC74LCX138F/FN/FS Low-Vottage Quad 3-TO-8 LINE DECODER with 5V Tolerant Inputs and Outputs The TC74LCX138 is a high performance C M O S 3-to-8 DECODER. Designed for use in 3.3 Volt systems, it achieves high speed operation while maintaning the C M O S low power

Contextual Info: •HYUNDAI HYM532124A W-Series 1M x 32-bit CMOS DRAM MODULE with EXTENDED DATA OUT DESCRIPTION The HYM532124A is a 1M x 32-bit EDO mode CMOS DRAM module consisting of two HY5118164B in 42/42 pin S O J or 44/50 pin TSOPII on a 72 pin glass-epoxy printed circuit board. Two 0.01 nF decoupling capacitors are

Contextual Info: Intel386 EX EMBEDDED MICROPROCESSOR 1.0 INTRODUCTION The Intel386™ EXTB embedded processor operates at 20 or 25 MHz at 3 Volts nominal. The Intel386 EXTC embedded processor operates at 25 or 33 MHz at 5 Volts. In this datasheet, “Intel386 EX processor” refers to

ICE 3BO 365

Abstract: SN54ABTE16246 SN74ABTE16246 VME64
Contextual Info: SN54ABTE16246, SN74ABTE16246 11-BIT INCIDENT-WAVE SWITCHING BUS-CONTROL TRANSCEIVERS WITH 3-STATE AND OPEN-COLLECTOR OUTPUTS SC B S 22 7 B -JU L Y 1 9 9 3 - REVISED AUGUST 1994 Supports the VME64 ETL Specification Reduced, TTL-Compatible, Input Threshold Range

MC10H334

Abstract: MC10H334FN MC10H334L MC10H334P lm 738 CDIP-20
Contextual Info: MC10H334 Quad Bus Driver/Receiver with Transmit and Receiver Latches The MC10H334 is a Quad Bus Driver/Receiver with transmit and receiver latches. When disabled, OE = high the bus outputs will fall to –2.0 V. Data to be transmitted or received is passed through its

CSB503F30

Abstract: TA8845BN V700
Contextual Info: TOSHIBA TA8845BN TOSHIBA BIPOLAR LINEAR INTEGRATED CIRCUIT SILICON MONOLITHIC TA8845BN BUS CONTROL VIDEO, CHROMA, AND SYNC. SIGNAL PROCESSING IC FOR TV The TA8845BN has various function to be controlled via l2C bus as shown by a table of bus control map in

8051 code assembler for data encryption standard

Abstract: ba15 diode interfacing 8051 with eprom and ram nv ram data sheet BA10 BA11 BA12 DS5002FP
Contextual Info: DS5002FP DS5002FP Secure Microprocessor Chip FEATURES PIN ASSIGNMENT BA11 P0.5/AD5 PE1 P0.6/AD6 BA10 P0.7/AD7 CE1 NC CE1N BD7 ALE BD6 NC BD5 P2.7/A15 BD4 • 8051 compatible microprocessor for secure/sensitive applications – Access 32K, 64K, or 128K bytes of nonvolatile

Contextual Info: DS1613C DALLAS s e m ic o n d u c to r FEATURES DS1613C Partitionable 256K SmartSocket PIN ASSIGNMENT • A c c e p ts s ta n d a rd 3 2 K x 8, C M O S s ta tic R A M s • E m b e d d e d lith iu m e n e rg y cell re ta in s R A M d a ta • U n c o n d itio n a lly w rite p ro te c ts all o f m e m o ry w h e n

Contextual Info: DALLAS s e m ic o n d u c to r DS1336 Afterburner Chip PIN ASSIGNMENT FEATURES • Provides power switching of up to 1.5 amps at voltages between 3 and 5 volts • Five separate power switches • Selectable battery switches battery-backed systems for use

Contextual Info: Order this data sheet by MC10H680/D MOTOROLA SEMICONDUCTOR TECHNICAL DATA MC10H680 MC100H680 4-Bit Differential ECL Bus to TTL Bus Transceiver • Differential ECL Bus 25 £2 I/O Ports • High Drive TTL Bus I/O Ports • Extra TTL and ECL Power/Ground Pins to Minimize Switching Noise

Contextual Info: PRE LIM IN AR YMarch 1996 Edition 2.2 FUJITSU PRODUCT PROFILE SHEET MB8 1 1 6 1 6 0 A - 6 0 /- 7 0 CMOS 1M X 16BIT FAST PAGE MODE DYNAMIC RAM CMOS 1,048,576 x 16BIT Fast Page Mode Dynamic RAM The Fujitsu MB8116160A is a fully decoded CMOS Dynamic RAM DRAM that contains

Contextual Info: DALLAS DS229 Triple RS—232 Transmitter/Receiver s e m ic o n d u c to r FEATURES PIN ASSIGNMENT • Compatible with DS1229 • 5V operation • 20-pin DIP or SOIC package • 20-pin TSSOP package for height restricted applica­ tions • Operate from single +5V power

2SC711

Abstract: 2SC711 equivalent 2SC711 F 2SC711 D m5120 M51203 12 v to 240 v circuit M51203FP M51203TL MS1203
Contextual Info: MITSUBISHI <LINEAR ICs> M 51203TL,FP VOLTAGE COMPARATOR DESCRIPTION PIN CONFIGURATION TOP VIEW The M51203 is a sem iconductor integrated circ u it for a voltage com parator tha t operates from a single power supply. Especial­ J ] GND ly the M51203 has superiority as to ch a racteristics of input

Contextual Info: SN74LVCR2245A OCTAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS SCASS81C- NOVEMBER 1986 - REVISED JANUARY 1998 • EPICrM Enhanced-Performance Implanted CMOS Submicron Process • All Outputs Have Equivalent 26-Q Series Resistors, So No External Resistors Are Required