PUMA67 Search Results

4000B

Abstract: 4000A 31 transistor CS4 ANH005A 4000A 31 1
Contextual Info: PUMA67 Pinout EEPROM Summary One of the key features of the PUMA Pinned Uncommitted Memory Array product range is its well defined upgrade path. Pin Definition Assuming the relevant address lines are routed on the system board, upgrade may be achieved simply by removing a device and replacing it with the next generation part.

Contextual Info: 32Kx 32 EEPROM Module mosaic PUMA67E1001/A-90/12 Issue4.0: February 1996 semiconductor, inc. Description PUMA67E1001/AisalMbitCMOS EEPROM module in a JEDEC 68 pin J leaded Ceramic Surface Mount Substrate. Accesstimes of90and 120 ns are available.Theoutputwidth is

67S4000A

Abstract: 3D-30 A45 so
Contextual Info: mosaic 128KX 3 2 SRAM Module PUMA67S4000/A-45/55/70 semiconductor, inc. Issue 4.0: March 1996 4,194,304 bit CMOS High Speed Static RAM Description The PUMA67S4000/A is a 4Mbit CMOS High Speed Static RAM organised as 128kx 32 in a JEDECJ-leaded Ceramic Surface Mount

Contextual Info: 128Kx 32 EEPROM Module mosaic PUMA67E4001/A-12/15/17/20 Issue4.2 : June 1996 semiconductor, inc. Description 4,194,304bitCMOS EEPROM Module PUMA67E4001/Aisa4MbitCMOS EEPROM module in a JEDEC 68 pin J leaded Ceramic Surface Mount Substrate. Accesstimes of 120,150,170and200nsareavailable.The

pin configuration ic 7420

Abstract: PUMAS 7420 ic details pinout 7420 pin diagram ic 7420 4007A
Contextual Info: /2 ^ < ^ 128Kx 32 EEPROM Module mosaic semiconductor, inc. PUMA67E4007/A-15/17/20/25 Issue4.1 : June 1996 Description Features > The PUMA 67E4007/A is a 4M bit CMOS EEPROM in a JEDEC J-leaded Ceramic Surface Mount Substrate. The output width is user configurable as

pinout 7420

Contextual Info: 128Kx 32 EEPROM Module mosaic PUMA67E4005/A-15/17/20 Issue4.0 : October 1995 semiconductor, inc. Description 4 ,1 9 4 ,3 0 4 bit CMOS EEPROM Module The P U M A 6 7 E 4 0 0 5 /A is a 4M b it CMOS EEPROM module organised as 128k x 32 in a 6 8 pin JEDECJleaded Ceramic Surface Mount Substrate. The output

pin diagram ic 7420

Abstract: 7420 ic details
Contextual Info: /2 s Z — mosaic 512Kx 32 SRAM Module PUMA67S160CXM 25/35/45/55 Issue4.0 : January 1996 semiconductor, inc. Description The PUMA67S16000 is a 16M bit CMOS High Speed Static RAM organised as 512 kx 32 in a JEDECJ-leaded Ceramic Surface Mount Substrate. The output width is user configurable

d28 diode

Abstract: 4000B ANH003A D-13
Contextual Info: PUMA 67 / 77 Pinout SRAM Summary One of the key features of the PUMA Pinned Uncommitted Memory Array product range is its well defined upgrade path. Pin Definition Assuming the relevant address lines are routed on the system board, upgrade may be achieved by simply removing a device and replacing it with the next generation part.

Contextual Info: 128K x 32 EEPROM Module PUMA 2E4001 -12/15/20 PUMA 67E4001/A/B -12/15/20 PUMA 77E4001/A/B -12/15/20 Elm Road, West Chirton, North Shields, Tyne & Wear NE29 8SE, England Tel. +44 0191 2930500 Fax. +44 (0191) 2590997 Description Available in PGA (Puma 2), JLCC (Puma 67) and

P 600 I 1903

Abstract: moc 4-pin
Contextual Info: MOSAIC SEMICONDUCTOR INC hHE D • b a S B a ? 1! 000E057 SOS ■ M O C 128KX 32 EEPROM MODULE molate PUMA 67E4000X-15/20/25 Issue 1.2: Septembed 993 ADVANCE PRODUCT INFORMATION S e m ic o n d u c to r Inc " 4,194,304 bit MNOS High Speed EEPROM Features •

4006A Darfon

Abstract: 4006a 16006B 16006A ANH004A
Contextual Info: PUMA 67 / 77 Pinout FLASH Summary One of the key features of the PUMA Pinned Uncommitted Memory Array product range is its well defined upgrade path. Pin Definition Assuming the relevant address lines are routed on the system board, upgrade may be achieved by simply removing a device and replacing it with the next generation part.

Contextual Info: 128K x 32 FLASH MODULE m o l a t e PUMA 67F4000-15/20/25 Issue 1.1 : May 1994 AD VAN CE PR O D U C T INFORMATION Sem iconductor 4,194,304 bit CM O S FLASH Memory Module Pin Definition Features Fast access times of 150/200/250 ns. User Configurable as 32 /1 6 / 8 bit wide.

67E4001

Abstract: d29 08 E4001
Contextual Info: 128K x 32 EEPROM Module PUMA 2/67E4001/A/B -12/15/20 Issue 4.3 : January 2001 Elm Road, West Chirton, North Shields, Tyne & Wear NE29 8SE, England Tel. +44 0191 2930500 Fax. +44 (0191) 2590997 Description Available in PGA (Puma 2), and JLCC (Puma 67) footprints, the Puma *E4001 is a 4 Mbit EEPROM

D8-14

Abstract: 3D29
Contextual Info: * if 19« 512K x 32 FLASH MODULE molate PUMA 67F16000-15/20/25 Issue 1.1 : April 1992 ADVANCE PRODUCT INFORMATION S e m ic o n d u c t o r Inc. 16,777,216 bit CMOS FLASH Memory Module Pin Definition see also page 15. Features Fast Access Times of 150/200/250 ns.

Contextual Info: -> ; rm PUMA 67S4000 molate PUMA 67S4000-020/025/35 Issue 1.0 : March 1993 ADVANCE PRODUCT INFORMATION S e m ic o n d u c to r Pin Definition 4,194,304 bit CMOS High Speed Static RAM Features / » I 7 t S 4 } 2 W « 7 U < 6 M « 3 2 I1 DOC 10 D1C 11 02 C 12

Contextual Info: 128K x 32 EEPROM Module PUMA 2/67E4001/A/B -12/15/20 Issue 4.3 : January 2001 Description Available in PGA Puma 2 , and JLCC (Puma 67) footprints, the Puma *E4001 is a 4 Mbit EEPROM module user configurable as 128K x 32, 256K x 16 or 512K x 8. Available with access times of 120, 150

Contextual Info: 128K X 32 FLASH MODULE mol ai c PUMA 67F4000-15/20/25 Issue 1.0 : April 1993 ADVANCE PRODUCT INFORMATION r 4,194,304 bit CMOS FLASH Memory Module Pin Definition Features Fast access times of 150/200/250 ns. User Configurable as 32 /1 6 / 8 bit wide. Operating Power @ 1MHz 120 / 70 / 45 mW typical .

Contextual Info: 512K x 32 FLASH MODULE molate PUMA 67F16000-15/20/25 Issue 1.1 : April 1992 ADVANCE PRODUCT INFORMATION S em iconductor Inc. 16,777,216 bit CMOS FLASH Memory Module ^- Pin D efinition see also page 15. Features Fast Access Times of 150/200/250 ns. sa 2 Insn n

SRAM 6T

Abstract: MSM8128 "32K x 8" SRAM dil SRAM 35ns "32K x 8" SRAM PLCC 2035 puma 5 128k x 8 eeprom JLCC
Contextual Info: Part Numbering M S M 8512 SC X L MB - 10 1. 2. 3. 4. 1. 2. Speed 7. 6. 5. TECHNOLOGY 5. PINOUT ARRANGEMENT The memory technology is represented by a single character:- This field identifies the mechanical arrangement of the device pinout:- S D E U blank E

4000B

Abstract: ANH006A
Contextual Info: PUMA68 COTS Pinout SRAM Summary One of the key features of the PUMA (Pinned Uncommitted Memory Array) product range is its well defined upgrade path Pin Definition The PUMA68 product range provides a lower cost, footprint compatible, alternative to the well

77E4001

Abstract: pumas E4001
Contextual Info: 128K x 32 EEPROM Module PUMA 2E4001 -12/15/20 PUMA 67E4001/A/B -12/15/20 PUMA 77E4001/A/B -12/15/20 Elm Road, West Chirton, North Shields, Tyne & Wear NE29 8SE, England Tel. +44 0191 2930500 Fax. +44 (0191) 2590997 Description Available in PGA (Puma 2), JLCC (Puma 67) and

I2515

Contextual Info: 128K x 32 FLASH MODULE m o l a t e PUMA 67F4000-15/20/25 Issu e 1.1 : M ay 1994 ADVANCE PRO D U CT INFORMATION ^ •■ — S e m ic o n d u c to r Inc. 4,194,304 bit CMOS FLASH Memory Module Pin Definition Features Fast access times of 150/200/250 ns. User Configurable as