HC563 Search Results

HC573

Contextual Info: SGS-THOMSON I[LJ gTM«S M54/HC563 M54/74HC573 OCTAL D-TYPE LATCH WITH 3 STATE OUTPUT HC563 INVERTING - HC573 NON INVERTING • HIGHSPEED tpD = 13 ns (TYP. AT Vcc = 5 V ■ LOW POWER DISSIPATION Ice = 4 nA (MAX.) AT Ta = 25 °C ■ HIGH NOISE IMMUNITY V nih = V nil = 28 % V c c (MIN.)

hc373

Abstract: HC573 pin diagram of IC 74LS373 IC 74HC573 DAD 1000 IC 74LS373 HC563 hc533 c0ee 74HC373
Contextual Info: H S-CM O S” INTEGRATED CIRCUITS c a /-j-f -* \ - t /!- ' 0 y A ra 4 J ¿>< M54HCà73/563 ' : Z : c<- StSSIS/StÌ s ) & (' 7 i P R E LIM IN A R Y DATA OCTAL D-TYPE LATCH WITH 3-STATE OUTPUT HC373 NON INVERTING HC533 INVERTING HC563 INVERTING HC573 NON INVERTING

HC573

Contextual Info: r z 7 S G S -T H O M S O N M 54/74HC 563 ^ 7 # [ ¡ » lim t iC T ! « ! _ M 54/74HC 573 OCTAL D-TYPE LATCH WITH 3 STATE OUTPUT HC563 INVERTING - HC573 NON INVERTING . HIGHSPEED tPD = 13 ns TYP. AT Vcc = 5 V • LOW POWER DISSIPATION Ice = 4 nA (MAX.) AT TA = 25 °C

HC573

Abstract: HC563 M54HC573 M54HCXXXF1R M74HCXXXM1R 0-18v M74HC563
Contextual Info: M54/HC563 M54/74HC573 OCTAL D-TYPE LATCH WITH 3 STATE OUTPUT HC563 INVERTING - HC573 NON INVERTING . . . . . . . . HIGH SPEED tPD = 13 ns TYP. AT VCC = 5 V LOW POWER DISSIPATION ICC = 4 µA (MAX.) AT TA = 25 °C HIGH NOISE IMMUNITY VNIH = VNIL = 28 % VCC (MIN.)

hc251

Abstract: dual schmitt-trigger inverters
Contextual Info: Contents HC/HCT Gates/MSI/Octals ’HCOO ’HCTOO ’HC02 'HCT02 ’HC03 ’HC04 ’HCU04 'HCT04 'HC05 'HC08 'HCT08 'HC10 ’HC11 ’HC14 ’HCT14 'HC20 'HC21 'HC27 ’HC32 ’HCT32 ’HC42 ’HC74 ’HCT74 'HC86 'HC112 'HC125 'HCT125 'HC126 ’HC132 ’HC138

74HC4096

Abstract: EQUIVALENT TIMER IC WITH CD 4060 rs flip-flop IC 7400 C4050A shiftregister PIPO C148A LS 7476 L1AA C4051A LS294
Contextual Info: Selection Guide C2MOS Logic TC74HC/HCT Series 2. High Speed CMOS Selection Guide GATE NAND HCOOA NOR AND OR INVERTER, BUFFER EXCLUSIVE OR/NOR SC HM ITT TRIGGER HC02A HC08A H C31A H C04A H C86A H C14A H C51A H C4049A M ULTI FUNCTION LEVEL SHIFTER HCTOOA HCT02A

Contextual Info: [ /Title CD74H C533, CD74H CT533, CD74H C563, CD74H CT563 /Subject (High Speed CD54/74HC533, CD54/74HCT533, CD54/HC563, CD74HCT563 Data sheet acquired from Harris Semiconductor SCHS187A January 1998 - Revised May 2000 High Speed CMOS Logic Octal Inverting

74hc533

Abstract: CD74HCT563 HC373 HC563 HCT373 c533 DIODE
Contextual Info: [ /Title CD74H C533, CD74H CT533, CD74H C563, CD74H CT563 /Subject (High Speed CD54/74HC533, CD54/74HCT533, CD54/HC563, CD74HCT563 Data sheet acquired from Harris Semiconductor SCHS187A January 1998 - Revised May 2000 High Speed CMOS Logic Octal Inverting

CD74HCT533E

Contextual Info: HARRIS s e m i c o n d u c t o r CD74HC533, CD74HCT533, HC563, CD74HCT563 January 1998 High Speed CMOS Logic Octal Inverting Transparent Latch, Three-State Outputs Features Description • Common Latch-Enable Control The Harris CD74HC533, CD74HCT533, HC563, and

Contextual Info: [ /Title CD74H C533, CD74H CT533, CD74H C563, CD74H CT563 /Subject (High Speed CD54/74HC533, CD54/74HCT533, CD54/HC563, CD74HCT563 Data sheet acquired from Harris Semiconductor SCHS187C January 1998 - Revised July 2003 High-Speed CMOS Logic Octal Inverting

Contextual Info: HC563, HC563 OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS SCLS145C – DECEMBER 1982 – REVISED MARCH 2003 Typical tpd = 21 ns ±6-mA Output Drive at 5 V Low Input Current of 1 µA Max Bus-Structured Pinout HC563 . . . FK PACKAGE TOP VIEW

Contextual Info: [ /Title CD74H C533, CD74H CT533, CD74H C563, CD74H CT563 /Subject (High Speed CD54/74HC533, CD54/74HCT533, CD54/HC563, CD74HCT563 Data sheet acquired from Harris Semiconductor SCHS187C January 1998 - Revised July 2003 High-Speed CMOS Logic Octal Inverting

Contextual Info: [ /Title CD74H C533, CD74H CT533, CD74H C563, CD74H CT563 /Subject (High Speed CD54/74HC533, CD54/74HCT533, CD54/HC563, CD74HCT563 Data sheet acquired from Harris Semiconductor SCHS187C January 1998 - Revised July 2003 High-Speed CMOS Logic Octal Inverting

CD74HCT563

Abstract: HC373 HC563 HCT373 74hc533
Contextual Info: [ /Title CD74H C533, CD74H CT533, CD74H C563, CD74H CT563 /Subject (High Speed CD54/74HC533, CD54/74HCT533, CD54/HC563, CD74HCT563 Data sheet acquired from Harris Semiconductor SCHS187C January 1998 - Revised July 2003 High-Speed CMOS Logic Octal Inverting

TDA0161 equivalent

Abstract: 1N3393 BDX54F equivalent byt301000 bux transient voltage suppressor ST90R9 ua776mh sgs 2n3055 Transistor morocco mje13007 inmos transputer reference manual
Contextual Info: SHORTFORM 1995 NOVEMBER 1994 USE IN LIFE SUPPORT DEVICES OR SYSTEMS MUST BE EXPRESSLY AUTHORIZED SGS-THOMSON PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF SGS-THOMSON Microelectronics. As used herein:

CD74HCT563

Abstract: HC373 HC563 HCT373
Contextual Info: [ /Title CD74H C533, CD74H CT533, CD74H C563, CD74H CT563 /Subject (High Speed CD54/74HC533, CD54/74HCT533, CD54/HC563, CD74HCT563 Data sheet acquired from Harris Semiconductor SCHS187C January 1998 - Revised July 2003 High-Speed CMOS Logic Octal Inverting

Contextual Info: MOTOROLA SC LOGIC 52E D MOTOROLA b 3b ?252 DDflams ‘ì T 'ì • I1 0 T 4 H SEMICONDUCTOR TECHNICAL DATA MC54/74HC533 Octal 3-S tate Inverting Transparent Latch High-Performance Silicon-Gate CM OS The MC54/74HC533 is identical in pinout to the LS533. The device inputs are

IC 74HC573

Abstract: 74HC57 74HC573A 74hc573m HC573
Contextual Info: b 3 b 7 2 5 2 OOfiOSOH 7 TMb ol ûS * MOTOROLA S E M IC O N D U C T O R TECHNICAL DATA MC54/74HC5 7 3 O ctal 3-State IMoninverting Transparent Latch H igh-Perform ance Silicon-G ate C M O S The MC54/74HC573 is identical in pinout to the LS573. The device inputs are

HCT573A

Abstract: 74HCT573A
Contextual Info: MOTOROLA SEMICONDUCTOR! TECHNICAL DATA MC54/74HCT573A Octal 3-State Noninverting Transparent Latch with LSTTL Compatible Inputs High-Performance Silicon-Gate CMOS The MC54/74HCT573A is identical in pinout to the LS573. This device may be used as a level converter for interfacing TTL or NMOS outputs to HighSpeed CMOS inputs.

7054F

Abstract: BC564A HA13563 AC123A HITACHI microcontroller H8 534 manual IC 74LS47 AC538 BC245A 2SK3235 HA13557
Contextual Info: INDEX General General Information Semiconductor Packages Sales Locations Microcontroller Microcontroller General MultiChipModules Smart Card Micro. Overview Micro. Shortform Micro. Hardware Manual Micro. Program. Manual Micro. Application Notes LCD Controller / Driver

HC-86

Abstract: HC09 hcoo HC07 hc86 hc132 HC123A HC-107 HC251 HC4050
Contextual Info: SELECTION GUIDE FUNCTION GATE BUFFER FLIP-FLOP STANDARD CODE NAND HCOO, HCTOO, HC03, HC10, HCT10, HC20, HC30, HC133, HCT30 NOR HC02, HCT02, HC27, HCT27, HC4002, HC4078 AND HC08, HCT08, HC09, HC11, HC21 OR HC32, HCT32, HC4072, HC4075 EX NOR HC266, HC7266 EX OR

74HC373

Abstract: IC 74HC573
Contextual Info: M54/74HC373/573 M54/74HC533/563 SGS-TtiOMSON OCTAL D-TYPE LATCH WITH 3-STATE OUTPUT HC373/573 NON INVERTING, HC533/563 INVERTING • HIGH SPEED tpD = 15 ns TYP. at VCc = 5V ■ LOW POWER DISSIPATION !CC = 4 pA (MAX.) at TA = 25°C ■ HIGH NOISE IMMUNITY

Contextual Info: HC563, HC563 OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS SCLS145C – DECEMBER 1982 – REVISED MARCH 2003 Typical tpd = 21 ns ±6-mA Output Drive at 5 V Low Input Current of 1 µA Max Bus-Structured Pinout HC563 . . . FK PACKAGE TOP VIEW

HC563

Abstract: SN54HC563 SN74HC563 SN74HC563DW SN74HC563DWR SN74HC563N SNJ54HC563FK SNJ54HC563J SNJ54HC563W
Contextual Info: HC563, HC563 OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS SCLS145C – DECEMBER 1982 – REVISED MARCH 2003 Typical tpd = 21 ns ±6-mA Output Drive at 5 V Low Input Current of 1 µA Max Bus-Structured Pinout HC563 . . . FK PACKAGE TOP VIEW