SCLA008 Search Results

Contextual Info: Using High-Speed CMOS and Advanced CMOS Logic in Systems With Multiple VCC Supplies or Partial Power Down Rick Curtis Texas Instruments Incorporated SCLA008 April 1996 1 IMPORTANT NOTICE Texas Instruments TI reserves the right to make changes to its products or to discontinue

Contextual Info: SN54HC374, SN74HC374 OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS SCLS141C – DECEMBER 1982 – REVISED JULY 1998 D D D D SN54HC374 . . . J OR W PACKAGE SN74HC374 . . . DB, DW, N, OR PW PACKAGE TOP VIEW Eight D-Type Flip-Flops in a Single Package

SCBA004C

Abstract: scaa035b
Contextual Info: Data sheet acquired from Harris Semiconductor SCHS287 This data sheet is applicable to the CD54/74AC240, CD54ACT240, CD54AC241, and CD54/74ACT241. The CD74AC241 was not acquired from Harris Semiconductor. See SCHS244 for information on the CD74ACT240, CD74AC244, and CD74ACT244.

SNJ54HC373FK

Contextual Info: SN54HC373, SN74HC373 OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS SCLS140B – DECEMBER 1982 – REVISED MAY 1997 D D D D Eight High-Current Latches in a Single Package High-Current 3-State True Outputs Can Drive up to 15 LSTTL Loads Full Parallel Access for Loading

Contextual Info: SN54AC534, SN74AC534 OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS SCAS554A – NOVEMBER 1995 – REVISED MAY 1996 D D D SN54AC534 . . . J OR W PACKAGE SN74AC534 . . . DB, DW, N, OR PW PACKAGE TOP VIEW 3-State Inverting Outputs Drive Bus Lines

Contextual Info: SN54HC02, SN74HC02 QUADRUPLE 2-INPUT POSITIVE-NOR GATES SCLS076B – DECEMBER 1982 – REVISED MAY 1997 D SN54HC02 . . . J OR W PACKAGE SN74HC02 . . . D, DB, N, OR PW PACKAGE TOP VIEW Package Options Include Plastic Small-Outline (D), Shrink Small-Outline

Contextual Info: SN54HC574, SN74HC574 OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS SCLS148C – DECEMBER 1982 – REVISED JANUARY 1998 D D SN54HC574 . . . J OR W PACKAGE SN74HC574 . . . DW, N, OR PW PACKAGE TOP VIEW High-Current 3-State Noninverting Outputs

Contextual Info: SN54HC193, SN74HC193 4-BIT SYNCHRONOUS UP/DOWN COUNTERS DUAL CLOCK WITH CLEAR SCLS122B – DECEMBER 1982 – REVISED MAY 1997 D D D D D Look-Ahead Circuitry Enhances Cascaded Counters Fully Synchronous in Count Modes Parallel Asynchronous Load for Modulo-N

Contextual Info: SN54HCT245, SN74HCT245 OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS SCLS020C – MARCH 1984 – REVISED MAY 1997 D D D SN54HCT245 . . . J OR W PACKAGE SN74HCT245 . . . DB, DW, N, OR PW PACKAGE TOP VIEW Inputs Are TTL-Voltage Compatible High-Current 3-State Outputs Drive Bus

Contextual Info: SN54HCT374, SN74HCT374 OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS SCLS005B – MARCH 1984 – REVISED MAY 1997 D D D D D SN54HCT374 . . . J OR W PACKAGE SN74HCT374 . . . DW OR N PACKAGE TOP VIEW Inputs Are TTL-Voltage Compatible Eight D-Type Flip-Flops in a Single Package

Contextual Info: SN54HCT240, SN74HCT240 OCTAL BUFFERS AND LINE DRIVERS WITH 3-STATE OUTPUTS SCLS174C – MARCH 1984 – REVISED FEBRUARY 2000 D D SN54HCT240 . . . J OR W PACKAGE SN74HCT240 . . . DW, N, OR PW PACKAGE TOP VIEW Inputs Are TTL-Voltage Compatible 3-State Outputs Drive Bus Lines or Buffer

pinout diagram of 4049

Contextual Info: [ /Title CD74H C4049, CD74H C4050 /Subject (High Speed CMOS Logic Hex CD54/74HC4049, CD54/74HC4050 Data sheet acquired from Harris Semiconductor SCHS205B High-Speed CMOS Logic Hex Buffers, Inverting and Non-Inverting February 1998 - Revised May 2000 Features

SN54AC04

Contextual Info: SN54AC04, SN74AC04 HEX INVERTERS SCAS519C – JULY 1995 – REVISED SEPTEMBER 1996 D D EPIC  Enhanced-Performance Implanted CMOS 1-µm Process Package Options Include Plastic Small-Outline (D), Shrink Small-Outline (DB), and Thin Shrink Small-Outline (PW)

Contextual Info: SN54HC08, SN74HC08 QUADRUPLE 2-INPUT POSITIVE-AND GATES SCLS081B – DECEMBER 1982 – REVISED MAY 1997 D SN54HC08 . . . J OR W PACKAGE SN74HC08 . . . D, N, OR PW PACKAGE TOP VIEW Package Options Include Plastic Small-Outline (D), Thin Shrink Small-Outline (PW), and Ceramic Flat (W)

Contextual Info: SN54HCT257, SN74HCT257 QUADRUPLE 2-LINE TO 1-LINE DATA SELECTORS/MULTIPLEXERS WITH 3-STATE OUTPUTS SCLS072B – NOVEMBER 1988 – REVISED MAY 1997 D D D D D SN54HCT257 . . . J PACKAGE SN74HCT257 . . . N PACKAGE TOP VIEW Inputs Are TTL-Voltage Compatible

Contextual Info: SN54AC240, SN74AC240 OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS SCAS512C – JUNE 1995 – REVISED SEPTEMBER 1996 D EPIC  Enhanced-Performance Implanted CMOS 1-µm Process Package Options Include Plastic Small-Outline (DW), Shrink Small-Outline (DB), Thin Shrink Small-Outline (PW), and

Contextual Info: [ /Title CD74 HC137 , CD74 HCT13 7, CD74 HC237 , CD74 HCT23 7 /Subject (High Speed CD74HC137, CD74HCT137, CD54/74HC237, CD74HCT237 Data sheet acquired from Harris Semiconductor SCHS146A March 1998 - Revised May 2000 High Speed CMOS Logic, 3-to-8 Line Decoder

Contextual Info: SN54AC08, SN74AC08 QUADRUPLE 2-INPUT POSITIVE-AND GATES SCAS536B – SEPTEMBER 1995 – REVISED SEPTEMBER 1996 D EPIC  Enhanced-Performance Implanted CMOS 1-µm Process Package Options Include Plastic Small-Outline (D), Shrink Small-Outline (DB), and Thin Shrink Small-Outline (PW)

Contextual Info: SN54AC32, SN74AC32 QUADRUPLE 2-INPUT POSITIVE-OR GATES SCAS528B – AUGUST 1995 – REVISED SEPTEMBER 1996 D EPIC  Enhanced-Performance Implanted CMOS 1-µm Process Package Options Include Plastic Small-Outline (D), Shrink Small-Outline (DB), and Thin Shrink Small-Outline (PW)

Contextual Info: SN54HC20, SN74HC20 DUAL 4-INPUT POSITIVE-NAND GATES SCLS086D – DECEMBER 1982 – REVISED FEBRUARY 2000 D SN54HC20 . . . J OR W PACKAGE SN74HC20 . . . D, DB, N, OR PW PACKAGE TOP VIEW Package Options Include Plastic Small-Outline (D), Shrink Small-Outline

Contextual Info: SN54HC165, SN74HC165 8-BIT PARALLEL-LOAD SHIFT REGISTERS SCLS116C – DECEMBER 1982 – REVISED MAY 1997 D D D D D Complementary Outputs Direct Overriding Load Data Inputs Gated Clock Inputs Parallel-to-Serial Data Conversion Package Options Include Plastic

Contextual Info: SN54HC273, SN74HC273 OCTAL D-TYPE FLIP-FLOPS WITH CLEAR SCLS136B – DECEMBER 1982 – REVISED MAY 1997 D D D D Contain Eight Flip-Flops With Single-Rail Outputs Direct Clear Input Individual Data Input to Each Flip-Flop Applications Include: – Buffer/Storage Registers

Contextual Info: SN54ACT563, SN74ACT563 OCTAL D-TYPE TRANSPARENT LATCHES WITH 3-STATE OUTPUTS SCAS550A – NOVEMBER 1995 – REVISED 1996 D D D SN54ACT563 . . . J OR W PACKAGE SN74ACT563 . . . DB, DW, N, OR PW PACKAGE TOP VIEW Inputs Are TTL-Voltage Compatible 3-State Inverted Outputs Drive Bus Lines

Contextual Info: Data sheet acquired from Harris Semiconductor SCHS277 This data sheet is applicable to the CD54HC354 and CD74HCT356. The CD54HCT354, CD54HCT356, CD74HC356, and CD54HCT356 were not acquired from Harris Semiconductor. See SCHS179 for information on the CD74HC354 and CD74HCT354.