DS537 Search Results

MP04HBP590-18

Abstract: MP04HBT14 MP04HBT-16 MP04HBT590-18
Contextual Info: MP04-590 MP04XXX590 Dual Thyristor, Thyristor/Diode Module Replaces April 2001 version, DS5371-2.2 DS5371-3.1 October 2001 FEATURES • Dual Device Module ■ Electrically Isolated Package ■ Pressure Contact Construction ■ International Standard Footprint

Contextual Info: MT91633/4 Silicon COIC/DAA Chipset Preliminary Information Features ¥ ¥ ¥ ¥ ¥ ¥ ¥ ¥ ¥ ¥ ¥ ¥ DS5372 May 2001 Ordering Information MT91633AS 16 pin SOIC MT91634AQ 36 pin QSOP MH80632AB-R1 20 pin BGA MH80632AB-Z1 20 pin BGA -40°C to 85°C Voice and data quality

RGMII constraints

Abstract: TEMAC free source code for cdma transceiver using vhdl 7206 cisco power requirement 7206 cisco GMII VLAN Tag RGMII RGMII phy DS537 LocalLink
Contextual Info: XPS LL TEMAC v2.03a DS537 December 2, 2009 Product Specification Introduction LogiCORE Facts This document provides the design specification for the XPS_LL_TEMAC soft Ethernet core. This core provides a control interface to internal registers via a 32-bit Processor Local Bus (PLB) Version 4.6 as described in the

TAG 8426

Abstract: tag 8606 cisco 2821 RGMII phy RGMII constraints structure of GMII packet with VLAN Tag LocalLink sgmii soft temac constraints for virtex4 tc 3086
Contextual Info: XPS LL TEMAC v2.02a DS537 June 24, 2009 Product Specification Introduction LogiCORE Facts This document provides the design specification for the XPS_LL_TEMAC soft Ethernet core. This core provides a control interface to internal registers via a 32-bit

water cooled thyristor assembly

Abstract: MP04HBP590-18 MP04HBT14 MP04HBT-16 MP04HBT590-18 59014 59016
Contextual Info: MP04-590 MP04-590 Dual Thyristor, Thyristor/Diode Module Replaces April 2001 version, DS5371-2.2 DS5371-3.1 October 2001 FEATURES • Dual Device Module ■ Electrically Isolated Package ■ Pressure Contact Construction ■ International Standard Footprint

CMESS

Contextual Info: MT91633/4 Silicon COIC/DAA Chipset Preliminary Information Features ¥ ¥ ¥ ¥ ¥ ¥ ¥ ¥ ¥ ¥ ¥ ¥ DS5372 May 2001 Ordering Information MT91633AS 16 pin SOIC MT91634AQ 36 pin QSOP MH80632AB-R1 20 pin BGA MH80632AB-Z1 20 pin BGA -40°C to 85°C Voice and data quality

vr1 500

Abstract: tlp127 equivalent MT91634 tlp127 application notes met 0231 MT91633 zarlink daa modem MH80632AB-R1 MT91633AS MT91634AQ
Contextual Info: MT91633/4 Silicon COIC/DAA Chipset Preliminary Information Features • • • • • • • • • • • • DS5372 May 2001 Ordering Information MT91633AS 16 pin SOIC MT91634AQ 36 pin QSOP MH80632AB-R1 20 pin BGA MH80632AB-Z1 20 pin BGA -40°C to 85°C

59016

Abstract: 59014 BUSBAR calculation datasheet ON SEMICONDUCTOR 613 MP04HBP590-18 MP04HBT14 MP04HBT-16 MP04HBT590-18 59018 MP04-590-18
Contextual Info: MP04-590 MP04-590 Dual Thyristor, Thyristor/Diode Module Replaces April 2001 version, DS5371-2.2 DS5371-3.1 October 2001 FEATURES • Dual Device Module ■ Electrically Isolated Package ■ Pressure Contact Construction ■ International Standard Footprint

tlp127 equivalent

Abstract: tlp127 application notes MT91634 440K MT91633 MH80632AB-R1 MT91633AS MT91634AQ
Contextual Info: MT91633/4 Silicon COIC/DAA Chipset Preliminary Information Features • • • • • • • • • • • • DS5372 May 2001 Ordering Information MT91633AS 16 pin SOIC MT91634AQ 36 pin QSOP MH80632AB-R1 20 pin BGA MH80632AB-Z1 20 pin BGA -40°C to 85°C

auxiliary contact 595-A

Abstract: MP04HBN14 MP04HBN-16 MP04HBN590-18 MP04HBP14 MP04HBP-16 MP04HBP590-18 MP04HBT14 MP04HBT-16 MP04HBT590-18
Contextual Info: MP04xxx590 Series MP04xxx590 Dual Thyristor, Thyristor/Diode Module Replaces October 2001 version, DS5371-3.1 DS5371-4.0 August 2003 FEATURES • Dual Device Module ■ Electrically Isolated Package ■ Pressure Contact Construction ■ International Standard Footprint

AN4502

Abstract: AN4503 AN4505 AN4506 GP800NSM33
Contextual Info: GP800NSM33 GP800NSM33 Hi-Reliability Single Switch IGBT Module Preliminary Information DS5372-2.0 February 2001 FEATURES • High Thermal Cycling Capability ■ Non Punch Through Silicon ■ Isolated MMC Base with AlN Substrates ■ 3300V Rating ■ 800A Per Module

Contextual Info: P/N: C-13-1315T-01-XX 1310nm Laser Diode Transmitter Features l Laser diode with multi-quantum-well structure l Un-cooled operation at -40~+85° C l For Single-mode Application l High Optical Power l High Speed Packaging l 8 Pin Package with ST Port Application

transceiver LED PIN 155mbps

Abstract: GR-468-CORE 13155
Contextual Info: P/N: C-13-155 C -T(3)-SSCx(-G5) 155 Mbps Single Mode Transceiver Features Duplex SC Single Mode Transceiver Industry Standard 1x9 Footprint Intermediate reach SONET OC-3 SDH STM-1 Compliant Single +5V/3.3V Power Supply PECL/LVPECL Differential Inputs and Outputs

aspi-024-aspi-s402

Abstract: ML510 xilinx mig user interface design VIRTEX-5 DDR2 VIRTEX-5 DDR2 controller virtex ml510 xc5vlx130t ChipScope XAPP778 XPS IIC
Contextual Info: ML510 MIG Design Creation Using ISE 11.1, MIG 3.0 and ChipScope™ Pro 11.1 May 2009 Overview ƒ Hardware Setup ƒ Software Requirements ƒ CORE Generator™ software – Memory Interface Generator MIG ƒ Modify Design – Add ChipScope Pro Cores to Design

CXA 1471

Abstract: DS-5377 GR-468
Contextual Info: P/N: SPC-GB-ZX CWDM 80km GbE SFP Transceiver Features Duplex LC Connector Data Rate 1.062 to 1.25 Gb/s Single 3.3V Supply 80km Reach 24dB Minimum, 28dB Typical Link Budget Commercial Temperature Available -CxA Industrial Temperature Available (-TxA) CWDM Wavelengths, DFB Laser

SGMII RGMII bridge

Abstract: RTL code for ethernet 802.3-2005 RGMII to SGMII Bridge UG368 1000BASE-X Ethernet-MAC using vhdl FPGA Virtex 6 Ethernet RGMII constraints sgmii sfp virtex
Contextual Info: Virtex-6 FPGA Embedded Tri-Mode Ethernet MAC User Guide [optional] UG368 v1.0 June 24, 2009 [optional] Xilinx is disclosing this user guide, manual, release note, and/or specification (the "Documentation") to you solely for use in the development of designs to operate with Xilinx hardware devices. You may not reproduce, distribute, republish, download, display, post, or transmit the

SGMII RGMII bridge

Abstract: sgmii fpga UG368 fpga rgmii verilog code for mdio protocol iodelay sgmii Ethernet sgmii testbench of an ethernet transmitter in verilog 1000BASE-X
Contextual Info: Virtex-6 FPGA Embedded Tri-Mode Ethernet MAC User Guide [optional] UG368 v1.2 January 17, 2010 [optional] Xilinx is disclosing this user guide, manual, release note, and/or specification (the "Documentation") to you solely for use in the development of designs to operate with Xilinx hardware devices. You may not reproduce, distribute, republish, download, display, post, or transmit the

Contextual Info: P/N: T-11-2315T-04-XX 155 Mbps PIN-TIA Receiver Modules Features l InGaAs/InP PIN Photodiode with transimpedance amplifer l High Responsivi ty l Single +5V operation l -40~85° C operating temperature l For Single-mode Application l High Speed l 8 Pin Package with ST Port

ML505

Abstract: ml507 MT4HTF3264HY-53e VIRTEX-5 DDR2 ps2 controller ML506 aspi-024-aspi-s402 MT4HTF3264HY DS695 VIRTEX-5 DDR2 controller
Contextual Info: ML505/506/507 MIG Design Creation Using ISE 11.1, MIG 3.0 and ChipScope™ Pro 11.1 May 2009 Overview ƒ Hardware Setup ƒ Software Requirements ƒ CORE Generator™ software – Memory Interface Generator MIG ƒ Modify Design – Add ChipScope Pro Cores to Design

aspi-024-aspi-s402

Abstract: DS444 xilinx mig user interface design MT4HTF3264HY-53e VIRTEX-5 DDR2 VIRTEX-5 DDR2 controller XAPP1026 ug086 XPS IIC chipscope manual
Contextual Info: ML501 MIG Design Creation Using ISE 10.1i SP3, MIG 2.3 and ChipScope™ Pro 10.1i November 2008 Overview • Hardware Setup • Software Requirements • CORE Generator™ software – Memory Interface Generator MIG • Modify Design – Add ChipScope Pro Cores to Design

ICS85104

Abstract: marvell ibis 88e1111 South Bridge ALI M1535 ALi M1535D Marvell 88E1111 trace layout guidelines us power supply atx 250w schematic M1535 XAPP925 rtc8564 JS28F256P30T95
Contextual Info: ML510 Embedded Embedded Development Development Platform User Guide [optional] UG356 v1.1 December 11, 2008 [optional] R R Xilinx is disclosing this user guide, manual, release note, and/or specification (the "Documentation") to you solely for use in the development

ML505

Abstract: ML507 XPS IIC ML506 JTAG Xilinx lcd ML506 VIRTEX-5 DDR2 pcb design sata2 design guide VIRTEX-5 DDR PHY ML50x
Contextual Info: ML505/ML506/ML507 ML505/ML506/M L507 Reference Reference Design Design User Guide [optional] UG349 v3.0.1 June 27, 2008 [optional] R R Xilinx is disclosing this user guide, manual, release note, and/or specification (the "Documentation") to you solely for use in the development

C-13-155-F-SLC9AS-G5

Abstract: C-13-155-F-SLC3S-G5 GR-253-CORE GR-468-CORE
Contextual Info: P/N: C-13-155 C -F-SLCx(-G5) 155 Mbps Single Mode SFF LC Transceiver Features Duplex LC Single Mode Transceiver Small Form Factor Multi-sourced 2x5 Pin Package Ultra Long reach SONET OC-3/SDH STM-1 Compliant Single +3.3V Power Supply LVPECL Differential Inputs and Outputs

spc-gb-ezx-xxcda

Abstract: SPCGBEZX TDA 2010 GR-468 jd d company SFP transceiver 120km
Contextual Info: P/N: SPC-GB-EZX CWDM 120km Gigabit Ethernet SFP Transceiver Features z z z z z z z z z z z z Data rate 1.062 to 1.25 Gb/s Single 3.3 V Supply 120 km Reach 32 dB Min, 36 dB Typical Link Budget Commercial Temperature Available -CxA Industrial Temperature Available (-TxA)