shdsl transmitter
Abstract: SRD7
Contextual Info: ZL30226/227/228 4/8/16 Port IMA/TC PHY Device for xDSL Data Sheet Features DS5728 IMA • • • • • Up to 16 xDSL links & up to 8 IMA groups with 1 to 16 links/IMA group1 Supports symmetrical & asymmetrical operation CTC common transmit & ITC (independent
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AN073
Abstract: atm header error checking dsl Globespan chip set GlobespanVirata ZL30226 ZL30227 ZL30228 gsm model PDM25
Contextual Info: ZL30226/227/228 4/8/16 Port IMA/TC PHY Device for xDSL Data Sheet Features DS5728 IMA • • • • • • Up to 16 xDSL links & up to 8 IMA groups with 1 to 16 links/IMA gro up1 Supports symmetrical & asymmetrical operation CTC common transmit & ITC (independent
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4500a
Abstract: DFM600BXS12-A000 DFM600BXS12
Contextual Info: DFM600BXS12-A000 Fast Recovery Diode Module Replaces DS5725-1.3 DS5725-2 August 2010 LN27493 FEATURES KEY PARAMETERS • VRRM VF IF IFM Low Reverse Recovery Charge High Switching Speed Low Forward Volt Drop Isolated Cu Base with Al2O3 Substrates
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XPD-MR-08-XXIDFA
Contextual Info: Preliminary Datasheet XPD-MR-08-XXIDFA Features XFP MSA Rev 4.5 compliant Available in all 100GHz C-Band Wavelengths on the DWDM ITU Grid Support multi-rate from 9.95G to 11.1G Up to 80km transmission on SMF Cooled EML with isolator and APD receiver
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sp-12
Abstract: GR-253-CORE SP12 SP-12-IR1-CDFM
Contextual Info: SP-12-xxx-xDFM Features z Date rate 622Mbps z 1310nm FP laser and PIN photodetector for 15km transmission z 1310nm DFB laser and PIN photodetector for 40km transmission z 1550nm uncooled DFB laser and PIN photodetector for 80km transmission z Digital diagnostic monitor interface compliant
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ZL50010
Abstract: TFR1M GR-1244-CORE MS-026
Contextual Info: ZL50010 Flexible 512-ch DX with Enhanced DPLL Data Sheet Features VDD ZL50010/QCC ZL50010/GDC • • • • • • • • RESET Data Memory P/S Converter Output HiZ Control Connection Memory Microprocessor Interface and DPLL OSC Output Timing STo0-15 STOHZ0-15
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MS-026
Abstract: ZL50012 philips e3 STO11 ci 116h 4094m
Contextual Info: ZL50012 Flexible 512-ch Digital Switch Data Sheet Features VDD STi0-15 S/P Converter FPi CKi Input Timing • • 160 Pin LQFP 144 Ball LBGA • • • • Per-channel message mode Per-channel pseudo random bit sequence PRBS pattern generation and bit error detection
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aspi-024-aspi-s402
Abstract: ML510 xilinx mig user interface design VIRTEX-5 DDR2 VIRTEX-5 DDR2 controller virtex ml510 xc5vlx130t ChipScope XAPP778 XPS IIC
Contextual Info: ML510 MIG Design Creation Using ISE 11.1, MIG 3.0 and ChipScope™ Pro 11.1 May 2009 Overview Hardware Setup Software Requirements CORE Generator™ software – Memory Interface Generator MIG Modify Design – Add ChipScope Pro Cores to Design
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SP-12-LR1-IDFM
Abstract: STM-4 laser DFB 1550nm SP-12-LR1 SP-12-IR1
Contextual Info: Preliminary SP-12-xxx-xDFM Features z Date rate 622Mbps z 1310nm FP laser and PIN photodetector for 15km transmission z 1310nm DFB laser and PIN photodetector for 40km transmission z 1550nm uncooled DFB laser and PIN photodetector for 80km transmission z Digital diagnostic monitor interface compliant
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8B10B
Abstract: GR-1089-CORE 1.25G 850NM 58434E
Contextual Info: Preliminary SP-GB-SX-CNFB Features z Dual data-rate of 1.25Gbps/1.0625Gbps operation z 850nm VCSEL laser and PIN photodetector z 550m transmission with 50/125 µm MMF z 275m transmission with 62.5/125 µm MMF z Standard serial ID information compatible with SFP
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GR-1244-CORE
Abstract: MS-026 ZL50011
Contextual Info: ZL50011 Flexible 512-ch DX with on-chip DPLL Data Sheet Features VDD • • • Applications • • • • • Small and medium digital switching platforms Access Servers Time Division Multiplexers Computer Telephony Integration Digital Loop Carriers VSS
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XPD-MR-04-XXIDFA
Contextual Info: Preliminary Datasheet XPD-MR-04-XXIDFA Features XFP MSA Rev 4.5 compliant Available in all 100GHz C-Band Wavelengths on the DWDM ITU Grid Support multi-rate from 9.95G to 11.3G Up to 40km transmission on SMF Cooled EML with isolator and PIN receiver
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MS-026
Abstract: ZL50012 TFPW0 sto8b
Contextual Info: ZL50012 Flexible 512-ch Digital Switch Data Sheet Features VDD STi0-15 S/P Converter FPi CKi Input Timing • • 160 Pin LQFP 144 Ball LBGA • • • • Per-channel message mode Per-channel pseudo random bit sequence PRBS pattern generation and bit error detection
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ML505
Abstract: ml507 MT4HTF3264HY-53e VIRTEX-5 DDR2 ps2 controller ML506 aspi-024-aspi-s402 MT4HTF3264HY DS695 VIRTEX-5 DDR2 controller
Contextual Info: ML505/506/507 MIG Design Creation Using ISE 11.1, MIG 3.0 and ChipScope™ Pro 11.1 May 2009 Overview Hardware Setup Software Requirements CORE Generator™ software – Memory Interface Generator MIG Modify Design – Add ChipScope Pro Cores to Design
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Contextual Info: Preliminary Datasheet XPD-MR-04-XXIDFA Features XFP MSA Rev 4.5 compliant Available in all 100GHz C-Band Wavelengths on the DWDM ITU Grid Support multi-rate from 9.95G to 11.3G Up to 40km transmission on SMF Cooled EML with isolator and PIN receiver
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DS5722
Contextual Info: ZL50012 Flexible 512-ch Digital Switch Data Sheet Features VDD STi0-15 S/P Converter FPi CKi Input Timing • • 160 Pin LQFP 144 Ball LBGA • • • • Per-channel message mode Per-channel pseudo random bit sequence PRBS pattern generation and bit error detection
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ICS85104
Abstract: marvell ibis 88e1111 South Bridge ALI M1535 ALi M1535D Marvell 88E1111 trace layout guidelines us power supply atx 250w schematic M1535 XAPP925 rtc8564 JS28F256P30T95
Contextual Info: ML510 Embedded Embedded Development Development Platform User Guide [optional] UG356 v1.1 December 11, 2008 [optional] R R Xilinx is disclosing this user guide, manual, release note, and/or specification (the "Documentation") to you solely for use in the development
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M25P32 equivalent
Abstract: NUMONYX xilinx spi virtex 5 ML505 xps serial peripheral interface XAPP1020 vhdl code for spi SPARTAN 6 spi numonyx M25P32 vhdl code for spi xilinx xilinx
Contextual Info: Application Note: Virtex-5 Family Post-Configuration Access to SPI Flash Memory with Virtex-5 FPGAs Author: Daniel Cherry XAPP1020 v1.0 June 01, 2009 Summary Virtex -5 FPGAs support direct configuration from industry-standard Serial Peripheral Interface (SPI) flash memories. After configuration, it is possible for a user application to read
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ML505
Abstract: ML507 XPS IIC ML506 JTAG Xilinx lcd ML506 VIRTEX-5 DDR2 pcb design sata2 design guide VIRTEX-5 DDR PHY ML50x
Contextual Info: ML505/ML506/ML507 ML505/ML506/M L507 Reference Reference Design Design User Guide [optional] UG349 v3.0.1 June 27, 2008 [optional] R R Xilinx is disclosing this user guide, manual, release note, and/or specification (the "Documentation") to you solely for use in the development
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72402ASEM4G19T
Contextual Info: 4M x 72 Bit PC-66 SDRAM DIMM PC-66 SYNCHRONOUS DRAM DIMM 72402ASEM4G19T 168 Pin 4Mx72 SDRAM DIMM Unbuffered, 4k Refresh, 3.3V with SPD Pin Assignment General Description The 72402ASEM4G19T is a 4Mx72 bit, 19 chip, 168 Pin DIMM module consisting of 18 2Mx4x2
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fsp250-60
Abstract: alaska atx 250 p4
Contextual Info: ML510 Embedded Embedded Development Development Platform User Guide [optional] UG356 v1.2 June 16, 2011 [optional] R R Copyright 2008 – 2011 Xilinx, Inc. Xilinx, the Xilinx logo, Artix, ISE, Kintex, Spartan, Virtex, Zynq, and other designated brands included
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Contextual Info: SP-12-xxx-xDFM Features z Date rate 622Mbps z 1310nm FP laser and PIN photodetector for 15km transmission z 1310nm DFB laser and PIN photodetector for 40km transmission z 1550nm uncooled DFB laser and PIN photodetector for 80km transmission z Digital diagnostic monitor interface compliant
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