92111 Search Results

22202

Abstract: diode in4003 4071 pin diagram IN4003 MD6703AC MD6703AE MD6703AF MD6703AH MD6703AI 1000-SS
Contextual Info: Represented by Mesa Engineering 7525 Convoy Court M D 6 7 0 3 ISO-CMOSTMHIGH-SPEED s t a t i c Technical Data San Diego, CA 92111 288-BIT S H IFT REGISTER. 278-8021 MITEL ADVANCED INFO R M A TIO N 7 /7 8 DESCRIPTION: T he 6 7 0 3 is a static 28 8 b it s h ift register designed in IS O -C M O S to o ffe r lo w po w e r and high speeds (up to 20 M H z),

Contextual Info: I ecnnical D a ta ' CD54/74AC00 CD54/74ACT00 Quad 2-Input NAND Gate t > t > Type Features: • Typical propagation delay ACOO : 3.2ns @ Vcc - 5 V, T a - 25° C. CL = 50 pF £ > o • no - r vec-M 1 1 ( 1 - 1*921112 FUNCTIONAL DIAGRAM & TERMINAL ASSIGNMENT

IC str 1229

Abstract: fairchild 90028 L4W 63
Contextual Info: FAIRCHILD SALES REPRESENTATIVES C A LIFO R N IA CELTEC COMPANY 7380 C lairem ont Mesa Blvd., Suite 109 San Diego, C alifornia 92111 Tel: 714-279-7961 TWX: 910 -33 5-15 12 KANSAS B.C. ELECTRONICS 1015 W est Santa Fe Olathe, Kansas 66061 Tel: 913 -78 2-66 96 TWX: 910 -74 9-64 14

Contextual Info: › › › › TLP-92111/A High energy Up to 3 A pulse capability Instant voltage response No passivation effect Performance Data Typical values for batteries stored at +25 °C for one year 4.0 System Nominal voltage Nominal capacity Nominal current Max. 1 s pulse to 3 V

SFE10.52MJA10

Abstract: 8745H
Contextual Info: Philips Semiconductors Preliminary specification Satellite sound receiver with l2C-bus control TDA8745 FEATURES • On-chip frequency synthesizer and mixer: - tuning range 4 to 9.77 M Hz - reference oscillator 4 M H z using a crystal or 4 MHz frequency source

Applications Handbook for Wired telecom systems, IC03b

Abstract: IC03b TEA1062 APPLICATION NOTE Applications Handbook for Wired telecom systems
Contextual Info: Philips Semiconductors Product specification Low voltage transmission circuits dialler interface TEA1062; TEA1062A FEATURES GENERAL DESCRIPTION • Low DC line voltage; operates down to 1.6 V excluding polarity guard • Symmetrical high-impedance inputs (64 ki2) for

ICC1-100

Abstract: ICC150
Contextual Info: REVISIONS LTR DESCRIPTION DATE YR-MO-DA APPROVED A Add device type 02. Inactivate device type 01 (no approved source of supply). Add device types 03 through 07. Add vendors CAGE 32116, 5Y243, 57363, and 88379. Changed to reflect MIL-H-38534 processing. Editorial changes throughout.

SA572

Abstract: NE5234 SA572D SA572N philips surface mount zener diode SA572 Programmable analog compandor Rev. November 1998
Contextual Info: SA572 Programmable analog compandor Rev. 03 — 3 November 1998 Product data 1. Description The SA572 is a dual-channel, high-performance gain control circuit in which either channel may be used for dynamic range compression or expansion. Each channel has a full-wave rectifier to detect the average value of input signal, a linearized,

ande RY 192

Abstract: ande RY 228 ande RY 227 mov rdn 240 DB14-000121-00
Contextual Info: LSI402Z Digital Signal Processor User’s Guide May 2000 Order Number R14014 LSI Logic Confidential This document contains proprietary information of LSI Logic Corporation. The information contained herein is not to be used by or disclosed to third parties

sem 2105

Abstract: UA 7300 EPC D3318 LSI53C875 LSI53C875A PC99 UC5601QP S14047 B4128 30345
Contextual Info: TECHNICAL MANUAL LSI53C875A PCI to Ultra SCSI Controller Version 2.0 December 2000 S14047 This document contains proprietary information of LSI Logic Corporation. The information contained herein is not to be used by or disclosed to third parties without the express written permission of an officer of LSI Logic Corporation.

LSI21002

Abstract: LSI53C895 LSI53C896 S14007 68pin TO 50 PIN SCSI adapter S14001A Bios error code fc00
Contextual Info: USER’S GUIDE LSI21002 PCI to Dual Channel SCSI Host Adapter Version 1.1 November 2000 S14001.A Electromagnetic Compatibility Notices This device complies with Part 15 of the FCC Rules. Operation is subject to the following two conditions: 1. 2. This device may not cause harmful interference, and

LSI53C896

Abstract: ami 2109 el 7406 LSI53C876 PAR64 ADB 424 D3318
Contextual Info: TECHNICAL MANUAL LSI53C896 PCI to Dual Channel Ultra2 SCSI Multifunction Controller Version 3.2 April 2001 This document contains proprietary information of LSI Logic Corporation. The information contained herein is not to be used by or disclosed to third parties

LSI53C141

Abstract: D3318 LSI53C120 LSI53C876 LSI53C895 SD12 SD14
Contextual Info: TECHNICAL MANUAL LSI53C141 SCSI Bus Expander Version 2.1 November 2000 S14013.A This document contains proprietary information of LSI Logic Corporation. The information contained herein is not to be used by or disclosed to third parties without the express written permission of an officer of LSI Logic Corporation.

Cree optics

Abstract: ift transformers parity mux RCA 619 GENERAL SEMICONDUCTOR ed 7ca CS8401A CS8402A CS8412 TXN 616
Contextual Info: CS8401A CS8402A Semiconductor Corporation _Digital Audio Interface Transmitter General Description Features • Monolithic Digital Audio Interface Transmitter • Supports: AES/EBU, IEC 958, S/PDIF, & EIAJ CP-340 Professional and Consumer Formats • Host Mode and Stand Alone Modes

mk48t18

Abstract: LSI53C1510 LSI53C895 LSI53C896 alaska ultra reference design schematics 20405 MFA D3318
Contextual Info: TECHNICAL MANUAL LSI53C1510 I2O-Ready PCI RAID Ultra2 SCSI Controller Version 2.2 April 2001 S14024.B This document contains proprietary information of LSI Logic Corporation. The information contained herein is not to be used by or disclosed to third parties

E1110

Abstract: structure of GMII packet with VLAN Tag E1110 S 20 diode E1110 mac 226 E-1110 TXSV37 E110.000
Contextual Info: TECHNICAL MANUAL E-1110 10/100/1000 Mbits/s Ethernet MAC Preliminary April 2001 R14024 This document is preliminary. As such, it contains data derived from functional simulations and performance estimates. LSI Logic has not verified either the functional descriptions, or the electrical and mechanical specifications using

diagram of bp 1361 led driver

Abstract: LSIFC909 DB14-000150-01 M66EN PAR64 PC99 D3318
Contextual Info: LSIFC909 Fibre Channel I/O Processor Technical Manual August 2000 Version 2.1 Order Number S14029.A This document contains proprietary information of LSI Logic Corporation. The information contained herein is not to be used by or disclosed to third parties

Contextual Info: R evisions D esc ri ptio n/A pproved/D ate Tolerances 1- 20= + / - 0.2 A p p ro ve d Date M .H . 5 /2 3 /9 9 Date C h e cked 5 /2 3 /9 9 M .H . 20-30=+/-0.3 30-40=+/-0.4 D ra w n Date 5 /2 2 /9 9 K .R .E . 40-50=+/-0.5 50-100=+/-0.75 NOTES plating thickness 5. Per MIL-P-19468

TSM11NT

Contextual Info: R evisions D esc ri ptio n/A pproved/D ate Tolerances 1- 20= + /- 0.2 A p p ro ve d Date M .H . 0 2 /1 6 /0 0 C h e cked Date 0 2 /1 5 /0 0 M .H . 20-30=+/-0.3 D ra w n 30-40=+/-0.4 Date 0 2 /1 3 /0 0 K .R .E . NOTES plating thickness 5. Per MIL-P-19468 40-50=+/-0.5

Contextual Info: Tolerances R evisions D esc ri ptio n/A pproved/D ate 1- 20= + / - 0.2 20-30=+/-0.3 30-40=+/-0.4 40-50=+/-0.5 50-100=+/-0.75 100-300=+/-! .5 Angles=+/-1 Dimensions are in Millimeters A p p ro ve d Date M.H. 5/13/00 Date C h e cked 5/13/00 M.H. D ra w n K.R.E.

Contextual Info: Tolerances 1- 20= + / - 0.2 20-30=+/-0.3 30-40=+/-0.4 40-50=+/-0.5 50-100=+/-0.75 100-300=+/-1.5 Angles=+/-1 Dimensions are in Millimeters R e visio n s D e scri ptio n /A p p ro v e d /D a te A p p ro v e d D ate M .H . C h e cke d D ate M .H . D ra w n D ate

Contextual Info: Tolerances 1- 20= + / - 0.2 20-30=+/-0.3 30-40=+/-0.4 40-50=+/-0.5 50-100=+/-0.75 100-300=+/-1.5 Angles=+/-1 Dimensions are in Millimeters ITEM M A TE R IA L R e v is io n s 1. Ferrule Adj., B ra s s , N o te 1 G o ld , N o t e 8 C enter Contact: M a le B ra s s , N o te 1

Contextual Info: Tolerances R evisions D esc ri ptio n/A pproved/D ate A p p ro ve d Date M .H . 1- 20= + / - 0.2 0 6 /1 2 /0 0 Date C h e cked 0 6 /1 2 /0 0 M .H . 20-30=+/-0.3 30-40=+/-0.4 D ra w n Date 0 6 /1 1 /0 0 K .R .E . 40-50=+/-0.5 50-100=+/-0.75 NOTES plating thickness 5. Per MIL-P-19468

Contextual Info: Tolerances R e v is io n s A p p ro v e d 1- 20= + / - 0.2 0 4 /0 6 /0 2 C hecked D a te 0 4 /0 6 /0 2 M .H . 20-30=+/-0.3 D ra w n 30-40=+/-0.4 40-50=+/-0.5 D a te M .H . D e s c rl p t Io n /A p p ro v e d /D a te D a te 0 4 /0 2 /0 2 K .R .E . N O TE S p la tin g th ickness