ic t805
Abstract: IMS T805-F20E inmos transputer inmos transputer T225 T425 T800 t225 Inmos t805 IMS T805-G20E MEMAD11
Contextual Info: SGS-THOMSON IMS T805E •HI 32-bit floating-point transputer - Extended temperature EATURES 32 bit architecture 50 ns internal cycle time 20 MIPS peak instruction rate 2.8 Mflops (peak) instruction rate Pin compatible with IMS T800 Floating Point Unit Debugging support
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inmos T414
Abstract: Transputer T414 inmos transputer reference manual T414 inmos transputer link adapter Inmos t4142 Inmos transputer imst414 IMS T414
Contextual Info: mos Reference manual transputer i mos INMOS Limited PO Box 424 Bristol BS99 7DD England Telephone 0272 290861 Telex 444723 INMOS Corporation PO Box 16000 Colorado Springs CO 80935 USA Telephone (303) 630 4000 TWX 910 920 4904 INMOS GmbH Danziger Strasse 2
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CM7100
Abstract: 7126 fujitsu u416 cm71-00101-5e fujitsu 7119
Contextual Info: Corporate names revised in the documents The Fujitsu Limited reorganized its LSI business into a wholly owned subsidiary, the Fujitsu Microelectronics Limited on March 21, 2008. The corporate names “Fujitsu” and “Fujitsu Limited” described all in this document have been
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ir31
Contextual Info: FUJITSU SEMICONDUCTOR CONTROLLER MANUAL CM71-00101-5E FR Family 32-BIT MICROCONTROLLER INSTRUCTION MANUAL FR Family 32-BIT MICROCONTROLLER INSTRUCTION MANUAL FUJITSU LIMITED PREFACE • Objectives and intended reader The FR* family CPU core features proprietary Fujitsu architecture and is designed for controller
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inmos T414
Abstract: IMS T414 Transputer T414 IMST414 T414 inmos transputer reference manual transputer 7FFFFF84 22FC
Contextual Info: INMOS CORP 10E D | 4aG2b0fl 00G33S0 3 1 Ö nm oS C h a p te r 4 T - ^ ? -/7 -5 7 9 IMS T414 engineering data 107 Powered by ICminer.com Electronic-Library Service CopyRight 2003 IN M O S CORP "T-Vf-/7 * £ 7 40 02 1, 68 0 0 0 3 3 5 1 I I s I
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IMST414
Abstract: IMS T400 ST T4 1060 0922 imst400 IMST225 inmos T414 T805-20 R3174 si9590 inmos transputer
Contextual Info: SGS-THOMSON IM S T 4 0 0 Low cost 32-bit transputer FEATURES • 32 bit architecture ■ 50 ns internal cycle time ■ 20 MHz only ■ 20 MIPS peak instruction rate ■ 10 MIPS sustained instruction rate ■ Pin compatible with IMS T805, IMS T800, IMS T425
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T425
Abstract: T400 T414 T800 T805 inmos transputer T425 T800 transputer IMST425
Contextual Info: IMS T425 32-bit transputer FEATURES 32 bit architecture 40 ns internal cycle time 25 MIPS peak instruction rate Pin compatible with IMS T805, IMS T800, IMS T400 and IMS T414 Debugging support 4 Kbytes on-chip static RAM System Services 100 Mbytes/sec sustained data rate to internal
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Abstract: 97AF 7FFFFF84
Contextual Info: FUJITSU SEMICONDUCTOR CONTROLLER MANUAL CM71-00101-2E FR FAMILY 32-BIT MICROCONTROLLER INSTRUCTION MANUAL FR FAMILY 32-BIT MICROCONTROLLER INSTRUCTION MANUAL FUJITSU LIMITED PREFACE • Objectives and Intended Readership This manual is written for engineers involved in the development of products using the FR family
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T400 600
Abstract: IMS T414
Contextual Info: Low cost 32-bit transputer FEATURES • 32 bit architecture ■ 50 ns internal cycle time ■ 20 MHz only ■ 20 MIPS peak instruction rate ■ 10 MIPS sustained instruction rate ■ Pin compatible with IMS T805, IMS T800, IMS T425 and IMS T414 ■ 2 Kbytes on-chip static RAM
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inmos T400
Abstract: T400-T20S AD1230 T4-0065 800-00030 T400-J20S AD123 inmos transputer reference manual imst400
Contextual Info: iZ J S G S -T H O M S O N ^ 7 # . » » I U I © « » IM S T 4 0 0 ® 32 bit transputer FEATURES 32 bit architecture 50 ns internal cycle time 20 MHz only 20 MIPS peak instruction rate 10 MIPS sustained instruction rate Pin compatible with IMS T805, IMS T800, IMS T425
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IMS T414
Abstract: inmos transputer T425 inmos T414 IMST425 T414 inmos transputer reference manual IMS T800 MARK RF01 T425 T800
Contextual Info: / / ,' ï ! I NMOS CORP IDE D I 4 ö 0 2 töfl OOOaSTl 3 I IM S T 425 transputer nnm os Advance Data FEATURES 30 MIPS peak 15 MIPS sustained performance 32 bit architecture IMS T800 & IMS T414-20 hardware/pin compatible 4 Kbytes on chip RAM for 120 Mbytes/sec data rate
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AD T805
Abstract: B50R MEMAD11 T805 IMS T805-F25S IMST805 transputer Inmos t805 inmos transputer T225 inmos transputer T425
Contextual Info: 32-bit floating-point transputer FEATURES • 32 bit architecture ■ 40 ns internal cycle time ■ 25 MIPS peak instruction rate ■ 3.6 Mflops (peak) instruction rate ■ ■ Pin compatible with IMS T800, IMS T425, IMS T400 and IMS T414 Debugging support
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Inmos t805
Abstract: IMS T805-F20E T425 T800 IMST800 21-F5 REAL32
Contextual Info: IMS T805E 32-bit floating-point transputer – Extended temperature FEATURES APPLICATIONS Scientific and mathematical applications High speed multi processor systems High performance graphics processing – HUD/HDD displays Supercomputers Workstations and workstation clusters
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t425
Abstract: SGS thomson power schottky 8000000C sgs thomson 23-F1 KJH T6 IMST425 inmos transputer T425
Contextual Info: w # S G S -T H O M S O N IM < 5 , kT # D ïiin g M iiiL iK g T Â E g n e i ,M & _ T 4 2 5 32-bit transputer FEATURES 32 bit architecture 40 ns internal cycle time 25 MIPS peak instruction rate Pin compatible with IMS T805, IMS T800, IMST400 and IMS T414
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CQ 2AF1
Abstract: IMST425 IMS T400 Inmos T222
Contextual Info: 32-bit transputer FEATURES • 32 bit architecture ■ 40 ns internal cycle time ■ 25 MIPS peak instruction rate ■ Pin compatible with IMS T805, IMS T800, IMS T400 and IMS T414 ■ Debugging support ■ 4 Kbytes on-chip static RAM ■ 100 Mbytes/sec sustained data rate to internal
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Contextual Info: FUJITSU SEMICONDUCTOR CONTROLLER MANUAL CM71-00101-2E FR FAMILY 32-BIT MICROCONTROLLER INSTRUCTION MANUAL FR FAMILY 32-BIT MICROCONTROLLER INSTRUCTION MANUAL FUJITSU LIMITED PREFACE • Objectives and Intended Readership This manual is written for engineers involved in the development of products using the FR family
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inmos T414
Abstract: inmos T400 12u-1919-g19 25f5 T400 600 inmos transputer T425 T400 clock T800 transputer AD T805 IMS T414
Contextual Info: IMS T400 Low cost 32-bit transputer FEATURES H 32 bit architecture H 50 ns internal cycle time H 20 MHz only H 20 MIPS peak instruction rate H 10 MIPS sustained instruction rate H Pin compatible with IMS T805, IMS T800, IMS T425 and IMS T414 H 2 Kbytes on-chip static RAM
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Contextual Info: S G S -1 H 0 M S 0 N « t i m i I g ï M a M Ê IMS T400 i Low cost 32-bit transputer FEATURES 32 bit architecture 50 ns internal cycle time 20 MHz only 20 MIPS peak instruction rate 10 MIPS sustained instruction rate Pin compatible with IMS T805, IMS T800, IMS T425
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Diode RJ 4B
Abstract: FR20 IR00
Contextual Info: FUJITSU SEMICONDUCTOR CONTROLLER MANUAL CM71-00101-1E FR 20 32-BIT MICROCONTROLLER INSTRUCTION MANUAL PREFACE • Objectives and Intended Readership This manual is written for engineers involved in the development of products using the MB91100 series of microcontrollers. It is designed specifically for programmers working in
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IMST800
Abstract: IMS T800 T800 transputer inmos transputer inmos T414 T800 IMS T414 inmos transputer reference manual Transputer T414 T800 equivalent
Contextual Info: INMOS CORP IDE D | MfiOBbaa QDQ32fia 5 I DffimoS Chapter 3 T - 4 1 - 1 7 -5 7 • IMS T800 engineering data 45 iNnos T - * ¿ 4 - /? - & corp / ioE d | M a o 2 t,aa □ o o 3 5 a ci m | 46 1 Introduction vcc GND C a p P lu s C a p M in u s R eset A n a ly s e
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Contextual Info: ’My 22 Chapter 6 IMS T805 transputer mos* Engineering Data FEATURES 32 bit architecture 33 ns internal cycle time 30 MIPS peak instruction rate 4.3 Mflops (peak) instruction rate Pin compatible with IMS T800, IMS T425, IMS T400 and IMST414 Debugging support
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2N2204
Contextual Info: FUJITSU SEMICONDUCTOR CM71-00101-3E CONTROLLER MANUAL FR FAMILY 32-BIT MICROCONTROLLER INSTRUCTION MANUAL FR FAMILY 32-BIT MICROCONTROLLER INSTRUCTION MANUAL FUJITSU LIMITED PREFACE • Objectives and Intended Readership The FR family CPU core features proprietary Fujitsu architecture and is designed for controller
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IMST222
Abstract: IMST225 lwm 2464 a T805-G20E
Contextual Info: SGS-THOMSON IMS T805E L K g lT IM M ! 32-bit floating-point transputer - Extended temperature EATURES 32 bit architecture 50 ns internal cycle tim e 20 M IPS peak instruction rate 2.8 M flops (peak) instruction rate Pin co m patible w ith IMS T800 Floating Point Unit
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Inmos t805
Abstract: IMS T805-G25S IMS T805-F25S IMS T800 T400 T414 T425 T800 T805 inmos T414
Contextual Info: IMS T805 32-bit floating-point transputer FEATURES Floating Point Unit 32 32 bit architecture 40 ns internal cycle time 25 MIPS peak instruction rate 3.6 Mflops (peak) instruction rate Pin compatible with IMS T800, IMS T425, IMS T400 and IMS T414 Debugging support
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