T425 Search Results

inmos T414

Abstract: IMS T414 T414 inmos transputer T425 IMSB401 T800 transputer inmos transputer IMSB008 T800 IMST414
Contextual Info: Chapter 17 149 IMS B401 TRAM 32-bit transputer 32 Kbytes Size 1 □ m os Engineering Data Reset Analyse-NotError ^ o /j- IMS T800 LinkO -«- h * or Linkl - - H , IMS T425 32 Kbytes SRAM Link2 Link3. Terminated links FEATURES GENERAL DESCRIPTION

fm frontend

Abstract: T4258 T4258-ILQ 10n 1am 1 tube fm radio diagram FM RECEIVER IC T4258 features T4258-ILS U4255BM U4256BM
Contextual Info: T4258 AM/FM Receiver IC Description The T4258 is an integrated AM/FM frontend circuit in BICMOS technology. It contains a double conversion system for FM and an up-/down conversion circuit for AM IF1 = 10.7 MHz, IF2 = 450 kHz . A complete automatically aligned high performance AM/FM tuner

IMST414

Abstract: IMS T400 ST T4 1060 0922 imst400 IMST225 inmos T414 T805-20 R3174 si9590 inmos transputer
Contextual Info: SGS-THOMSON IM S T 4 0 0 Low cost 32-bit transputer FEATURES • 32 bit architecture ■ 50 ns internal cycle time ■ 20 MHz only ■ 20 MIPS peak instruction rate ■ 10 MIPS sustained instruction rate ■ Pin compatible with IMS T805, IMS T800, IMS T425

T425

Abstract: T400 T414 T800 T805 inmos transputer T425 T800 transputer IMST425
Contextual Info: IMS T425 32-bit transputer FEATURES 32 bit architecture 40 ns internal cycle time 25 MIPS peak instruction rate Pin compatible with IMS T805, IMS T800, IMS T400 and IMS T414 Debugging support 4 Kbytes on-chip static RAM System Services 100 Mbytes/sec sustained data rate to internal

T400 600

Abstract: IMS T414
Contextual Info: Low cost 32-bit transputer FEATURES • 32 bit architecture ■ 50 ns internal cycle time ■ 20 MHz only ■ 20 MIPS peak instruction rate ■ 10 MIPS sustained instruction rate ■ Pin compatible with IMS T805, IMS T800, IMS T425 and IMS T414 ■ 2 Kbytes on-chip static RAM

inmos T400

Abstract: T400-T20S AD1230 T4-0065 800-00030 T400-J20S AD123 inmos transputer reference manual imst400
Contextual Info: iZ J S G S -T H O M S O N ^ 7 # . » » I U I © « » IM S T 4 0 0 ® 32 bit transputer FEATURES 32 bit architecture 50 ns internal cycle time 20 MHz only 20 MIPS peak instruction rate 10 MIPS sustained instruction rate Pin compatible with IMS T805, IMS T800, IMS T425

AD T805

Abstract: B50R MEMAD11 T805 IMS T805-F25S IMST805 transputer Inmos t805 inmos transputer T225 inmos transputer T425
Contextual Info: 32-bit floating-point transputer FEATURES • 32 bit architecture ■ 40 ns internal cycle time ■ 25 MIPS peak instruction rate ■ 3.6 Mflops (peak) instruction rate ■ ■ Pin compatible with IMS T800, IMS T425, IMS T400 and IMS T414 Debugging support

inmos T414

Abstract: inmos T400 12u-1919-g19 25f5 T400 600 inmos transputer T425 T400 clock T800 transputer AD T805 IMS T414
Contextual Info: IMS T400 Low cost 32-bit transputer FEATURES H 32 bit architecture H 50 ns internal cycle time H 20 MHz only H 20 MIPS peak instruction rate H 10 MIPS sustained instruction rate H Pin compatible with IMS T805, IMS T800, IMS T425 and IMS T414 H 2 Kbytes on-chip static RAM

Contextual Info: S G S -1 H 0 M S 0 N « t i m i I g ï M a M Ê IMS T400 i Low cost 32-bit transputer FEATURES 32 bit architecture 50 ns internal cycle time 20 MHz only 20 MIPS peak instruction rate 10 MIPS sustained instruction rate Pin compatible with IMS T805, IMS T800, IMS T425

ec 16 b

Contextual Info: pmV MS HADE )W THIRD AW3LE PROJECTION HIS DRAUIHÖ 13 UNPUBLISHED. I RELE ftEVtSIOWS RLSE PER NPR 3954 WAS 9 0 -4 6Û Ê -12-5 £ 90-4606-4-3 REV REV REV REV REV REV 0 .1 5 [.QOS] PER PER PER PER PER PER EC EC EC EC EC EC 0020-512-95 0 0 2 0-T425-95 0020-74-9E

Contextual Info: ’My 22 Chapter 6 IMS T805 transputer mos* Engineering Data FEATURES 32 bit architecture 33 ns internal cycle time 30 MIPS peak instruction rate 4.3 Mflops (peak) instruction rate Pin compatible with IMS T800, IMS T425, IMS T400 and IMST414 Debugging support

inmos transputer T425

Abstract: T800 B411-8 TRAM IMST800 b008 IMS T800 IMSB008 ims pcb imsb411
Contextual Info: Chapter 20 167 IMS B411 TRAM 3 2 -b it transputer 1 Mbyte Size 1 oímos Engineering Data Reset • Analyse NotError - — < IMS T800 or 1 Mbyte LinkO - >| Linkl IMS T425 DRAM -I Link2 - -Link3 J -Terminated links FEATURES GENERAL DESCRIPTION

Inmos t805

Abstract: IMS T805-G25S IMS T805-F25S IMS T800 T400 T414 T425 T800 T805 inmos T414
Contextual Info: IMS T805 32-bit floating-point transputer FEATURES Floating Point Unit 32 32 bit architecture 40 ns internal cycle time 25 MIPS peak instruction rate 3.6 Mflops (peak) instruction rate Pin compatible with IMS T800, IMS T425, IMS T400 and IMS T414 Debugging support

specifications of tdr

Abstract: Inmos t805 IMS processor
Contextual Info: SGS-THOMSON IMS T805 ’H E S m M M 32-bit floating-point transputer FEATURES • ■ ■ 32 bit architecture 40 ns internal cycle tim e 25 M IPS peak instruction rate ■ 3.6 M flops (peak) instruction rate ■ Pin co m patible w ith IMS T800, IMS T425, IMS T400

PC 845 MOTHERBOARD CIRCUIT diagram

Abstract: PC 845 MOTHERBOARD VOLTAGE diagram inmos transputer T425 imsc004 ttm22 inmos transputer T225 PC 845 MOTHERBOARD CIRCUIT diagram PC KT805 IMSB426 inmos transputer reference manual
Contextual Info: TRANSPUTER TRAM SOLUTIONS Transtech Parallel Systems designs and manufactures embedded multi-processing products for OEM, end-user and scientific research applications. Transtech produces signal processing and computing systems based on SGSThomson transputers, PowerPC processors, Analog

Q400414

Abstract: 06040J7 TO810MH q2006l5 triac Q2008F51 Triac SC141D L201E5 SC136B L4004F91 T6401M
Contextual Info: LORAS INDUSTRIES ITrms Amps PART No. INC 42E VDRM IDRM Volts mAmps PACKAGE Q1 D 5500440 TRIAC IGT Q2 Q3 mAmps DOOOODt. T IL O R A “T - 2 5 ' O Î VGT Volts Q4 Ih mAmps ITM Amps VTM Volts 0.6 Amps ITrms TO-92 Package MAC974 MAC976 0.6 0.6 MA0&7fr " : MAC97A3 "•

Contextual Info: INSTR DE SI GN /DI SPLAY PDTS 3SE D • MflllGflb DDGGÜ3M T Kl IDEA _ a ii-ûv wdea - C 9> Description T-1-3/4,5 mm Round Flanged LED in Rightangle Holder w/Transparent LED w/Clear LED 5 mm dla. Cylindrical Flanged LED in Highoffset Holder

D4SL-N

Abstract: floatless switch diagram TL4019 E3RB
Contextual Info: 2014-2015 Industrial Components Solution Selection Guide Sensing Co n t ro l Co m p o n e n t s S w i t c h i n g Co m p o n e n t s S a fe t y Better machines OMRON Automation and Safety is a leading global supplier of automation systems serving industrial

sandisk micro sd

Abstract: digital clock using at89s52 microcontroller stepper motor control with avr application notes sandisk micro sd card pin configuration vhdl code for rs232 receiver STK 435 power amplifier Microcontroller AT89S52 vhdl code for ofdm Microcontroller AT89S52 40 pin fingerprint scanner circuit
Contextual Info: Atmel Corporation Atmel Operations Corporate Headquarters 2325 Orchard Parkway San Jose, CA 95131 TEL 1 408 441-0311 FAX 1 (408) 487-2600 Memory 2325 Orchard Parkway San Jose, CA 95131 TEL 1 (408) 441-0311 FAX 1 (408) 436-4314 Regional Headquarters Microcontrollers

74F74

Abstract: inmos transputer T225 transputer Inmos t805 FP 8022 74F04 800E 801C T222 T225
Contextual Info: IMS T225 16-bit transputer FEATURES H 16 bit architecture H 33 ns internal cycle time H 30 MIPS peak instruction rate H Debugging support H 4 Kbytes on-chip static RAM H 60 Mbytes/sec sustained data rate to internal memory H 64 Kbytes directly addressable external memory

HFD85

Contextual Info: 642-,+2-,/ >@097:7/?@=3 >75:/8 =38/C 4GDQROGP { Eplj]e]dq dgo [gkl { 6A koal[`af_ [YhYZadalq { 5 Fgje C [gf^a_mjYlagf Fad] Mg2>E5;4:97 { RlYf\Yj\ OCB dYqgml { VYk` la_`l Yf\ ^dmp hjgg^]\ lqh]k YnYadYZd] { Efnajgfe]flYd ^ja]f\dq hjg\m[l .QgHR [gehdaYfl/ { Nmldaf] Dae]fkagfk> .592; p 5524 p 5624/ ee

T427

Abstract: F 472 Z p549 ggk 64a t428ee2
Contextual Info: 31}}*1|: 6474,=>;0 3423 98@0; ;05,A 1EBOPMEN U U U U U U U U U U Fad] Mg2> E57895; Fad] Mg2>55:=78 .87=,.= /,=, .845 CgflY[l YjjYf_]e]fl 5A0 5B CgflY[l j]kaklYf[] 844eV Cgad hgo]j 544e .Yl 5A :UDC/ CgflY[l eYl]jaYd A_RfN60 A_Ma CgflY[l jYlaf_ 64A 694UAC LYp2 koal[`af_ ngdlY_]

HY3D

Abstract: B744 YL 440
Contextual Info: 64+*4/{5 >@097:7/?@=3 7:?3=9327/?3 <;B3= =38/C 4GDQROGP Fad] Mg2>E57895; X 54A koal[`af_ [YhYZadalq X Cj]]hY_]3[d]YjYf[] \aklYf[]@<ee A 2 3 X 9cU \a]d][lja[ klj]f_l` .Z]lo]]f [gad Yf\ [gflY[lk/ X 5 Fgje A e]]lk UDE 4;440 4:75 j]af^gj[] afkmdYlagf Fad] Mg2>8444:5<6

SU19

Contextual Info: 31~*1 ;=-6474,<=:0 47<0:60/4,<0 98?0: :05,@ 1EBPQNEO Y 54A koal[`af_ [YhYZadalq Fad] Mg2>E57895; Y SU19 569UAC Yhhjgn]\ Zq TK klYf\Yj\ .gfdq ^gj 5 Fgje A/ Y VYk` la_`l Yf\ ^dmp hjgg^]\ lqh]k YnYadYZd] Fad] Mg2>Q9459:696 Y 5 Fgje A Yf\ 5 Fgje C [gf^a_mjYlagfk