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    T805E Search Results

    T805E Datasheets Context Search

    Catalog Datasheet Type Document Tags PDF

    ic t805

    Abstract: IMS T805-F20E inmos transputer inmos transputer T225 T425 T800 t225 Inmos t805 IMS T805-G20E MEMAD11
    Contextual Info: SGS-THOMSON IMS T805E •HI 32-bit floating-point transputer - Extended temperature EATURES 32 bit architecture 50 ns internal cycle time 20 MIPS peak instruction rate 2.8 Mflops (peak) instruction rate Pin compatible with IMS T800 Floating Point Unit Debugging support


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    t805e32-bitic t805ims t805-f20e+8inmos transputerinmos transputer t225t425t800t225inmos t805ims t805-g20ememad11 PDF

    Inmos t805

    Abstract: IMS T805-F20E T425 T800 IMST800 21-F5 REAL32
    Contextual Info: IMS T805E 32-bit floating-point transputer – Extended temperature FEATURES APPLICATIONS Scientific and mathematical applications High speed multi processor systems High performance graphics processing – HUD/HDD displays Supercomputers Workstations and workstation clusters


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    t805e32-bitinmos t805ims t805-f20e+5t425t800imst80021-f5real32 PDF

    IMST222

    Abstract: IMST225 lwm 2464 a T805-G20E
    Contextual Info: SGS-THOMSON IMS T805E L K g lT IM M ! 32-bit floating-point transputer - Extended temperature EATURES 32 bit architecture 50 ns internal cycle tim e 20 M IPS peak instruction rate 2.8 M flops (peak) instruction rate Pin co m patible w ith IMS T800 Floating Point Unit


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    t805e32-bitimst222imst225+2lwm 2464 at805-g20e PDF

    T805E

    Contextual Info: w# SGS-THOMSON IMS T805E 32-bit floating-point transputer - Extended temperature FEATURES • 32 bit architecture ■ 50 ns internal cycle time ■ 20 MIPS peak instruction rate ■ 2.8 Mflops (peak) instruction rate ■ Pin compatible with IMS T800 ■


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    t805e32-bit PDF

    AD T805

    Abstract: B50R MEMAD11 T805 IMS T805-F25S IMST805 transputer Inmos t805 inmos transputer T225 inmos transputer T425
    Contextual Info: 32-bit floating-point transputer FEATURES • 32 bit architecture ■ 40 ns internal cycle time ■ 25 MIPS peak instruction rate ■ 3.6 Mflops (peak) instruction rate ■ ■ Pin compatible with IMS T800, IMS T425, IMS T400 and IMS T414 Debugging support


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    32-bitad t805b50rmemad11+7t805ims t805-f25simst805transputerinmos t805inmos transputer t225inmos transputer t425 PDF

    Contextual Info: ’My 22 Chapter 6 IMS T805 transputer mos* Engineering Data FEATURES 32 bit architecture 33 ns internal cycle time 30 MIPS peak instruction rate 4.3 Mflops (peak) instruction rate Pin compatible with IMS T800, IMS T425, IMS T400 and IMST414 Debugging support


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    imst414t805-g20simst805-g25st805-g30s+6t805-j20st805-j25st805-f20st805-f25st805-f30smil-std-883 PDF

    Inmos t805

    Abstract: IMS T805-G25S IMS T805-F25S IMS T800 T400 T414 T425 T800 T805 inmos T414
    Contextual Info: IMS T805 32-bit floating-point transputer FEATURES Floating Point Unit 32 32 bit architecture 40 ns internal cycle time 25 MIPS peak instruction rate 3.6 Mflops (peak) instruction rate Pin compatible with IMS T800, IMS T425, IMS T400 and IMS T414 Debugging support


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    32-bitinmos t805ims t805-g25sims t805-f25s+7ims t800t400t414t425t800t805inmos t414 PDF