752SS Search Results

D4042

Abstract: 74HC241 75LBC176 SN75LBC976
Contextual Info: SN75LBC976 9-CHANNEL DIFFERENTIAL TRANSCEIVER SLLS133B - D4042, AUGUST 1992 - REVISED FEBRUARY 1993 9 Differential Channels for the Data and Control Paths of the Differential Small Computer Systems Interface SCSI and Intelligent Peripheral Interface (IPI-2)

RS-422A

Abstract: SN65ALS176 SN75ALS176 SN75ALS176A SN75ALS176B
Contextual Info: SN65ALS176, SN75ALS176, SN75ALS176A, SN75ALS176B DIFFERENTIAL BUS TRANSCEIVERS S L L S 0 4 0 D -D 3 0 4 2 . A U G U S T 1987 - RE V IS E D AU G U S T 1991 Meets EIA Standards RS-422A and RS-485 and CCITT Recommendations V.11 and X.27 D OR P PACKAGE TOP VIEW

Contextual Info: SN54AHCT02, SN74AHCT02 QUADRUPLE 2-INPUT POSITIVE-NOR GATES SCLS262B - DECEM BER 1996 - REVISED MARCH 1996 Inputs Are TTL-Voltage Compatible EP/C Enhanced-Performance Implanted CMOS Process Package Options Include Plastic Small-Outllne (D), Shrink Small-Outllne

D1312

Abstract: LM311 application notes TL0811 LM311 LM311DBLE LM3113 LM311 OPERATIONAL AMPLIFIER OPERATION
Contextual Info: LM111, LM211, LM311, LM311Y DIFFERENTIAL COMPARATORS WITH STROBES D1312, SEPTEMBER 1973-REVISED FEBRUARY 1992 * Fast Response Times LM111. . . J PACKAGE {TOP VIEW Strobe Capability Maximum Input Bias Current. . . 300 nA Maximum Input Offset Current. . . 70 nA

SN74AS841

Contextual Info: SN74ALS841, SN74AS841A, SN74ALS842 10-BIT BUS-INTERFACE D-TYPE LATCHES WITH 3-STATE OUTPUTS SDAS069C - DECEMBER 1983 - REVISED JANUARY 1995 • 3-State Buffer-Type Outputs Drive Bus Lines Directly • Bus-Structured Pinout • Provide Extra Bus-Driving Latches

H R C M F 2J 225

Contextual Info: SN54ALS113A DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET SGAS003- DECEMBER 1994 J PACKAGE TOP VIEW • Fully Buffered to Offer Maximum Isolation From External Disturbance • Package Options Include Ceramic Chip Carriers (FK) and Ceramic (J) 300-mll DIPs

75LBC176

Abstract: LLS133C SN75LBC976 TV RECEIVER 1993 IF XMTA
Contextual Info: O IIO U O U S /O 9-C H A N N E L D IF F E R E N TIA L T R A N S C E IV E R S U S 133C - AUGUST 1992 - REVISED NOVEMBER 1993 • • Nine Differential Channels for the Data and Control Paths of the Differential Small Computer Systems Interface SCSI and Intelligent Peripheral Interface (IPI-2)

wallace tree

Abstract: binary multiplier S275 4 bit binary multiplier 4x4 bit multipliers AN 5274 LS183 types of binary multipliers S274 s283 gr c
Contextual Info: TYPES SN54LS275, SN54S274. SN54S275, SN74LS275, SN74S274, SN74S275 4-BIT-BY-4-BIT BINARY MULTIPLIER WITH 3-STATE OUTPUTS 7-BIT-SLICE WALLACE TREES WITH 3-STATE OUTPUTS TTL LSI B U L L E T IN N O . D L -S 761 2 12 1 , O C T O B E R 1976 'S274 Provides 8-Bit Product in Typically

SN74AHC06

Contextual Info: SN54AHC08, SN74AHC08 QUADRUPLE 2-INPUT POSITIVE-AND GATES SCLS236A - OCTOBER 1996 - REVISED MARCH 1996 Operating Range 2-V to 5.5-V Vqc EPIC Enhanced-Performance Implanted CMOS Process High Latch-Up Immunity Exceeds 250 mA Per JEDEC Standard JESD-17 ESD Protection Exceeds 2000 V Per

A14C

Abstract: A15C A23C A25C SN74ACT3622 SN74ACT3632 SN74ACT3642
Contextual Info: SN74ACT3642 1024x36x2 CLOCKED FIRST-IN, FIRST-OUT MEMORY SC A S440-JUN E 1994 IRB, ORB, AEB, and AFB Flags Synchronized by CLKB Low-Power 0.8-Micron Advanced CMOS Technology Supports Clock Frequencies up to 67 MHz Free-Running CLKA and CLKB Can Be Asynchronous or Coincident

transistor SR 13001

Abstract: RCA SK CROSS-REFERENCE PCD8572I ATmel 730 24c04 SR 13001 transistor atmel 716 24c04 UNITRODE applications handbook uc3842 -96 all 89c51 microcontroller references book QFP44 footprint HI5618
Contextual Info: INTEGRATED CIRCUITS DATA SHEET PCF5001 POCSAG Paging Decoder Product specification Supersedes data of 1995 Apr 27 File under Integrated Circuits, IC17 1997 Mar 04 Philips Semiconductors Product specification POCSAG Paging Decoder PCF5001 CONTENTS BLOCK DIAGRAMS

components combinational logic circuit

Abstract: EP18M-30C EP1830-25CFN 48-MACROCELL
Contextual Info: C D Itü U t C C D IC Q HIGH-PERFORMANCE 48-MACROCELL ONE-TIME PROGRAMMABLE LOGIC DEVICES S R E S 0 0 3-D 38 8 0, N O V EM BE R 1991 User-Configurable LSI Circuit Capable of Implementing 2100 Equivalent Gates of Conventional and Custom Logic High-Performance CMOS Process Allows:

Contextual Info: SN74ACT7882 2048 x 18 CLOCKED FIRST-IN, FIRST-OUT MEMORY SCAS446-JUNE 1894 • Member of the Texas Instruments Widebus Family • Independent Asynchronous Inputs and Outputs • Read and Write Operations Can Be Synchronized to Independent System Clocks

intel 8212

Abstract: D 8212 intel TIM8212 SN54S412 SN74S412 DI512
Contextual Info: TYPES SN54S412, SN74S412 TIM8212 MULTI-MODE BUFFERED LATCHES O C T O B E R 1 9 7 5 — R E V IS E D D E C E M B E R 19 8 3 S N 5 4 S 4 1 2 . . . J P AC KA G E S N 7 4 S 4 1 2 . . . D W , J OR N P AC KA G E PNP Inputs and 3-State Outputs Maximize I/O and Data Bus Capabilities

Contextual Info: 74ACT11194 4-BIT BIDIRECTIONAL UNIVERSAL SHIFT REGISTER D3391, NOVEMBER 1989 - REVISED APRIL 1993 • I I DW OR N PACKAGE TOP VIEW * Inputs Are TTL-Voltage Compatible * Parallel-to-Serlal, Serlal-to-Parallel Conversions I * Left or Right Shifts I * Parallel Synchronous Loading