74LS38 Search Results

74LS386

Abstract: SN54/74LS386 751A-02 SN54LSXXXJ SN74LSXXXD SN74LSXXXN 74LS386DC
Contextual Info: SN54/74LS386 QUAD 2-INPUT EXCLUSIVE-OR GATE QUAD 2-INPUT EXCLUSIVE-OR GATE LOW POWER SCHOTTKY VCC 14 13 12 11 10 9 8 J SUFFIX CERAMIC CASE 632-08 14 1 1 2 3 4 5 6 7 GND N SUFFIX PLASTIC CASE 646-06 14 1 14 1 D SUFFIX SOIC CASE 751A-02 ORDERING INFORMATION

Contextual Info: LS TTL DN74LS Series 74LS386 74LS386 N>74LS3?£ Quad 2 -input E xclu sive OR G ates • Description P-1 D N 74LS386 contains four 2-input exclusive O R gate circuits. ■ Features • • • • Low pow er consum ption Pd = 30.5m W typical High speed ( tpd = 1 In s typical)

Contextual Info: Am25LS15 Am25LS15 Quad Serial Adder/Subtractor DISTINCTIVE CHARACTERISTICS • • Magnitude only addition/subtraction Second sourced by T.l. as Am54LS/74LS385 Four independent adder/subtractors Use with two's complement arithmetic GENERAL DESCRIPTION The Am25LS15 is a serial two's complement adder/

Contextual Info: GD54/74LS38 QUAD 2-INPUT NAND BUFFERS WITH OPEN-COLLECTOR OUTPUTS Features • • Pin Configuration Usable in AND-Tie connection High fan-out lOL= 2 4 m A max Description Vcc 4B 4A 4Y 3B 3A 3Y 14 13 12 11 10 9 8 ijy This device contains four independent gates each

7438

Abstract: LS38 74S38 74LS 74LS38 N7438N N74LS38D N74LS38N N74S38D N74S38N
Contextual Info: 7438, LS38, S38 Signetics Buffers Quad Two-Input NAND Buffers Open Collectors Product Specification Logic Products TYPE TYPICAL SUPPLY CURRENT (TOTAL) TYPICAL PROPAGATION DELAY 7438 13ns 28mA 74LS38 19ns 3.5mA 74S38 6.5ns 33mA ORDERING CODE COMMERCIAL RANGE

74LS386

Abstract: N74LS386F N74LS386N S54LS386F S54LS386W
Contextual Info: 54LS/74LS386 ORDERING CODE PACKAGES PIN CONFIGURATION See Section 9 for further Package and Ordering Information C O M M E R C IA L RANGES ± 5%' t A = ° ° c *0 *70°c PIN CO N F. VCC = s v P lastic DIP Fig. A 74LS386N C eram ic DIP Fig. A N 74LS386F

74LS38

Contextual Info: g MOTOROLA SN54/74LS38 Rf^IRR R R R Q U A D 2-IN PU T N A N D B U F F E R m il LO W P O W E R S C H O T T K Y Lü Lil l ü Lîl L J *OPEN COLLECTOR OUTPUTS J Suffix — Case 632-08 (Ceramic) N Suffix — Case 646-06 {Plastic/ GUARANTEED OPERATING RANGES

Contextual Info: Signetics I 7438, LS38, S38 Buffers Quad Two-Input NAND Buffers Open Collectors Product Specification Logic Products TYPICAL SUPPLY CURRENT (TOTAL) TYPICAL PROPAGATION DELAY TYPE 7438 13ns 28mA 74LS38 19ns 3.5mA 74S38 6.5ns 33mA ORDERING CODE COMMERCIAL RANGE

74ls380

Abstract: LS380 DM54LS380J DM74LS380J DM74LS380N J24F LS273 LS374 LS377
Contextual Info: LS380 National Semiconductor DM54LS380/74LS380 Multifunction Octal Register General Description The ’LS380 is an 6 -bit synchronous register with parallel load, load complement, preset, clear, and hold capacity. Four control inputs LD, POL, CLR, PR provide one o f four

74LS385

Abstract: 54LS385
Contextual Info: SN54LS385, 74LS385 QUADRUPLE SERIAL ADDERS/SUBTRACTORS D 2 41 2, N O VEM BER 197 7 - F o u r Synchro n o u s Elem ents in a Single 20-Pin Package R E V IS E D M A R C H 1 9 8 8 SN 54LS385 . . . J PACKAGE S N 74LS385 . . . DW OR N PACKAGE {TOP VIEW Buffered C lo ck and D irect C lear Inputs

74LS381A

Abstract: 74LS381 74LS382 Functions Generators LS381A 74S381 54LS381
Contextual Info: SN 54LS381A, SN 54S381, SN 74LS381A, SN 54LS382A, SN 74LS382A, SN74S381 ARITHMETIC LOGIC UNITS/FUNCTION GENERATORS D2430, JANUARY 1981 - REVISED MARCH 1986 P IN D E S IG N A T IO N S S N S 4LS 381A . S N 54S 381 . . . J OR W P AC KA G E P IN NOS. F U N C T IO N

25s18

Abstract: 25LS2518
Contextual Info: Am25LS2518 Am25LS2518 Quad D Register with Standard and Three-State Outputs DISTINCTIVE CHARACTERISTICS Low-Power Schottky version of the popular Am 2918 and Am25S18 Four standard totem -pole outputs Four three-state outputs Four D-type flip-flops Second sourced by T. I. as the S N 54/74LS388

74LS574

Abstract: ttl 74LS173 74ls399 93L38 ttl 74165 ttl 7491 54LS 74LS266 ttl 74173 74LS568
Contextual Info: FAIRCHILD LOGIC/CONNECTION DIAGRAMS DIGITAL -TTL D93 54LS/74LS379 D94 9386, 74LS266, 54LS/74LS386 D95 54LS/74LS398 Vcc 1 4 5 12 13 4 5 7 6 14 15 17 16 lOa Ila lob lib lo c lie lod lid r ei fi r E5i r?i n S CP Qa Qb 2 GND Vcc = Pin 20 GND = Pin 10 Vcc = Pin 16

Contextual Info: 384 ì / / CONNECTION DIAGRAM PINOUT A O ' Di 54LS/74LS384 8-BIT SERIAL/PARALLEL TW OS COM PLEM ENT MULTIPLIER DESCRIPTION — The '384 is an 8-b it by 1-bit sequential lo gic elem ent that m ultiplies tw o numbers represented in twos com plem ent notation. The de­

LS380

Abstract: 83391 74ls380
Contextual Info: LS380 National Semiconductor DM54LS380/74LS380 Multifunction Octal Register General Description The ’LS380 is an 8 -bit synchronous register with parallel load, load complement, preset, clear, and hold capacity. Four control inputs LD, POL, CLR, PR provide one of four

IC 7438

Abstract: 74LS38 IC 74ls38 74LS38PC 74LS38D
Contextual Info: N A T IO N A L SEPIICOND {LO G IC } 02E D | t. 5 0 1 1 S 2 □ □ t,3 b h û 38 ö | T - f3 - jr CO NNECTIO N DIAGRAM PINO UT A 54/7438 54LS /74LS38 QUAD 2-INPUT NAND BUFFER With Open-Collector Output ORDERING CODE: See Section 9 PIN PKGS O UT COMMERCIAL GRADE

74LS386 EQUIVALENT

Contextual Info: ! LS TTL DN74LS Series 74LS386 74LS386 Quad 2 -input E xclu sive OR G ates • Description P-1 DN 74LS386 contains four 2-input exclusive O R gate circuits. ■ Features • • • • Low pow er consum ption P,j = 30.5m W typical High speed ( t pd = 1 In s typical)

83391

Contextual Info: LS380 O T National Jüfl Semiconductor DM54LS380/74LS380 Multifunction Octal Register General Description The ’LS380 is an B-bit synchronous register with parallel load, load complement, preset, clear, and hold capacity. Four control inputs LD, POL, CLR, PR provide one o f four

751A-02

Abstract: motorola ceramic dual in-line case 64606 74ls38
Contextual Info: SN54/74LS38 QUAD 2-INPUT NAND BUFFER QUAD 2-INPUT NAND BUFFER VCC 14 LOW POWER SCHOTTKY 13 12 11 10 9 * * * 1 2 8 * 3 4 5 6 J SUFFIX CERAMIC CASE 632-08 7 14 GND * OPEN 1 COLLECTOR OUTPUTS N SUFFIX PLASTIC CASE 646-06 14 1 14 1 D SUFFIX SOIC CASE 751A-02 ORDERING INFORMATION

74LS568

Abstract: TTL 74121 74167 74LSS02 74ls399 54LS 74LS266 9602 Fairchild 9602 74123 74ls379
Contextual Info: FAIRCHILD LOGIC/CONNECTION DIAGRAMS DIGITAL -TTL D93 54LS/74LS379 D94 9386, 74LS266, 54LS/74LS386 D95 54LS/74LS398 Vcc 1 4 5 12 13 4 5 7 6 14 15 17 16 lOa Ila lo b lib lo c lie lo d lid r ei f i r E5i r?i n S CP Qa Qb 2 GND Vcc = Pin 20 GND = Pin 10 Vcc = Pin 16

74L86

Contextual Info: TYPES SN54LS386A, 74LS386A QUADRUPLE 2-INPUT EXCLUSIVE-OR GATES MARCH 1974 — REVISED DECEMBER 1983 SN 54LS386A Electr sally Identical to SN 54LS86A/SN74LS86A J OR W PACKAG E SN 74LS386A D, J OR N PACKAG E T O P V IE W Mechanically Identical to SN 54L86/S N 74L86

74LS386

Contextual Info: 54LS/74LS386 ORDERING CODE PIN C O N F. PACKAGES PIN CONFIGURATION See Section 9 for further Package and Ordering Information M ILITA R Y RANGES C O M M E R C IA L RANGES VCC = 5V 1 5%; Ta = 0°C lo *70°C Plastic DIP Fig. A 74LS386N Ceramic DIP Fig. A

IC 7438

Abstract: IC TTL 7438 IO 7438 74ls38 IC 74ls38 LS38 7438
Contextual Info: Signelics I 7438, LS38, S38 Buffers Quad Two-Input NAND Buffers Open Collectors Product Specification Logic Products TYPICAL PROPAGATION DELAY TYPE TYPICAL SUPPLY CURRENT (TOTAL) 7438 13ns 28mA 74LS38 19ns 3.5mA 74S38 6.5ns 33mA ORDERING CODE COMMERCIAL RANGE

8 bit serial/parallel multiplier

Abstract: 74LS384DC 54LS384DM 54LS384FM 74LS384FC 74LS384PC 74LS384
Contextual Info: 384 S C O N N E C T IO N D IA G R A M / P IN O U T A 54LS/74LS384 8 -B IT SE R IA L/PA R ALLEL TW O S C O M P L E M E N T M U LTIP LIE R MR [7 T è i V cc x 3 [2 x D E S C R IP T IO N — T h e '384 is an 8 - b it b y 1 -b it se q u en tia l lo g ic e le m e n t th a t