74HC109 Search Results
74HC109 Result Highlights (5)
| Part | ECAD Model | Manufacturer | Description | Download | Buy |
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| CD74HC109M | Texas Instruments | High Speed CMOS Logic Dual Positive-Edge-Triggered J-K Flip-Flops with Set and Reset 16-SOIC -55 to 125 |
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| SN74HC109DRG4 | Texas Instruments | Dual J-K Positive-Edge-Triggered Flip-Flops With Clear and Preset 16-SOIC -40 to 85 |
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| CD74HC109E | Texas Instruments | High Speed CMOS Logic Dual Positive-Edge-Triggered J-K Flip-Flops with Set and Reset 16-PDIP -55 to 125 |
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| SN74HC109DR | Texas Instruments | Dual J-K Positive-Edge-Triggered Flip-Flops With Clear and Preset 16-SOIC -40 to 85 |
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| CD74HC109M96 | Texas Instruments | High Speed CMOS Logic Dual Positive-Edge-Triggered J-K Flip-Flops with Set and Reset 16-SOIC -55 to 125 |
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74HC109 Datasheets (23)
| Part | ECAD Model | Manufacturer | Description | Datasheet Type | PDF Size | Page count | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
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| 74HC109 | Philips Semiconductors | Dual J invertedK flip-flop with set and reset positive-edge trigger | Original | 57.64KB | 9 | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| 74HC109 | Philips Semiconductors | positive-edge trigger | Original | 50KB | 7 | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| 74HC109D | Philips Semiconductors | Dual J Inverted(K)Flip-flop with Set and Reset, Positive-Edge Trigger | Original | 57.63KB | 9 | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| 74HC109D | Unknown | Historical semiconductor price guide (US$ - 1998). From our catalog scanning project. | Historical | 32.93KB | 1 | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| 74HC109D,652 | NXP Semiconductors | Dual JK flip-flop with set and reset; positive-edge trigger - Description: Dual J-/K Flip-Flop with Set and Reset; Positive-Edge Trigger ; Fmax: 75 MHz; Logic switching levels: CMOS ; Output drive capability: +/- 5.2 mA ; Power dissipation considerations: Low Power or Battery Applications ; Propagation delay: 15@5V ns; Voltage: 2.0-6.0 V; Package: SOT109-1 (SO16); Container: Bulk Pack, CECC | Original | 57.61KB | 9 | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| 74HC109D,653 | NXP Semiconductors | Dual JK flip-flop with set and reset; positive-edge trigger - Description: Dual J-/K Flip-Flop with Set and Reset; Positive-Edge Trigger ; Fmax: 75 MHz; Logic switching levels: CMOS ; Output drive capability: +/- 5.2 mA ; Power dissipation considerations: Low Power or Battery Applications ; Propagation delay: 15@5V ns; Voltage: 2.0-6.0 V; Package: SOT109-1 (SO16); Container: Reel Pack, SMD, 13", CECC | Original | 57.61KB | 9 | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| 74HC109D/AUJ | Philips Semiconductors | Logic - Flip Flops, Integrated Circuits (ICs), IC FLIP FLOP DUAL J-K 16SOIC | Original | 9 | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| 74HC109DB | Philips Semiconductors | Dual J inverted(K) flip-flop with set and reset, positive-edge trigger | Original | 67.49KB | 9 | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| 74HC109DB | Unknown | Historical semiconductor price guide (US$ - 1998). From our catalog scanning project. | Historical | 32.93KB | 1 | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| 74HC109DB,112 | NXP Semiconductors | Dual JK flip-flop with set and reset; positive-edge trigger - Description: Dual J-/K Flip-Flop with Set and Reset; Positive-Edge Trigger ; Fmax: 75 MHz; Logic switching levels: CMOS ; Output drive capability: +/- 5.2 mA ; Power dissipation considerations: Low Power or Battery Applications ; Propagation delay: 15@5V ns; Voltage: 2.0-6.0 V; Package: SOT338-1 (SSOP16); Container: Tube | Original | 57.61KB | 9 | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| 74HC109DB,118 | NXP Semiconductors | Dual JK flip-flop with set and reset; positive-edge trigger - Description: Dual J-/K Flip-Flop with Set and Reset; Positive-Edge Trigger ; Fmax: 75 MHz; Logic switching levels: CMOS ; Output drive capability: +/- 5.2 mA ; Power dissipation considerations: Low Power or Battery Applications ; Propagation delay: 15@5V ns; Voltage: 2.0-6.0 V; Package: SOT338-1 (SSOP16); Container: Reel Pack, SMD, 13" | Original | 57.61KB | 9 | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| 74HC109DB-T | NXP Semiconductors | Dual JK flip-flop with set and reset; positive-edge trigger - Description: Dual J-/K Flip-Flop with Set and Reset; Positive-Edge Trigger ; Fmax: 75 MHz; Logic switching levels: CMOS ; Output drive capability: +/- 5.2 mA ; Power dissipation considerations: Low Power or Battery Applications ; Propagation delay: 15@5V ns; Voltage: 2.0-6.0 V | Original | 57.61KB | 9 | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| 74HC109DB-T | Unknown | Historical semiconductor price guide (US$ - 1998). From our catalog scanning project. | Historical | 32.93KB | 1 | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| 74HC109D-Q100J | Nexperia USA | Uncategorized - Miscellaneous - 74HC109D-Q100/SOT109/SO16 | Original | 790.33KB | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| 74HC109D-T | NXP Semiconductors | Dual JK flip-flop with set and reset; positive-edge trigger - Description: Dual J-/K Flip-Flop with Set and Reset; Positive-Edge Trigger ; Fmax: 75 MHz; Logic switching levels: CMOS ; Output drive capability: +/- 5.2 mA ; Power dissipation considerations: Low Power or Battery Applications ; Propagation delay: 15@5V ns; Voltage: 2.0-6.0 V | Original | 57.61KB | 9 | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| 74HC109D-T | Unknown | Historical semiconductor price guide (US$ - 1998). From our catalog scanning project. | Historical | 32.93KB | 1 | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| 74HC109DW | Philips Semiconductors | Dual J inverted(K) flip-flop with set and reset, positive-edge trigger | Original | 67.49KB | 9 | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| 74HC109N | Philips Semiconductors | Dual J Inverted(K)Flip-flop with Set and Reset, Positive-Edge Trigger | Original | 57.63KB | 9 | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| 74HC109N | Unknown | Historical semiconductor price guide (US$ - 1998). From our catalog scanning project. | Historical | 32.93KB | 1 | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
| 74HC109N,652 | NXP Semiconductors | Dual JK flip-flop with set and reset; positive-edge trigger - Description: Dual J-/K Flip-Flop with Set and Reset; Positive-Edge Trigger ; Fmax: 75 MHz; Logic switching levels: CMOS ; Output drive capability: +/- 5.2 mA ; Power dissipation considerations: Low Power or Battery Applications ; Propagation delay: 15@5V ns; Voltage: 2.0-6.0 V; Package: SOT38-4 (DIP16); Container: Bulk Pack, CECC | Original | 57.61KB | 9 | ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
74HC109 Price and Stock
Nexperia 74HC109D,653Flip Flop JK# -Type Pos-Edge 2-Element 16-Pin SO T/R |
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| Distributors | Part | Package | Stock | Lead Time | Min Order Qty | Price | Buy | ||||
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74HC109D,653 | 158,552 | 1,226 |
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| 74HC109D,653 | 27,500 | 1,226 |
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| 74HC109D,653 | 2,500 | 1,226 |
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74HC109D,653 | Tape & Reel | 24 Weeks | 7,500 |
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74HC109D,653 | 7,500 | 99 Weeks | 1 |
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74HC109D,653 | 2,281 | 1 |
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74HC109D,653 | 27,500 | 26 Weeks | 2,500 |
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NXP Semiconductors 74HC109D,652Flip Flop JK# -Type Pos-Edge 2-Element 16-Pin SO Tube |
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| Distributors | Part | Package | Stock | Lead Time | Min Order Qty | Price | Buy | ||||
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74HC109D,652 | 18,300 | 658 |
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| 74HC109D,652 | 5,875 | 658 |
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| 74HC109D,652 | 3,000 | 658 |
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| 74HC109D,652 | 2,550 | 658 |
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| 74HC109D,652 | 941 | 658 |
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74HC109D,652 | 30,666 | 1 |
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NXP Semiconductors 74HC109N,652Flip Flop JK# -Type Pos-Edge 2-Element 16-Pin PDIP Bulk |
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| Distributors | Part | Package | Stock | Lead Time | Min Order Qty | Price | Buy | ||||
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74HC109N,652 | 4,825 | 284 |
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| 74HC109N,652 | 4,000 | 284 |
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| 74HC109N,652 | 2,000 | 284 |
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| 74HC109N,652 | 2,000 | 284 |
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74HC109N,652 | 14,780 | 1 |
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NXP Semiconductors 74HC109D,653Flip Flop JK# -Type Pos-Edge 2-Element 16-Pin SO T/R |
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| Distributors | Part | Package | Stock | Lead Time | Min Order Qty | Price | Buy | ||||
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74HC109D,653 | 1,960 | 1,226 |
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Nexperia 74HC109PWJFlip Flop JK# -Type Pos-Edge 2-Element 16-Pin TSSOP T/R |
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| Distributors | Part | Package | Stock | Lead Time | Min Order Qty | Price | Buy | ||||
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74HC109PWJ | 1,377 | 1,108 |
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74HC109PWJ | Tape & Reel | 16 Weeks | 5,000 |
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74HC109 Datasheets Context Search
| Catalog Datasheet | Type | Document Tags | |
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74HC109Contextual Info: [ /Title CD74H C109, CD74H CT109 /Subject (Dual JK FlipFlop with Set and Reset CD54/74HC109, CD54/74HCT109 Data sheet acquired from Harris Semiconductor SCHS140A Dual J-K Flip-Flop with Set and Reset Positive-Edge Trigger March 1998 - Revised May 2000 Features |
Original |
cd54/74hc109cd54/74hct109schs140ahc109+7 | |
74HC109
Abstract: M74HC109 54HC 74HC M54HC109
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OCR Scan |
m54hc109m74hc10954/74ls109m54/74hc109+4 | |
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Contextual Info: [ /Title CD74H C109, CD74H CT109 /Subject (Dual JK FlipFlop with Set and Reset CD54/74HC109, CD54/74HCT109 Data sheet acquired from Harris Semiconductor SCHS140B Dual J-K Flip-Flop with Set and Reset Positive-Edge Trigger March 1998 - Revised December 2002 |
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cd54/74hc109cd54/74hct109schs140bhc109+5 | |
HCT109 harris
Abstract: 74HCT109
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cd74hct109cd54/74hc109cd54/74hct109+5 | |
CD74HC109E
Abstract: HC109 C109 CD54HC109F3A CD54HCT109F3A
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cd74hct109cd54/74hc109cd54/74hct109+7 | |
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Contextual Info: blE J> MOTOROLA SC LOGIC MOTOROLA b3b72SS OCHlTBb T33 inom • SEMICONDUCTOR TECHNICAL DATA MC54/74HC109 Dual J-K Flip-Flop w ith Set and Reset J SUFFIX CERAMIC CASE 620-09 High-Performance Silicon-Gate CMOS T he MC54/74HC109 is id en tic a l in p in o u t to th e LS109. T he device in p u ts are |
OCR Scan |
b3b72ssmc54/74hc109ls10954/74h | |
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Contextual Info: MOTOROLA SE M IC O N D U C TO R TECHNICAL DATA MC54/74HC109 Dual J-K Flip-Flop w ith Set and Reset J SUFFIX CERAMIC CASE 620*09 High-Performance Silicon-Gate CMOS T h e M C 5 4 /7 4 H C 1 0 9 is id e n tic a l in p in o u t to th e L S 1 0 9 . T h e d e v ic e in p u ts are |
OCR Scan |
mc54/74hc109 | |
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Contextual Info: - Technical Data File N um b er 1667 CD54/74HC109 C D54/74HCT109 High-Speed CMOS Logic Duai J-K Flip-Flop with Set and Reset Type Features: 9 2 C S -36532 • Positive-Edge triggered • A s y n c h ro n o u s S et a n d Reset m 60 M Hz Typical M axim um C lo ck Frequency |
OCR Scan |
cd54/74hc109d54/74hct10954/74h92cs-38533r2+2 | |
G0175Contextual Info: Technical Data File N um ber CD54/74HC109 CD54/74HCT109 T-HL'-Q'l -01 1667 High-Speed CMOS Logic HARR IS S E M I C O N D S E CT OR to 27E D B 4 3 0 2 27 1 0 D 1 7 S M b 2 • HAS Dual J-K Flip-Flop with Set and Reset T yp e Features: 2J 2 K -H 2C P 12 VCC = 1 0 |
OCR Scan |
cd54/74hc109cd54/74hct10992cs-38s3z54/74h+3 | |
CXXXNContextual Info: MOTOROLA SC -CLOGIC} 02 b3b72Sa 0000170 5 ~T-4:b-07 -ü -7 MOTOROLA S E M IC O N D U C T O R TECHNICAL DATA MC54/74HC109 D ual J -K Flip-Flop w ith S e t and Reset J SUFFIX CERAM IC CA SE 620-09 High-Performance Silicon-Gate C M O S ' The M C 54/74H C 109 is identical in pinout to the LS109. The device inputs are |
OCR Scan |
b3b72samc54/74hc10954/74hls109+2 | |
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Contextual Info: •Technical Data File Number 1667 CD54/74HC109 C D54/74H CT109 High-Speed CMOS Logic Dual J-K Flip-Flop with Set and Reset Type Features: 92 CS -385*2 ■ Positive-Edge triggered • Asynchronous Set and Reset ■ 60 MHz Typical Maximum Clock Frequency @ Vcc - 5 V, C l = 15 pF, n = 25° C |
OCR Scan |
cd54/74hc109d54/74hct109rca-cd54/74hc109+4 | |
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Contextual Info: GD54/74HC109, GD54/74HCT109 DUAL J-K FLIP-FLOPS W ITH PRESET & CLEAR General Description are identical in pinout with individual J, K, Clock, Preset, to Pin Configuration the flip-flops and Clear U IC L R p T inputs. T h e s e flip-flops are e d g e sensitive to the |
OCR Scan |
gd54/74hc109gd54/74hct109 | |
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Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA MC54/74HC109 Dual J-K Flip-Flop with Set and Reset J SUFFIX CERAMIC CASE 620-09 High-Performance Silicon-Gate CMOS T he M C 54/74H C 10 9 is iden tical in p in o u t to th e LS109. The device in p u ts are N SUFFIX PLASTIC |
OCR Scan |
mc54/74hc10954/74hls109 | |
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Contextual Info: G E SOLID STATE Dl D E I BÛ7SDÛ1 001152b 1 • -Technical Data File Number 0 1 -0 1 1667 CD54/74HC109 CD54/74HGT109 High-Speed CMOS Logic Dual J-K Flip-Flop with Set and Reset Type Features: 92CS-38532 ■ Positive-Edge triggered ■ Asynchronous Set and Reset |
OCR Scan |
001152bcd54/74hc109cd54/74hgt10992cs-38532+5 | |
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5555 FAIRCHILD optocoupler
Abstract: MC74HC374N 74hc14n equivalent NC7S125M5 14069 HCF4541BEY APPLICATION HCF4013BE 4026 fairchild datasheet 14543 motorola Motorola DM74LS139N
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scyb017aa0102035555 fairchild optocouplermc74hc374n+8 | |
74HC9046
Abstract: 74HCT4050 74hct7014 74HCT4049 74HC7541 74hct133 74HC9046A 74HC90 74HCT4059 74HC5555
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74hcu0474hctu0474hc0074hct00+16 | |
k2645
Abstract: k4005 U664B mosfet k4005 MB8719 transistor mosfet k4004 SN16880N stk5392 STR451 BC417
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mk135mk136mk137mk138+16 | |
schematic diagram atx Power supply 500w
Abstract: pioneer PAL 012A 1000w inverter PURE SINE WAVE schematic diagram 600va numeric ups circuit diagrams winbond bios 25064 TLE 9180 infineon smsc MEC 1300 nu TBE schematic diagram inverter 2000w DK55 circuit diagram of luminous 600va UPS
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p462-ndp463-ndlng295lfcp2ulng395mftp5u+11 | |
FSQ510 Equivalent
Abstract: BTA12 6008 bta16 6008 ZIGBEE interface with AVR ATmega16 Precision triac control thermostat thyristor t 558 f eupec gw 5819 diode transistor a564 A564 transistor BSM25GP120 b2
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gp-20fsq510 equivalentbta12 6008bta16 6008+7 | |
freescale h01
Abstract: 74hc04a A638AN U15C 74HC04 74HC163A 74HC595A U15B AN1687 74HC163
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Original |
an1687/dan1687rs-232mc33411+9 | |
BUK2114
Abstract: BUK2114-50SYTS saa7117 SAA7136E MPSA92 168 saa7136 buk2914-50syts TDA8920BTH bu4508dx KMZ52
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1n41481n45311n47xxa1ps10sb62+16 | |
74HC9046
Abstract: 74hct4050 74HC273 CMOS TTL Logic Family Specifications 74hc245 74HCT297 74hc154 application 74hct133 74hc297 application notes 74HC7014 74HCT299
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ot27-1ot38-4ot146-1ot101-1+14 | |
74HC109PContextual Info: MITSUBISHI HIGH S P E E D CMOS M 74H C 109P /FP /D P DUAL i-K F L I P - F L O P WITH S E T AND R E S E T DESCRIPTION T h e M 7 4 H C 1 0 9 is a s e m ic o n d u c to r in te g r a te d c irc u it c o n PIN CONFIGURATION TOP VIEW s is tin g of tw o p o s it iv e -e d g e t r ig g e r e d J - K flip flo p s w ith in |
OCR Scan |
74hc109p | |
74hc109m
Abstract: 74HC109 74HC109B1R M74HC109
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OCR Scan |
m54hc109m74hc10954/74ls109m54/74hc109+6 | |