74LS90 Search Results

BCD FREQUENCY METER

Abstract: DN74LS90 MA161
Contextual Info: 74LS90 LS TTL DN74LS Series 74LS90 Decade Counters P-1 • Description DN 74LS90 is an asynchronous decade counter w ith directcoupled reset in put and nine direct-coupled set input term i­ nals. ■ Features • • • Direct-coupled reset input Nine direct-coupled set inputs

counter 74490

Abstract: of 74ls90 IC decade counter
Contextual Info: TYPES SN54490, SN54LS490, SN74490, SN74LS490 DUAL 4-BIT DECADE COUNTERS O CTO BER Dual Versions of Popular SN 5490A, SN 54LS90, SN 7490A, and SN 74LS90 Counters 1 9 7 6 —R E V IS E D D ECEM BER 1983 SN 54490, SN 54LS490 . . . JO R W PACKAG E SN 74490 I OR N PACKAG E

74LS93 P

Abstract: IC 74LS90 of IC 74LS90 ic 74ls92 pin diagram of ic 74LS93 of IC 74LS93 IC 74LS93 IC 74LS90 internal diagram IC - 74LS93 ic 74LS90 pin diagram
Contextual Info: M M O T O R O SN54/74LS90 SN54/74LS92 SN54/74LS93 L A D E S C R IP T IO N — The S N 5 4 L S /7 4 L S 9 0 , S N 5 4 L S /7 4 L S 9 2 and SN 54U S/74LS93 are high-speed 4-bit ripple type counters partitioned into two sections. Each counter has a divide-by-two section and either a

SN74LS90d

Abstract: where are ls93 typically used 74LS90 application LS93J 74LS93 pin
Contextual Info: 74LS90 DECADE COUNTER; DIVIDE-BY-TWELVE COUNTER; 4-BIT BINARY COUNTER The SN54 / 74LS90, SN54 / 74LS92 and SN54 / 74LS93 are high-speed 4-bit ripple type counters partitioned into two sections. Each counter has a divide-by-two section and either a divide-by-five

bcd counter 74 90

Abstract: 7490APC 74LS90FC
Contextual Info: 90 CO NNECTIO N DIAGRAM PINOUT A / ^754/7490A ^54LS/74LS90 DECADE COUNTER DESCRIPTION — The '90 is a 4-stage ripple counter containing a high speed flip -flo p acting as a divide-by-tw o and three flip -flo p s connected as a divideby-five counter. It can be connected to operate with a conventional BCD out­

LS 7490

Abstract: 7490 pin configuration 7490 decade counter-7490 7490 Decade Counter decade counter 7490 7490 bcd counter 7490 N 74LS90 equivalent N74LS90
Contextual Info: 7490, LS90 Signetics Counters Decade Counter Product Specification Logic Products DESCRIPTION TYPICAL f MAX TYPICAL SUPPLY CURRENT 7490 30MHz 30mA 74LS90 42MHz 9mA TYPE T h e '9 0 is a 4-bit, rip p le -typ e D eca d e C ou n te r. T h e d e vice co n sists o f to u r

Contextual Info: GD54/74LS90 DECADE COUNTERS Description Each of these monolithic counters contains four masterslave flipflops and additional gating to provide a divide-by-two counter and a three-stage binary counter for which the count cycle length is divide-by-five for the LS90.

sn 7492 ttl

Abstract: 74293 pin diagram TTL 7493A TTL 74293 7493A 74162 74LS93 74293 74LS183 74LS90
Contextual Info: FAIRCHILD LOGIC/CONNECTION DIAGRAMS DIGITAL-TTL D121 54/7490A, 54LS/74LS90 D122 54/7492, 74LS92 D123 S4/74293, 54LS/74LS293 6 7 141 Vcc = Pin 5 GND = Pin 10 NC = Pin 4,13 - Vcc = Pin 5 GND = Pin 10 NC = 2, 3, 4, 13 D124 S4/7493A, 54LS/74LS93 D125 54/74176, 54/74177,

CI 74LS90

Abstract: ci 74193 ci 74ls193 CI 74196 ci 7492 CI 74176 74LS93 TTL 74293 TTL 7493A sn 7492 ttl
Contextual Info: FAIRCHILD LOGIC/CONNECTION DIAGRAMS DIG ITAL-TTL D121 54/7490A, 54LS/74LS90 D122 54/7492, 74LS92 D123 S4/74293, 54LS/74LS293 6 7 141 Vcc = Pin 5 GND = Pin 10 NC = Pin 4,13 - Vcc = Pin 5 GND = Pin 10 NC = 2, 3, 4, 13 D124 S4/7493A, 54LS/74LS93 D125 54/74176, 54/74177,

Contextual Info: • Decade Counters The H D 74LS90 contain* four mester-tiave flip-flop* and addi­ tional sating to provide a divide-by-two counter and threestag* binary counter for divide-by-five. T h is device hat a gated zero reset and alto hat gated set-to-nine input* for use in BCD

pin diagram of ic 74ls90

Abstract: 74LS93 P ic 74ls92 74LS93A 74LS93 74LS90 74LS92 IC - 74LS93 motorola 74ls90 kcd5
Contextual Info: M M O T O R O L A SN54LS/74LS90 SN54LS/74LS92 SN54LS/74LS93 D E S C R IP T I O N — T h e S N 5 4 L S / 7 4 L S 9 0 , S N 5 4 L S / 7 4 L S 9 2 and S N 5 4 L S / 7 4 L S 9 3 are high-speed 4-bit ripple type counters partitioned into tw o sections. Each counter has a divide-by-two section and either a

74LS190 pins

Abstract: 74LS192 PIN diagram 74LS183 TTL 74ls163 74LS192 pins Synchronous 74163 74LS161 74160 74LS162 74LS191 pins
Contextual Info: FAIRCHILD LOGIC/CONNECTION DIAGRAMS D IG IT A L-T T L D121 54/7490A, 54LS/74LS90 D122 54/7492, 74LS92 D123 S4/74293, 54LS/74LS293 6 7 141 Vcc = Pin 5 GND = Pin 10 N C = Pin 4,13 - Vcc = Pin 5 GND = Pin 10 N C = 2, 3, 4, 13 D124 S4/7493A, 54LS/74LS93 D125 54/74176, 54/74177,

Contextual Info: M MOTOROLA. SN54/74LS90 SN54/74LS92 SN54/74LS93 DECADE COUNTER; DIVIDE-BY-TWELVE COUNTER; 4-BIT BINARY COUNTER The SN 54/74LS 90, S N 54/74LS 92 and S N 54/74LS 93 are high-speed 4-bit ripple type counters partitioned into two sections. Each counter has a divide-by-two section and either a divide-by-five (LS90), divide-by-six (LS92) or

Contextual Info: S G S-THOMSON 42E D / = T SCS-THOMSON A 7 # M e la m i ® *! * QG33bS0 a'BSfifH T74LS490 T-V5-23-'3 DUAL DECADE COUNTER • DUAL VERSION OF 74LS90 ■ INDIVIDUAL ASYNCHRONOUS CLEAR AND PRESET TO 9 FOR EACH COUNTER ■ COUNT FREQUENCY - TYPICALLY 35 MHz

74LS183

Abstract: 74LS193 sn 7492 ttl TTL 74293 TTL 7490 54LS TTL 74LS93 74ls90 74LS93 ttl 7493
Contextual Info: FAIRCHILD LOGIC/CONNECTION DIAGRAMS D IG IT A L-T T L D121 54/7490A, 54LS/74LS90 D122 54/7492, 74LS92 D123 S4/74293, 54LS/74LS293 6 7 141 V cc = Pin 5 G N D = Pin 10 N C = Pin 4 ,1 3 - V cc = Pin 5 G N D = Pin 10 N C = 2, 3, 4, 13 D124 S4/7493A, 54LS/74LS93

HD74LS90

Abstract: pin DIAGRAM OF IC 74ls90 74LS90 IC application CI 74LS90 ic 74LS90 pin diagram 1S2074 74LSOO IC 74LS90 Hitachi Scans-001 HD-74LS90
Contextual Info: •D e c a d e Counters The H D 74LS90 contains four master-slave flip-flops and addi­ tional gating to provide a divide-by-two counter and three- IBLOCK DIAGRAM stage binary counter for divide-by-five. This device has a gated zero reset and also has gated set-to-nine inputs for use in BCD

HD74LS90

Abstract: CI 74LS90 74ls90 PIN DIAGRAM HD-74LS90 74ls90 logic 1S2074 74LS90 Hitachi Scans-001
Contextual Info: •Decade Counters The H D 74LS90 contains four master-slave flip-flops and addi­ IB LO C K D IA G R A M tional gating to provide a divide-by-two counter and threestage binary counter for divide-by-f ive. This device has a gated zero reset and also has gated set-to-nine inputs for use in BCD

HD74LS90

Contextual Info: •D ecade Counters The H D 74LS90 contains four master-slave flip-flops and addi­ IBLOCK DIAGRAM tional gating to provide a divide-by-two counter and threestage binary counter for divide-by-five. This device has a gated zero reset and also has gated set-to-nine inputs for use in BCD

74LS90

Abstract: 74ls90 logic TTL 74LS93 SN54/74LS93 74LS90 application 74LS93 74LS93 pin diagram circuit diagram of 74ls92 74LS90 DATASHEET application of 74LS90
Contextual Info: SN54/74LS90 SN54/74LS92 SN54/74LS93 DECADE COUNTER; DIVIDE-BY-TWELVE COUNTER; 4-BIT BINARY COUNTER The SN54 / 74LS90, SN54 / 74LS92 and SN54 / 74LS93 are high-speed 4-bit ripple type counters partitioned into two sections. Each counter has a divide-by-two section and either a divide-by-five LS90 , divide-by-six (LS92) or

74LS90

Abstract: 74LS93 pin diagram 74LS93 P circuit diagram of 74ls92 TTL 74ls90 74LS93 logic symbol TTL 74LS93 74LS90 pin diagram 74LS93 74LS92
Contextual Info: SN54/74LS90 SN54/74LS92 SN54/74LS93 DECADE COUNTER; DIVIDE-BY-TWELVE COUNTER; 4-BIT BINARY COUNTER The SN54 / 74LS90, SN54 / 74LS92 and SN54 / 74LS93 are high-speed 4-bit ripple type counters partitioned into two sections. Each counter has a divide-by-two section and either a divide-by-five LS90 , divide-by-six (LS92) or

M74LS90P

Abstract: M74LS90
Contextual Info: MITSUBISHI LSTTLs 74LS90P DECADE COUNTER DESCRIPTION The M 74LS90P PIN CONFIGURATION TOP VIEW is a s em ico n d u c to r in teg ra te d c irc u it c o n ta in in g an asynchronous decade c o u n te r fu n c tio n w ith d ire c t reset in puts and d ire c t 9-set inputs.

74LS90

Abstract: IC 74LS93 pin diagram of ic 74ls90 74LS93 IC - 74LS93 74LS93 P 74LS92 of IC 74LS90
Contextual Info: M MOTOROLA SN54/74LS90 SN54/74LS92 SN54/74LS93 DECADE COUNTER; DIVIDE-BY-TWELVE COUNTER; 4-BIT BINARY COUNTER T h e S N 5 4 /7 4 L S 9 0 , S N 5 4 /7 4 L S 9 2 and S N 5 4 /7 4 L S 9 3 are h ig h -sp ee d 4 -b it ripple typ e c o u n te rs p artitio n e d into tw o s e ction s. E a ch c o u n te r has a div id e -b y -tw o s e ctio n and e ith e r a d ivid e -b y-five (L S 90 ), d ivid e -b y-six (L S 92 ) o r

74LS93A

Abstract: pin diagram of ic 74ls90 74LS93 IC 74LS93 of IC 74LS90 74LS92 IC 74LS90 74LS90 of IC 74LS93 IC - 74LS93
Contextual Info: Ä M O T O R O L A SN54LS/74LS90 SN54LS/74LS92 SN54LS/74LS93 D E S C R I P T I O N — T h e S N 5 4 L S / 7 4 L S 9 0 , S N 5 4 L S / 7 4 L S 9 2 and S N 5 4 L S / 7 4 L S 9 3 are high-speed 4-bit ripple type counters partitioned into two sections. Each counter has a divide-by-two section and either a

of 74LS90

Abstract: IC 74LS90
Contextual Info: r z 7 S G S -T H O M S O N A T # IL[1O T « S s T 7 4 LS 490 DUAL DECADE COUNTER • DUAL VERSION OF 74LS90 ■ INDIVIDUAL ASYNCHRONOUS CLEAR AND PRESET TO 9 FOR EACH COUNTER ■ COUNT FREQUENCY - TYPICALLY 35 MHz ■ INPUT CLAMP DIODES LIMIT HIGH SPEED