74AUP1G07 Search Results

74AUP1G07SE-7

Abstract: 74AUP1G07
Contextual Info: 74AUP1G07 SINGLE BUFFER/DRIVER WITH OPEN DRAIN OUTPUT Description Pin Assignments The Advanced Ultra Low Power AUP CMOS logic family is designed for low power and extended battery life in portable applications. The 74AUP1G07 is a single buffer gate with an open drain output

Contextual Info: 74AUP1G07 SINGLE BUFFER/DRIVER WITH OPEN DRAIN OUTPUT Description Pin Assignments The Advanced Ultra Low Power AUP CMOS logic family is designed for low power and extended battery life in portable applications. The 74AUP1G07 is a single buffer gate with an open drain output

74AUP1G07GX

Contextual Info: 74AUP1G07 Low-power buffer with open-drain output Rev. 7 — 16 July 2012 Product data sheet 1. General description The 74AUP1G07 provides the single non-inverting buffer with open-drain output. The output of the device is an open drain and can be connected to other open-drain outputs to

74AUP1G07

Abstract: 74AUP1G07GF 74AUP1G07GM 74AUP1G07GW JESD22-A114E MO-203
Contextual Info: 74AUP1G07 Low-power buffer with open-drain output Rev. 03 — 17 June 2009 Product data sheet 1. General description The 74AUP1G07 provides the single non-inverting buffer with open-drain output. The output of the device is an open drain and can be connected to other open-drain outputs to

Contextual Info: 74AUP1G07 Low-power buffer with open-drain output Rev. 5 — 15 November 2011 Product data sheet 1. General description The 74AUP1G07 provides the single non-inverting buffer with open-drain output. The output of the device is an open drain and can be connected to other open-drain outputs to

Contextual Info: 74AUP1G07 Low-power buffer with open-drain output Rev. 01 — 10 October 2006 Product data sheet 1. General description The 74AUP1G07 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families.

Contextual Info: 74AUP1G07 Low-power buffer with open-drain output Rev. 6 — 12 April 2012 Product data sheet 1. General description The 74AUP1G07 provides the single non-inverting buffer with open-drain output. The output of the device is an open drain and can be connected to other open-drain outputs to

74AUP1G07

Abstract: 74AUP1G07GF 74AUP1G07GM 74AUP1G07GW
Contextual Info: 74AUP1G07 Low-power buffer with open-drain output Rev. 4 — 2 September 2010 Product data sheet 1. General description The 74AUP1G07 provides the single non-inverting buffer with open-drain output. The output of the device is an open drain and can be connected to other open-drain outputs to

Contextual Info: 74AUP1G07 SINGLE BUFFER/DRIVER WITH OPEN DRAIN OUTPUT Description Pin Assignments The Advanced Ultra Low Power AUP CMOS logic family is designed ( Top View ) for low power and extended battery life in portable applications. ( Top View ) The 74AUP1G07 is a single buffer gate with an open drain output

74AUP1G07GW

Abstract: MO-203 74AUP1G07 74AUP1G07GF 74AUP1G07GM JESD22-A114E
Contextual Info: 74AUP1G07 Low-power buffer with open-drain output Rev. 02 — 14 June 2007 Product data sheet 1. General description The 74AUP1G07 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. Schmitt trigger action at all inputs makes the circuit tolerant to slower input rise and fall

SOT-353

Contextual Info: NPA Number 022 September 2012 New Product Announcement Announcement LOGIC Advanced Ultra-Low Power Logic 74AUP1Gxx Description Advanced Ultra Low Power CMOS Single Gate Logic • 0.8 V to 3.6 V • 4 ma drive capability at 3.0 V  7 ns typical propagation time at 3V

Contextual Info: 74AUP1G07 LOW-POWER SINGLE BUFFER/DRIVER WITH OPEN-DRAIN OUTPUTS www.ti.com SCES591A – JULY 2004 – REVISED JULY 2005 FEATURES • • • • • • • Available in the Texas Instruments NanoStar and NanoFree™ Packages Low Static-Power Consumption

AP3039AM

Abstract: 12SN7 AZ1117EH-3 AP3031K zabg6001 SMBJ11CA ztx689 DMN33D8L ap1901 AP3502
Contextual Info: Diodes Incorporated RoHS & REACH Compliance Re: End of Vehicle Life Directive EVL 2000/53/EC and Annex II (EVL II) 2000/53/EC Restrictions of Hazardous Substances Directive (RoHS) 2002/95/EC (repealed as from 3 January 2013 but listed here for completeness) & 2011/65/EU (RoHS II)

hef4051

Abstract: 74AUP2G34 74LVT1403 74ABT543A 74LV74 74AVCH1T45 74HC590 CBTD3306 NCX2200 74HC40103
Contextual Info: ロジック IC データスイッチ/アナログスイッチ コンパレータ レベルシフタ 汎用ロジック Index 2 ●● P3 NXP ロジック ●● P4 低抵抗アナログスイッチ/データスイッチ ●● P7 コンパレータ ●●

NXP 74LVC1G

Abstract: SN74LVC2G TC7SZU04 "cross-reference" 74AHC1G14 SOT-23 SCYT129E SN74AUP AUP1G00 74AUP3G17 TC7SG125 nxp Cross-reference
Contextual Info: Little Logic Guide Gates Configurables Signal Switches Translators www.ti.com/littlelogic 2012 Little Logic Guide ➔ Table of Contents Overview 3 Little Logic Products by Performance 4 Logic Migration to 1.8-V Future . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4