74AUP1G07GW Search Results

74AUP1G07GX

Contextual Info: 74AUP1G07 Low-power buffer with open-drain output Rev. 7 — 16 July 2012 Product data sheet 1. General description The 74AUP1G07 provides the single non-inverting buffer with open-drain output. The output of the device is an open drain and can be connected to other open-drain outputs to

SOT-353

Contextual Info: NPA Number 022 September 2012 New Product Announcement Announcement LOGIC Advanced Ultra-Low Power Logic 74AUP1Gxx Description Advanced Ultra Low Power CMOS Single Gate Logic • 0.8 V to 3.6 V • 4 ma drive capability at 3.0 V  7 ns typical propagation time at 3V

74AUP1G07

Abstract: 74AUP1G07GF 74AUP1G07GM 74AUP1G07GW JESD22-A114E MO-203
Contextual Info: 74AUP1G07 Low-power buffer with open-drain output Rev. 03 — 17 June 2009 Product data sheet 1. General description The 74AUP1G07 provides the single non-inverting buffer with open-drain output. The output of the device is an open drain and can be connected to other open-drain outputs to

Contextual Info: 74AUP1G07 Low-power buffer with open-drain output Rev. 5 — 15 November 2011 Product data sheet 1. General description The 74AUP1G07 provides the single non-inverting buffer with open-drain output. The output of the device is an open drain and can be connected to other open-drain outputs to

Contextual Info: 74AUP1G07 Low-power buffer with open-drain output Rev. 01 — 10 October 2006 Product data sheet 1. General description The 74AUP1G07 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families.

Contextual Info: 74AUP1G07 Low-power buffer with open-drain output Rev. 6 — 12 April 2012 Product data sheet 1. General description The 74AUP1G07 provides the single non-inverting buffer with open-drain output. The output of the device is an open drain and can be connected to other open-drain outputs to

74AUP1G07

Abstract: 74AUP1G07GF 74AUP1G07GM 74AUP1G07GW
Contextual Info: 74AUP1G07 Low-power buffer with open-drain output Rev. 4 — 2 September 2010 Product data sheet 1. General description The 74AUP1G07 provides the single non-inverting buffer with open-drain output. The output of the device is an open drain and can be connected to other open-drain outputs to

74AUP1G07GW

Abstract: MO-203 74AUP1G07 74AUP1G07GF 74AUP1G07GM JESD22-A114E
Contextual Info: 74AUP1G07 Low-power buffer with open-drain output Rev. 02 — 14 June 2007 Product data sheet 1. General description The 74AUP1G07 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. Schmitt trigger action at all inputs makes the circuit tolerant to slower input rise and fall