7475 TTL Search Results

PIN CONFIGURATION 7475

Abstract: 7475 D latch LS 7475 7475 Quad bistable latches pin configuration pin configuration of 7475 TTL 7475 7475 7475 data latch pin diagram 7475 pin diagram of 7475
Contextual Info: 7475, LS75 Signetics Latches Quad Bistable Latch Product Specification Logic Products FEATURES TYPICAL PROPAGATION DELAY TYPICAL SUPPLY CURRENT TOTAL 7475 18ns (tpi_n) 9ns ( t PHL) 32mA 74LS75 15ns (tpLH) 9ns (t p h l ) 6.3mA TYPE • 4-bit bistable latch

7475 D latch

Abstract: 7477 D latch TTL 7475 7475 data latch pin diagram 7475 pin diagram of 7475 TTL 7477 7477 7475 9377
Contextual Info: TTL/MSI 9375/5475, 7475 9377/5477, 7477 4 -BIT LATCH DESCRIPTIO N - The T T L /M S I 9 3 75/5475, 7475 and 9 3 7 7/5 4 7 7 , 7477 are latches used as tem porary storage fo r binary in fo rm a tio n between processing units and in p u t/o u tp u t or indicator units. In fo rm a tio n present

74LS75N

Abstract: logic diagram of ic 7475 pin diagram of ic 7475 D latch ci 7475 ic 7475 pin diagram of ic 7475 7475 D latch ic 7475 latch TTL 7475 pin of 7475
Contextual Info: 7475, LS75 Latches Signetics Quad Bistable Latch Product Specification Logic Products FEATURES T Y P IC A L PR O P A G A TIO N D E LA Y T Y P IC A L SU PP LY C U R R E N T T O T A L 7475 18ns (tpi_H) 9ns (tpHLÌ 32m A 74LS75 15ns (tpLHÏ 9ns (tpH l) 6.3m A

PIN CONFIGURATION 7475

Abstract: Equivalent 74LS75 TTL 7475 7475 D latch 74LS75 7475 Quad bistable latches pin configuration
Contextual Info: 7475, LS75 Signelics Latches Quad Bistable Latch Product Specification Logic Products FEATURES • 4-bit bistable latch • Refer to 74LS375 for Vcc and GND on corner pins DESCRIPTION The '75 has four bistable latches. Each 2-bit latch is controlled by an active

TTL 7475

Abstract: 7475 D latch PIN CONFIGURATION 7475 7475 data latch Equivalent 74LS75 7475 ttl pin diagram of 7475 7475 latch 7475F 74LS75 functions
Contextual Info: 7475, LS75 S ig n e tics Latches Quad Bistable Latch Product Specification Logic Products FEATURES • 4-bit bistable latch • Refer to 74LS375 for Vcc anc* GND on corner pins DESCRIPTION The '75 has four bistable latches. Each 2-bit latch is controlled by an active

Contextual Info: TYPES SN5475, SN5477, SN54L75, SN54L77, SN54LS75, SN54LS77, SN7475, SN74LS75 4-BIT BISTABLE LATCHES M ARCH logic each latch INPUTS C (TOP VIEW) OUTPUTS a L H L H H H X L Qo 1983 SN547&, SN54LS75 . . . J OR W PACKAGE SN 54L75 . . . J PACKAGE SN 7475 . . . J OR N PACKAGE

LS 7475

Abstract: C4408
Contextual Info: SN5475, SN5477, SN54LS75, SN54LS77. SN7475, SN74LS75 4 BIT BISTABLE LATCHES MAR CH 1 9 7 4 - each latch (TOP VIEW) OUTPUTS INPUTS REVISED M A R C H 1 9 8 8 SN 5475 , SN 54LS75 . . . J OR W PACKAGE S N 7475 . . . N PACKAGE SN 74LS 75 . . . D O R N PACKAGE

SN7477

Abstract: SN7441 SN7490 sn7490 data SN7490 counter SN74100 SN54100 SN5475 SN7475 SN74100J
Contextual Info: TTL MSI CIRCUIT TYPES SN5475, S N 5 4 77, SN54100, S N 7475 , S N 7 4 7 7 , SN74100 8-BIT A N D 4-BIT BISTABLE LATCHES SN5477/SN7477 W FLAT PACKAGE TOP VIEW IQ 2Q ® C lj ^ K GND NC ® • ® ■ SN5475/SN7475 J OR N DUAL-IN-LINE OR W FLAT PACKAGE (TOP V IE W )*

CI 7473

Abstract: counter with 7473 7490 Decade Counter 7476 up down counter 7476 counter ci 74192 decade counter 7492 74122 Retriggerable Monostable Multivibrator ci 7476 7490 counter
Contextual Info: BIPOLAR DIGITAL ICs continued :lip-flops T 7472/5472 T 7473/5473 T 7474/5474 T 7476/5476 T 74107/54107 T 74121/54121 T 74122/54122 T 74123/54123 Jther functions T 7441 A/5441 A T 7442/5442 T 7443/5443 T 7444/5444 T 7475/5475 T 7481/5481 T 7483/5483 T 7484/5484

54LS

Abstract: 74LS LS75 SN5475 SN5477 SN54LS75 SN54LS77 SN7475 SN74LS75 ls-77
Contextual Info: SN5475, SN5477, SN54LS75, SN54LS77, SN7475, SN74LS75 4-BIT BISTABLE LATCHES MARCH 1974 - REVISED MARCH 1988 S N 5 4 7 5 . S N 5 4 L S 7 5 . . . J OR W P A C K A G E SN 7475 . NPACKAGE SN 74LS75 . . . D OR N PACKAGE F U N C TIO N T A B L E e a ch latch IN P U T S

SN 5477

Contextual Info: TYPES SN5475, SN5477, SN54L75, SN54L77, SN54LS75, SN54LS77, SN7475, SN74LS75 4-BIT BISTABLE LATCHES M A R C H 1 9 7 4 - R E V IS E D D E C E M B E R 1 9 8 3 S N 5475, SN 54LS75 . . J OR W PACKAGE S N 54L75 . . . J PACKAGE S N 7475 . . . J OR N PACKAGE SN74LS75 . , . D, J OR N PACKAGE

TTL 7475

Contextual Info: 5 Vdc or 3.3 Vdc • PLASTIC MOLDED J-LEADED SURFACE MOUNT • HCMOS OR TTL PROGRAMMABLE CLOCK OSCILLATORS ASMP and ASMLP FEATURES: • Wide range of frequency up to 125 MHz using PLL Technology • Quick delivery within one to five days. • Plastic Molded SMD.

Capacitor 0.01 uF

Abstract: Abracon ASML
Contextual Info: 22355 Abracon CORX 2-29.qxd 3/6/00 6:53 AM Page 31 5 Vdc or 3.3 Vdc • ULTRA MINIATURE CERAMIC SURFACE MOUNT • TIGHT STABILITY CRYSTAL CLOCK OSCILLATORS ASF and ASFL FEATURES: • Compact and Low in Height. 1.6 mm • Low current consumption; 5 Vdc or 3.3 Vdc.

7400 fan-out

Abstract: 7402 nor 7491 8-bit 7490 Decade Counter TTL 7400 TTL 7400 AND propagation delay TTL 7400 propagation delay TTL 7475 TTL 7490 7402 J-K Flip-Flop
Contextual Info: Logic Integrateci Circuits, MIC 7400 Series TTL G a te s in order of gates per package Type M IC M IC M IC M IC M IC M IC M IC M IC M IC M IC M IC M IC 7430 7453 7454 7420 7440 7450 7451 7460 7410 7400 7401 7402 Positive logic definition Gates per package

Contextual Info: 22355 Abracon CORX 2-29.qxd 3/6/00 6:53 AM Page 33 HCMOS/ TTL COMPATIBLE CERAMIC SURFACE MOUNT CRYSTAL CLOCK OSCILLATORS ASL FEATURES: • Leadless chip carrier LCC , low profile. • HCMOS and TTL Compatible. • Tristate Enable / Disable Function. • High Density Surface-Mount Applications.

10ttl

Abstract: ABRACON ASM
Contextual Info: 22355 Abracon CORX 2-29.qxd 3/6/00 6:53 AM Page 35 J -LEADED • PLASTIC MOLDED • SURFACE MOUNT CRYSTAL CLOCK OSCILLATORS ASM Series FEATURES: • Industry Standard J-Leaded Terminals. • Plastic Molded SMD. • HCMOS and TTL Compatible. • Tristate Enable / Disable.

ci 7475

Abstract: D147 74LS109 74L576 TTL 7475 pin diagram 7475 rs latch 74LS78 fairchild 9314 74LS279
Contextual Info: FAIRCHILD LOGIC/CONNECTION DIAGRAMS DIGITAL -T T L 7 1 2 6 3 5 1 i l Ao A R B O a A 2 b A 3 e E l d e 13 12 11 10 RBI f 9 E 9 15 3 2 4 m 14 Do So Qo 5 7 iw iE iE i[i3 ii« in F 5 if» i Ü 2 S 2 $3 Da Qi O 2 Q 3 13 12 10 r r 14 15 Vcc = Pin 16 GND = Pin 8

d146

Abstract: RS latch 74LS78 74LS114 7475 D latch d147 CI 74196 74LS112 7475 data latch fairchild 9314
Contextual Info: FAIRCHILD LOGIC/CONNECTION DIAGRAMS DIGITAL-TTL MASTER/SLAVE D59a 54H/74H78 13 A « — 2 4— J. So Q 9— J Q U » CP CP o 1— 10 ¿ So CD 0—3 8_ K Ä Q Co —I I_ Vcc = Pin 14 GND = Pin 7 in Ü Q UJ EDGE-TRIGGERED 9 O (9 D58 54H/74H106 D59b 54H/74H108

CI 7474

Abstract: CI 7473 ci 7476 7474 D latch CI 74LS76 CI 74107 TTL 74ls76 fairchild 9024 ci 74LS74 74ls107
Contextual Info: FAIRCHILD LOGIC/CONNECTION DIAGRAMS DIGITAL -TTL MASTER/SLAVE EDGE-TRIGGERED D55 9020 D60 9024, 54/74109, 54S/74S109, 54LS/74LS109 ui 9 D UJ 5 -=pi (3 J Q 2 — J SD 0 CP Z o (3 11 4 K Ä 0 Co “LT in > _6 12 CP 3 -0 14 K Co ° 7 o-i- CP 13 —c K Cd °

7475 D latch

Abstract: D146 D147 ci 7475 rs latch 74LS109 74LS78 74LS107 74LS114 7475 data latch
Contextual Info: FAIRCHILD LOGIC/CONNECTION DIAGRAMS DIGITAL-TTL D82 54LS/74LS78 D81 54LS/74LS541 V cc |S5| RSj FSI F7| F»l FS1 j b j j j F5I Fä| F I j j j SD SD J Q J C CP Q — e Q 5— 9 CP K >— 12 Q K CD CD LlI l i l LiJ L il L iT I U LzJ Ll I ü ü bsJ QNO 9 3 4 li

TCXO SMD mtbf

Abstract: SMD INDUCTOR marking code UM smd code ml6 ACt 7199 ca TCXO mtbf 12,800 SMD MARKING CODE g25 Quartz Crystal 32.768KHz vc 1222L Quartz Crystal Oscillators 3.57MHz asfl1
Contextual Info: 22355 Abracon CORX 2-29.qxd 3/6/00 6:50 AM Page 1 ABRACON C O R P O R AT I O N A Worldwide Leading Supplier of Electronic Components Mission Statement ABRACON Corporation’s mission is to continuously grow by promoting invaluable contributions from our employees and suppliers

STR W 5453 A

Abstract: STR 5453 STR W 5453 STR W 5453 C Truth Table 74190 Truth Table 74192 74193 truth table truth table 7454 str w c 5453 Truth Table 74193
Contextual Info: TTL/MSI 9393/5493, 7493 4 -B IT BINARY COUNTER D E S C R IP T IO N -T h e T T L /M S I 9393/5 4 9 3 , 7493 is a 4-Bit Binary Counter consisting of four master/ slave flip-flops which are internally interconnected to provide a divide-by-two counter and a divide-by-eight counter. A gated direct reset line is provided which inhibits the count inputs and

decoder 7448

Abstract: BCD D147 D142 7448 decoder mos 9368 decoder 74LS47 7-seg 9317C ttl 74ls48 9317B
Contextual Info: FAIRCHILD INTERFACE DISPLAY DRIVERS Yes Yes No 1.3 5.5 H — 125 D141 4L,6B, 9B 2 5449 7-Seg Decoder TTL Yes Yes No 9.6 5.5 H — 165 D142 3I 3 54LS/ 74LS49 7-Seg Decoder/ TTL Dvr OC Yes Yes No 1.3 5.5 H — 40 D142 3I,6A, 9A 4 9302 1-of-10 OC Dvr TTL Yes

ic 7475 latch

Abstract: ic 74121 74121 ic application circuits of ic 74121 weighing scale IC 7474 flipflop Digital Weighing Scale schematic AM2504 features of ic 7474 7474 D latch
Contextual Info: Application Note 17 December 1985 Considerations for Successive Approximation A→D Converters Jim Williams conversion speeds below 2 s, although they are quite expensive. Because of these factors, it is often desirable to build, rather than buy, a high speed 12-bit SAR converter.