54LS12 Search Results

54LS221

Contextual Info: M M O T O R O L A M ilitary 54LS221 Dual Monostable Multivibrator, Schm itt Trigger Inputs With Enable MPO ELECTRICALLY TESTED PER: MIL-M-38510/31402 • • • /////// 54LS221 is a Dual Highly Stable One-Shot Overriding Clear Terminates Output Pulse Pin Out is Identical to 54LS123

54LS122

Abstract: motorola 5118
Contextual Info: g MOTOROLA Military 54LS122 Retriggerable Monostable Multivibrator (with Clear) M P0 ELECTRICALLY TESTED PER: MIL-M-38510/31403 This DC triggered multivibrator features pulse width control by three methods. The basic pulse width is programmed by selection of external

JM38510 motorola

Contextual Info: M MOTOROLA. Military 54LS12 Triple 3-Input Positive NAND Gate MP0 ELECTRICALLY TESTED PER: MIL-M-38510/30006 LOGIC DIAGRAM Vcc C1 Y1 C3 B3 A3 IIIIHI Y3 AVAILABLE AS: 1) JAN: JM38510/30006BXA 2) SMD: N/A 3)883: 54LS12/BXAJC X = CASE OUTLINE AS FOLLOWS: PACKAGE: CERDIP: C

Contextual Info: g M ilitary 54LS126A MOTOROLA Quad Bus B uffer G a te N o n -In vertin g C ontrol In p u t MPO ELECTRICALLY TESTED PER: MIL-M-38510/32302 LOGIC DIAGRAM Vcc C4 A4 Y4 C3 A3 /# # /# # / Y3 AVAILABLE AS: 1) JAN: JM38510/32302BXA 2) SMD: N/A 3)883: 54LS126A/BXAJC

Contextual Info: M M O T O R O L A M ilita ry 54L S 12 Triple 3-In p u t P ositive NAND G ate MP0 ELECTRICALLY TESTED PER: MIL-M-38510/30006 MUH LOGIC DIAGRAM Vcc Cl Y1 C3 B3 A3 Y3 AVAILABLE AS: 1) JAN: JM38510/30006BXA 2) SMD: N/A 3)883: 54LS12/BXAJC X = CASE OUTLINE AS FOLLOWS:

Contextual Info: Dual Monostable Multivibrator with Schmitt-Trigger Inputs LS221 FEATURES above ta b le b y choo sin g a p p ro p ria te tim in g c o m p o n e n ts . W ith R ex t = 2 k f i and C e x t = 0, an o u tp u t pulse o f t y p i ­ • LS221 is Dual Version of 54LS123, One Shot on a

Contextual Info: 54LS125 Signetics Buffer Quad 3-State Buffer Product Specification Military Logic Products FUNCTION TABLE INPUTS H L X Z ORDERING INFORMATION. D ESCRIPTIO N O U T PU T ORDER CODE C A Y Ceram ic DIP 54LS125/BCA L L H L H X H H (Z) Ceram ic Flat Pack 54LS125/BDA

Contextual Info: SN 5412, SN 54LS12 SN7412, SN74LS12 TRIPLE 3-INPUT POSITIVE-NAND G A TES WITH OPEN COLLECTOR OUTPUTS D E C E M B E R 1 9 8 3 - R E V IS E D M A R C H • Package Options Include Plastic ''Sm all O utline" Packages, Ceramic Chip Carriers and Flat Packages, and Plastic and Ceramic

54LS125

Abstract: 54LS125ADMQB 54LS125AFMQB 54LS125ALMQB DM54LS125AW DM74LS125AM DM74LS125AN E20A J14A
Contextual Info: NATIONAL SENICOND -CLOGIO 31E D bSGliaa QGbTöbB 3 54LS125A/54LS125A/DM74LS125A Quad TRI-STATE Buffers General Description that two outputs will attempt to take a common bus to oppo­ site logic levels, the disable time Is shorter than the enable time of the outputs.

54LS126

Abstract: 54LS126DMQB 54LS126FMQB DM74LS126AM DM74LS126AN M14A N14A W14B LS 2140
Contextual Info: LS126A National Semiconductor 54LS126/DM74LS126A Quad TRI-STATE Buffers General Description This device contains four independent gates each of which performs a non-inverting buffer function. The outputs have the TRI-STATE feature. When enabled, the outputs exhibit

Contextual Info: g Military 54LS125A MOTOROLA Quad Bus Buffer Gate Inverting Control Input HPO m in i ELECTRICALLY TESTED PER: MIL-M-38510/32301 LOGIC DIAGRAM Vcc C4 A4 Y4 C3 A3 Y3 AVAILABLE AS: 1) JAN: JM38510/32301BXA 2) SMD: N/A 3)883: 54LS125A/BXAJC X = CASE OUTLINE AS FOLLOWS:

54LS125

Abstract: 54LS125A 54LS125ADMQB 54LS125AFMQB 54LS125ALMQB DM54LS125A DM54LS125AJ DM54LS125AW DM74LS125A DM74LS125AM
Contextual Info: 54LS125A 54LS125A DM74LS125A Quad TRI-STATE Buffers General Description This device contains four independent gates each of which performs a non-inverting buffer function The outputs have the TRI-STATE feature When enabled the outputs exhibit the low impedance characteristics of a standard LS output

54LS122

Abstract: 1n916 substitution
Contextual Info: MOTOROLA M ilitary 54LS122 R e trigge ra b le M o n o sta b le M u ltiv ib ra to r w ith Clear MP0 m ill / ELECTRICALLY TESTED PER: MIL-M-38510/31403 This d-c triggered m ultivibrators feature pulse w idth control by three methods. The basic pulse w idth is programmed by selection of external

6L6V

Contextual Info: M M O TO R O LA M ilitary 54LS 126A Quad Bus B u ffer G ate N o n -In vertin g C o ntro l In p u t ELECTRICALLY TESTED PER: MIL-M-38510/32302 LOGIC DIAGRAM Vcc C4 A4 Y4 C3 AVAILABLE AS: A3 Y3 1) JAN: JM38510/32302BXA 2} SMD: * 3) 883C: 54LS126A/BXAJC X = CASE OUTLINE AS FOLLOWS:

54LS123

Contextual Info: M MOTOROLA Military 54LS123 Dual Retriggerable Monostable Multivibrator (with Clear) ELECTRICALLY TESTED PER: MIL-M-38510/31401 This DC triggered multivibrator features pulse width control by three methods. The basic pulse width is programmed by selection of external

54LS125A

Abstract: 1N697
Contextual Info: <8>M O T O R O L A Military 54LS125A Quad Bus Buffer G ate Invertin g Control Input ÈêÊÎ&îîÉ MPO ELECTRICALLY TESTED PER: MIL-M-38510/32301 mini LOGIC DIAGRAM V cc C4 A4 Y4 C3 A3 Y3 AVAILABLE AS: 1 JAN: JM 38510/32301BXA 2) SMD: N/A 3)883: 54LS125A/BXAJC

LS125A-G

Abstract: Bus Buffers TTL 74126 SN54LS126A LS125A-A ls125a SN74125 LS126A SN54125 SN54LS125A
Contextual Info: SN54125, SN54126, 54LS125A, 54LS126A, SN74125, SN74126, SN74LS125A, SN74LS126A QUADRUPLE BUS BUFFERS WITH 3-STATE OUTPUTS DECEMBER 1983 - REVISED MARCH 1988 SN 54125, SN 54126, SN 54LS125A, SN 54LS126A . J OR W PACKAG E SN 74125, SN 74126 . . . N PACKAG E

Contextual Info: LS126A NATIONAL SEMICOND -CLOGIO bSGliaa OGbTflbb T 31E D T 'H ^ t ó - o o National Semiconductor 54LS126/DM74LS126A Quad TRI-STATE Buffers General Description This device contains four Independent gates each of which performs a non-inverting buffer function, The outputs have

IC ATA 2388

Abstract: ATA 2388
Contextual Info: SN54125, SN54126, 54LS125A. 54LS126A, SN74125, SN74126, SN74LS125A, SN74LS126A QUADRUPLE BUS BUFFERS WITH 3 STATE OUTPUTS DECEMBER 19B3 - REVISED MARCH 1988 S N 54125, SN5 41 26 , SN 54LS125A, S N 5 4 L S 1 2 6 A . . J OR W P AC KA G E • Quad Bus Buffers

JM38510 motorola

Abstract: 54LS12 Y1 smd BXAJC
Contextual Info: g M ilitary 5 4 L S 1 2 M O TO R O LA Triple 3-Input P o sitiv e NAND G a te MP0 ELECTRICALLY TESTED PER: MIL-M-38510/30006 mini LOGIC DIAGRAM V cc C1 Y1 C3 B3 A3 Y3 AVAILABLE AS: 1) JAN : JM38510/30006BXA 2) SMD: N/A 3 )8 8 3 : 54LS12/BXAJC X = CASE OUTLINE AS FOLLOW S:

Contextual Info: Signetics 54LS125 B uffer Quad 3-State Buffer Product Specification Military Logic Products ORDERING INFORMATION. FUNCTION TABLE INPUTS H L X Z ORDER CODE DESCRIPTION OUTPUT C A Y Ceramic DIP 54LS125/BCA L L H L H X H H (Z) Ceramic Flat Pack 54LS125/BDA

motorola 6147

Abstract: TPH21
Contextual Info: MOTOROLA Military 54LS125A Quad Bus Buffer Gate Inverting Control Input H P O m in i ELECTRICALLY TESTED PER: MIL-M-38510/32301 LOGIC DIAGRAM V cc w A4 Y4 AVAILABLE A S: C3 A3 1} JA N : JM38510/32301BXA 2 SMD: * 3) 883C: 54LS125A/BXAJC X = C A SE OUTLINE A S FO LLOW S:

sm 6136 b

Abstract: 1FW 07 1FW 87 54LS123 1FW ST SM 6136 1FW 75 1FW 74 1FW 55
Contextual Info: M MOTOROLA Military 54LS123 D u a l R e trigge rab le M o n o sta b le M u ltiv ib ra to r (w ith Clear) ELECTRICALLY TESTED PER: MIL-M-38510/31401 AVAILABLE A S: T h is d-c triggered m ultivibrator features pulse width control b y three m ethods. T he basic pulse width is p ro g ra m m e d by selection o f external

Contextual Info: g Military 54LS126A MOTOROLA Quad Bus Buffer Gate Non-Inverting Control Input MP0 ELECTRICALLY TESTED PER: MIL-M-38510/32302 lllllll LOGIC DIAGRAM Vcc C4 A4 Y4 A3 C3 Y3 AVAILABLE AS: 1) JAN: JM38510/32302BXA 2) SMD: N/A 3)883: 54LS126A/BXAJC X = CASE OUTLINE AS FOLLOWS: