54LS09 Search Results

Contextual Info: NATIONAL SEflICOND -ELOGIO 31E D • h 5 D H S 2 GQLTTHl G T '4 3 - l 6 -0 0 National Semiconductor 54LS09/54LS09/DM74LS09 Quad 2-Input AND Gates with Open-Collector Outputs Pull-Up Resistor Equations General Description This device contains four independent gates each of which

Contextual Info: 54LS09/54LS09/DM74LS09 Quad 2-Input AND Gates with Open-Collector Outputs General Description Pull-Up Resistor Equations This device contains four independent gates each of which performs the logic AND function. The open-collector out­ puts require external pull-up resistors for proper logical op­

54LS09

Abstract: 54LS09DMQB 54LS09FMQB DM54LS09J DM54LS09W DM74LS09M DM74LS09N E20A J14A
Contextual Info: a National Semiconductor 54LS09/54LS09/DM74LS09 Quad 2-Input AND Gates with Open-Collector Outputs General Description Pull-Up Resistor Equations This device contains four independent gates each of which performs the logic AND function. The open-collector out­

DM54LS09J

Abstract: DM54LS09W DM74LS09 DM74LS09M DM74LS09N E20A 54LS09 54LS09DMQB 54LS09FMQB DM54LS09
Contextual Info: 54LS09 54LS09 DM74LS09 Quad 2-Input AND Gates with Open-Collector Outputs General Description Pull-Up Resistor Equations This device contains four independent gates each of which performs the logic AND function The open-collector outputs require external pull-up resistors for proper logical operation

Contextual Info: g M ilitary 54LS09 MOTOROLA Quad 2-Input A N D Gate HP0 ELECTRICALLY TESTED PER: MIL-M-38510/31005 LOGIC DIAGRAM Vcc B4 A4 Y4 B3 A3 /////// Y3 AVAILABLE AS: 1) JAN: JM38510/31005BXA 2) SMD: N/A 3)883: S4LS09/BXAJC X = CASE OUTLINE AS FOLLOWS: PACKAGE: CERDIP: C

406J

Abstract: 54LS09 54LS09DMQB 54LS09FMQB DM54LS09J DM54LS09W DM74LS09M DM74LS09N E20A J14A
Contextual Info: June 1989 54LS09/54LS09/DM74LS09 Quad 2-Input AND Gates with Open-Collector Outputs Pull-Up Resistor Equations General Description V çç Min - Vqh This device contains lour independent gates each of which performs the logic AND function. The open-collector out­

54ls09

Contextual Info: M MOTOROLA M ilitary 54LS09 Quad 2-Input A N D Gate ELECTRICALLY TESTED PER: MIL-M-38510/31005 LOGIC DIAGRAM VCC B4 A4 Y4 B3 A3 Y3 AVAILABLE A S: It JA N : JM38510/31005BXA 2) S M D : * 3) 883C. 54LS09/BXAJC X = C A S E OU TLINE A S FO LLOW S: P AC KA G E: CERD IP: C

JM38510 motorola

Contextual Info: M MOTOROLA M ilita ry 54L S 09 Quad 2-In p u t AND G a te MP0 ELECTRICALLY TESTED PER: MIL-M-38510/31005 intuì LOGIC DIAGRAM Vcc 84 B3 A3 AVAILABLE AS: 1) JAN: JM38510/31005BXA 2) SMD: N/A 3)883: 54LS09/BXAJC X = CASE OUTLINE AS FOLLOWS: PACKAGE: CERDIP: C

Contextual Info: LS09 a National Semiconductor 54LS09/54LS09/DM74LS09 Quad 2-Input AND Gates with Open-Collector Outputs General Description Pull-Up Resistor Equations This device contains four independent gates each of which performs the logic AND function. The open-collector out­

Contextual Info: SN5409, 54LS09, SN54S09, SN7409, SN74LS09, SN74S09 QUADRUPLE 2-INPUT POSITIVE-AND GATES WITH OPEN-COLLECTOR OUTPUTS DECEMBER 1 9 8 3 -R E V IS E D M A R C H 1 9 8 8 Package Options Include Plastic "Sm all Outline" P ackages, Ceram ic Chip Carriers and Flat P ackages, and Plastic and Ceram ic

IC TTL 7409

Contextual Info: SN5409, 54LS09, SN54S09. <SN7dflQ QRI7AI CflQ QH7dQnQ QUADRUPLE 2 INPUT POSITIVE-AND GATES WITH OPEN-COLLECTOR OUTPUTS DECEMBER 1 9 8 3 -R E V IS E D M A R C H 1 9 8 8 I S N 5 4 0 9 , S N 5 4 L S 0 9 . S N S 4 S 0 9 . . . J OR W P A C K A G E SN 7409 . . . N PACKAG E

54LS09

Abstract: 54LS09DMQB 54LS09FMQB DM54LS09J DM54LS09W DM74LS09 DM74LS09M DM74LS09N E20A J14A
Contextual Info: E M IC D N D U C T O R t DM74LS09 Quad 2-Input AND Gates with Open-Collector Outputs General Description Pull-U p Resistor Equations This device contains four independent gates each of which perform s the logic A N D function. T he open-collector outputs require external pull-up resistors fo r proper logical operation.

74LS115

Abstract: 74LS273 74LS189 equivalent 74LS00 QUAD 2-INPUT NAND GATE 74LS265 fan-in and fan out of 7486 74LS93A 74LS181 74LS247 replacement MR 31 relay
Contextual Info: F A IR C H IL D LOW POWER S C H O T T K Y D A TA BOOK ERRATA SHEET 1977 Device Page Item Schematic 2-5 Figure 2-6. Blocking diode in upper right is reversed. Also, diode con­ necting first darlington emitter to output should have series resistor. LS33 5-25

SN74ALS123

Abstract: SN7401 74LS424 54175 SN74298 SN74265 SN74LS630 SN74LS69 National Semiconductor Linear Data Book Transistor AF 138
Contextual Info: INDEX • FUNCTIONAL SELECTION GUIDE • NUMERICAL FUNCTION INTERCHANGEABILITY GUIDE GENERAL INFORMATION AND EXPLANATION OF NEW LOGIC SYMBOLS ORDERING INSTRUCTIONS AND MECHANICAL DATA 54/74 SERIES OF COMPATIBLE TTL CIRCUITS • PIN OUT DIAGRAMS 54/74 FAMILY SSI CIRCUITS

DM74367

Abstract: 54175 71ls97 DM74109 DM8160 om541 ci 8602 gn block diagram 5401 DM transistor 74L10 74S136
Contextual Info: N ational Semiconductor Section 1 - 54/74 SSI DEVICES Connection Diagram s • Electrical Tables Section 2 - 54/74 M SI DEVICES Section 3 - National Semiconductor PROPRIETARY DEVICES Section 4 - National Semiconductor ADDITIONAL D EV KES t o NATIONAL Manufactured under one or more of the fo llowing U.S. patents: 3083262, 3189758, 3231797 , 3303356, 3317671, 3323071, 3381071, 3408542, 3421025, 3426423, 3440498, 3518750, 3519897, 3557431, 3560765,

54LS641

Abstract: CD Octal D-type flip-flop 74LS00 QUAD 2-INPUT NAND GATE 54LS642 54LS154 74LS00 quad TTL nand gate 74ls00 NAND gate SchottkyBarrierDiode 54LS92 54LS623
Contextual Info: MAXIMUM RATINGS Supply Voltage - Vcc T h e S e rie s 5 4 L S /7 4 L S Schottky TTL family features both Schottky-barrier-diode inputs and em itte r inputs and u tilizes full Schottky-barrier-diode clamping to achieve speeds com parable to Series 54/74 at one-fifth of the

74LS09PC

Contextual Info: 09 CONNECTION DIAGRAM PINOUT A v£4/7409 O''bV V V54S/74S09 '/54LS/74LS09 t?r0 / ' 2 QUAD 2-INPUT AND GATE With Open-Collector Output ORDERING CODE: See Section 9 PIN PKGS OUT COMMERCIAL GRADE MILITARY GRADE Vcc = +5.0 V ±5%, T a = 0°C to +70° C Vcc = +5,0 V ±10%,

DM74LS09

Abstract: DM74LS09M DM74LS09N E20A 54LS09 54LS09DMQB 54LS09FMQB DM54LS09J DM54LS09W
Contextual Info: DM74LS09 Quad 2-Input AND Gates with Open-Collector Outputs General Description Pull-Up Resistor Equations This device contains four independent gates each of which performs the logic AND function. The open-collector outputs require external pull-up resistors for proper logical operation.

13003 application notes

Abstract: 3L0E diode X 13003 1N3064 1AMI
Contextual Info: M I L - M - 3 8 5 1 0 / 3 IO C 18 NOVEMBER 1987 SUPERSEDING MIL-M-38510/310B 28 April 1982 MILITARY SPECIFICATION MICROCIRCUITS, DIGITAL, BIPOLAR LOW-POWER SCHOTTKY TTL, AND GATES, MONOLITHIC SILICON This specification 1s.approved for use by all Depart­ ments

54ACT3301

Abstract: 54ACT3301 die national semiconductor 54ls123j JM38510/30002BCA M38510/10304 5962R8773901VCA 01001BEA DM54LS244J/883 dm54ls74j 54154J
Contextual Info: ENHANCED SOLUTIONS DESIGN/PROCESS CHANGE NOTIFICATION formerly Military & Aerospace Division PCN Nr: 2001 Listing
 
   Issued: 01/09/2001   Product ID (Description): Proposed Date of Change: Description of Change: Effect of Change:

Contextual Info: R C H II_ D •M ICO N DUCTO R r DM74LS09 Quad 2-Input AND Gates with Open-Collector Outputs General Description Pull-Up Resistor Equations This device contains fo u r independent gates each of which perform s the logic AN D function. The open-collector outputs

54LS09

Contextual Info: REVISIONS DATE DESCRIPTION LTR D e le te page 3 , t a b le I , VQH minimum t e s t . YR-MO-DA APPRO VED 1987 June 16 Add VQH minimum t e s t = 5 .5 V maximum to recommended o p e ra tin g c o n d it io n s . Add fo o tn o te f o r t pHL and in c re a s e maximum l i m i t s to 49 n s.

LG color tv Circuit Diagram schematics

Abstract: texas ttl YJ 162A Texas Instruments TTL integrated circuits catalog SN74180 AC digital voltmeter using 7107 Sii 9024 MC3123 sn74ls860 SN7490AJ sn74243
Contextual Info: IN D EXES Alphanumeric • Functional/Selection Guide IN T E R C H A N G E A B ILIT Y GUIDE G E N E R A L INFORM ATION O RD ERIN G IN STRUCTIO N S AND M ECH A N ICA L D A TA 5 4 /7 4 FA M ILIE S OF CO M PATIBLE T T L C IR C U ITS 54/74 F A M IL Y SSI C IR C U ITS

54S38

Abstract: SN74298 SN74265 54175 NES 1004 naval specification 74L95 Transistor AF 138 07802-1 SN7437 SN54LS195A
Contextual Info: m - G EN ER A L IN F O R M A TIO N INDEXES Numerical • Functional/Selection Guide O R D E R IN G INSTRUCTIO NS A N D M E C H A N IC A L D ATA 1 1 5 4/74 F A M IL Y SSI C IR CU ITS 2 I 54/74 F A M IL Y M S I/LSI C IR C U ITS 3 S E R IE S 29000 S S I C IR C U IT S