54ALS11 Search Results

Contextual Info: SN74ALS112A, 54ALS112A DUAL J-K NEGATIVE-EDGE-TRIGGERED FUP-FLOPS WITH CLEAR AND PRESET 02661, A PRIL 1982 - REVISED MAY 1986 • Fully Buffered to Offer Maximum Isolation from External Disturbance • Package Options Include Plastic "Small Outline" Packages, Ceramic Chip Carriers,

DM74ALS

Abstract: OM74ALS
Contextual Info: ÉjA Semiconductor 54ALS113A/DM74ALS113A Dual J-K Negative-EdgeTriggered Flip-Flops with Preset General Description Features The D M 54 A L S 1 13 A is a d u a l e d g e -trig g e re d flip -flo p . E ach flip -flo p h a s in d iv id u a l J, K,_clock, and p re s e t in p u ts , and

MH1SS1

Abstract: TESLA mh 7400 MH 7404 mh 7400 tesla cdb 838 tda 7851 L 741PC TDB0124DP tda 4100 TDA 7851 A
Contextual Info: m ö lk ^ o e le l-c te n a n il-c Information Applikation RGW Typenübersicht Vergleich Teil 2: RGW M iM U Z A U l KÉD lnrüÖC=SraO Information Applikation HEFT 50 RGW Typenübersicht + Vergleich Teil 2: RGW wob Halbleiterwerk Frankfurt /oder bt r iab im v«b kombinat mikrootektronik

Contextual Info: ± 1. SCOPE 1.1 Scope. T h is drawing d escrib es the requirements fo r m onolithic s ilic o n , advanced low power S ch o ttky, TTL, J-K f lip - f lo p s m ic r o c ir c u it s . T h is drawing provides fo r a le v e l o f m ic ro c irc u it q u a lity and r e l i a b i l i t y assurance fo r a c q u is itio n o f m ic ro c irc u its in accordance w ith MIL-M-38510.

74ALS

Abstract: DM74ALS S114 74ALS114A
Contextual Info: 54ALS114A/DM74ALS114A z n National JlA Semiconductor 54ALS114A/DM74ALS114A Dual J-K Negative-EdgeTriggered Flip-Flops with Preset and Common Clear General Description Features The 54ALS114A is a dual edge-triggered flip -flo p . Each flip -flo p has in divid ual J, K, clock, and preset inputs, and

SN54ALS112A

Abstract: SN74ALS112A
Contextual Info: SN74ALS112A, 54ALS112A DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET _ • D2661, APRIL 1982 - REVISED M A Y 1986 S N 5 4 A L S 1 1 2 A . . . J PACKAGE Fully Buffered to Offer Maximum Isolation from External Disturbance S N 7 4 A L S 1 1 2 A . . . D OR N P A C K A G E

qml-38535

Abstract: GDFP2-F16 GDIP1-T16 smd code marking QO
Contextual Info: REVISIONS LTR DESCRIPTION DATE YR-MO-DA APPROVED A Change output current, Io. Complete document update. 85-03-06 N. A. Hauck B Case E inactive for new design. Remove Vendor FSCM 04713. Editorial changes throughout. 85-07-25 N. A. Hauck C Changes in accordance with NOR 5962-R081-92

74AS112

Abstract: LS112AM
Contextual Info: TYPES 54ALS112A, SN54AS112, SN74ALS112A, SN74AS112 DUAL J K NEGATIVE EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET D 2 6 6 1 , A P R IL 1 9 8 2 - R E V I S E D D E C E M B E R 1 9 8 3 • Fully Buffered to Offer Maximum Isolation from External Disturbance

Contextual Info: g « TYPES 54ALS11, SN74ALS11 TRIPLE 3 INPUT POSITIVE-AND GATES vro 000213 L> S S / 7O / / / J3 0 d e scrip tio n T hese AND devices contain three independent gates. T h ey 3-input perform the boolean functions Y = A B C or V = A + B + C in positive logic.

SN54ALS11A

Abstract: SN54AS11 SN74ALS11A SN74AS11
Contextual Info: SN74ALS11A, SN74AS11, 54ALS11A, SN54AS11 TRIPLE 3-INPUT POSITIVE-AND GATES M A R C H 1 9 8 4 - R E V IS E D M A Y 1986 • • Package Options Include Plastic "Sm all O utline" Packages. Ceramic Chip Carriers, and Standard Plastic and Ceramic 3 00 -m il

M38510

Contextual Info: T h i s M a t e r i a l C o p y r i g h t e d B y Its R e s p e c t i v e M a n u f a c t u r e r 1. SCOPE 1 1 Scope. This drawing describes the requirements for monolithic silicon, advanced SctottlJrffL. J-K flip-flops microcircuits. This dmrtng proxies for . 1,»1 of microc.irant quality

JD 1803

Abstract: jd 1803 IC jd 1803 data sheet SNV55LVDS31W SNV55LVDS32W jd 1803 data SMV320C6701GLPW14 54LS74A bistable multivibrator using ic 555 SNV54LVTH162245WD
Contextual Info: Mil Sel Guide 04-home-new.qxd R 8/11/2004 2:21 PM E A L W Page 1 O R L D S I G N A L P TM R O C E S S I N G Military Semiconductors Selection Guide 2004-2005 Mil Sel Guide 04-home-new.qxd 8/11/2004 2:21 PM Page 2 Table of Contents and Introduction Enhanced Plastic

SN54ALS113A

Abstract: SN74ALS113A SN74ALS113 ALS113A
Contextual Info: 54ALS113A, SN74ALS113A DUAL J K NEGATIVE EDGE TRIGGERED FLIP FLOPS WITH PRESET D 2 2 6 1 , A P R IL 1 9 8 2 - R E V I S E D M A Y 1 9 8 6 • Fully Buffered to Offer Maxim um Isolation from External Disturbance • Package Options Include Plastic "Sm all

74aLS808

Abstract: 74ALS677 74ALS468 SN74AS877 SN74LS630 SM54A NCE 7190 74ls631 SN74LS693 TTL Data Book for Design Engineers
Contextual Info: ADVANCED LOW-POWER SCHOTTKY AND ADVANCED SCHOTTKY CIRCUITS FUNCTION DEVICE AS1032 ALS1034 AS1034 Quad 2-Input OR Buffers/ Drivers A VAILABILITY NOW NOW NOW Hex Drivers NOW ALS1035 Hex Buffers with D-C Outputs NOW AS1036 Quad 2-Input NOR Line Driver NOW ALS1240

SN54ALS112A

Abstract: SN74ALS112A SN74AS11
Contextual Info: TYPES 54ALS112A, SN54AS112, SN74ALS112A, SN74AS112 TYPES n e g a TIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET D 2 6 6 1 , APRIL 19 8 2 —REVISED DECEMBER 1 9 8 3 Fully Buffered to O ffer Maxim um Isolation from External Disturbance 54ALS112A, S N 54AS112

SN54ALS113A

Abstract: SN74ALS113A SN74AS11 SN54AS113
Contextual Info: TYPES 54ALS113A, SN54AS113, SN74ALS113A, SN74AS113 DUAL J-K NEGATIVE EDGE TRIGGERED FLIP-FLOPS WITH PRESET D 2 6 6 1 , A P R IL 1 9 8 2 - R E V I S E D D E C E M B E R 1 9 8 3 Fully Buffered to Offer Maxim um Isolation from External Disturbance S N 54A LS 113A , S N 54A S 113 .

jd 1803 IC

Abstract: JD 1803 jd 1803 data sheet Mil JAN jm38510 Cross Reference LM 4017 decade counter driver bistable multivibrator using ic 555 UC1895 integrate JD 1803 eltek flatpack jd 1803 data
Contextual Info: R E A L MILITARY SEMICONDUCTORS SELECTION GUIDE 2002 W O R L D S I G N A L P R O S E S S I N G TM Important Information AMERICAS PRODUCT INFORMATION Product Information Center PIC . . . . . . . . . . . .(972) 644-5580 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .(800) 477-8924

Ls-11a

Contextual Info: 54ALS11A, SN54AS11, SN74ALS11A, SN74AS11 TRIPLE 3-INPUT POSITIVE AND GATES M A R C H 1 9 8 4 —REVISED M A Y 1 9 8 6 • Package Options Include Plastic "'Small Outline" Packages, Ceramic Chip Carriers, and Standard Plastic and Ceramic 300-m il DIPs SN 54A LS11A , SN54AS11 . . . J PACKAGE

IN3023

Abstract: 54als113
Contextual Info: 54ALS113A, SN74ALS113A DUAL J K NEGATIVE EDGE TRIGGERED FLIP-FLOPS WITH PRESET D2261, APRIL 1982-REVISED MAY 1986 Fully Buffered to Offer Maximum Isolation from External Disturbance S N 5 4 A L S 1 1 3 A . . . J P AC K A G E S N 7 4 A L S 1 1 3 A . . . D OR N P AC K A G E

LS112AM

Contextual Info: 54ALS112A, SN74ALS112A DUAL J K NEGATIVE-EDGE TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET D 2 6 6 1 , APRIL 1 9 8 2 — REVISED M A Y 1 9 8 6 SN 5 4A L S1 12 A . . . J PACKAGE S N 7 4 A L S 1 1 2 A . . . D OR N P A C K A G E • Fully Buffered to Offer Maxim um Isolation

6197-1

Abstract: 74ALS 74ALS112A DM74ALS 54ALS112
Contextual Info: 54ALS112A/DM74ALS112A National JuM Semiconductor 54ALS112A/DM74ALS112A Dual J-K Negative-EdgeTriggered Flip-Flops with Preset and Clear General Description Features The D M 5 4 A L S 1 1 2 A is a d u a l e d g e -trig g e re d flip -flo p . E ach flip flo p h as in d ivid u a l J, K, c lo c k , cle a r and p re s e t inputs,

qml-38535

Abstract: GDFP1-F14 smd marking 2y SMD MARKING CODE BCH
Contextual Info: REVISIONS LTR DESCRIPTION DATE YR-MO-DA APPROVED Table I, change tpLH and footnotes. Add Figure 3. Editorial changes throughout. _ 1988 APR 18 M. A. Fyre Changes IAW NOR 5962-R340-92. -tvn 1992 OCT 05 Monica L. Poelking

Contextual Info: TYPES 54ALS114A, SN54AS114, SN74ALS114A, SN74AS114 DUAL J K NEGATIVE-EDGE TRIGGERED FLIP FLOPS WITH PRESET, COMMON CLEAR, AND COMMON CLOCK D 2 6 6 1 , APRIL 1 9 8 2 - R E V I S E D D E C E M B E R 1 983 Fully Buffered to Offer Maximum Isolation from External Disturbance

logos 4012B

Abstract: 1LB553 Rauland ETS-003 Silec Semiconductors MCP 7833 4057A transistor sr52 74c912 1TK552 74S485
Contextual Info: L p i > « , * S E m Ic O N VOLUM E 3 INTERNATIONAL INTEGRATED CIRCUITS INDEX 5th EDITION 1985 Revised June 1985 COMPILED AND PUBLISHED BY S E M IC O N IN D E X E S L IM IT E D THE SEMICON INDEX SERIES CONSISTS OF VOLUME 1 TRANSISTOR INDEX VOLUME 2 DIODE & SCR INDEX