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    SN74ALS11 Search Results

    SN74ALS11 Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    SN74ALS112AD
    Texas Instruments Dual J-K Negative-Edge-Triggered Flip-Flops With Clear and Preset 16-SOIC 0 to 70 Visit Texas Instruments
    SN74ALS112ANSR
    Texas Instruments Dual J-K Negative-Edge-Triggered Flip-Flops With Clear and Preset 16-SO 0 to 70 Visit Texas Instruments Buy
    SN74ALS11ADR
    Texas Instruments Triple 3-Input Positive-AND Gates 14-SOIC 0 to 70 Visit Texas Instruments Buy
    SN74ALS11AN
    Texas Instruments Triple 3-Input Positive-AND Gates 14-PDIP 0 to 70 Visit Texas Instruments Buy
    SN74ALS11ANSR
    Texas Instruments Triple 3-Input Positive-AND Gates 14-SO 0 to 70 Visit Texas Instruments Buy

    SN74ALS11 Datasheets (100)

    Select Manufacturer
    Part ECAD Model Manufacturer Description Datasheet Type PDF PDF Size Page count
    SN74ALS112A
    Texas Instruments DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET Original PDF 97.05KB 6
    SN74ALS112AD
    Texas Instruments SN74ALS112 - Dual J-K Negative-Edge-Triggered Flip-Flops With Clear and Preset 16-SOIC 0 to 70 Original PDF 1.05MB 17
    SN74ALS112AD
    Texas Instruments DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET Original PDF 97.06KB 6
    SN74ALS112AD
    Texas Instruments Dual J-K Negative-Edge-Triggered Flip-Flops With Clear and Preset 16-SOIC 0 to 70 Original PDF 673.69KB 16
    SN74ALS112AD
    Unknown Historical semiconductor price guide (US$ - 1998). From our catalog scanning project. Historical PDF 39.79KB 1
    SN74ALS112ADE4
    Texas Instruments SN74ALS112 - Dual J-K Negative-Edge-Triggered Flip-Flops With Clear and Preset 16-SOIC 0 to 70 Original PDF 1.05MB 17
    SN74ALS112ADE4
    Texas Instruments Dual J-K Negative-Edge-Triggered Flip-Flops With Clear and Preset Original PDF 514.23KB 14
    SN74ALS112ADE4
    Texas Instruments Dual J-K Negative-Edge-Triggered Flip-Flops With Clear and Preset 16-SOIC 0 to 70 Original PDF 673.69KB 16
    SN74ALS112ADG4
    Texas Instruments SN74ALS112 - Dual J-K Negative-Edge-Triggered Flip-Flops With Clear and Preset 16-SOIC 0 to 70 Original PDF 1.05MB 17
    SN74ALS112ADG4
    Texas Instruments Dual J-K Negative-Edge-Triggered Flip-Flops With Clear and Preset 16-SOIC 0 to 70 Original PDF 673.69KB 16
    SN74ALS112ADR
    Texas Instruments SN74ALS112 - Dual J-K Negative-Edge-Triggered Flip-Flops With Clear and Preset 16-SOIC 0 to 70 Original PDF 1.05MB 17
    SN74ALS112ADR
    Texas Instruments Dual J-K Negative-Edge-Triggered Flip-Flops With Clear and Preset 16-SOIC 0 to 70 Original PDF 673.69KB 16
    SN74ALS112ADR
    Texas Instruments DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET Original PDF 97.05KB 6
    SN74ALS112ADRE4
    Texas Instruments SN74ALS112 - Dual J-K Negative-Edge-Triggered Flip-Flops With Clear and Preset 16-SOIC 0 to 70 Original PDF 1.05MB 17
    SN74ALS112ADRE4
    Texas Instruments Dual J-K Negative-Edge-Triggered Flip-Flops With Clear and Preset Original PDF 514.23KB 14
    SN74ALS112ADRE4
    Texas Instruments Dual J-K Negative-Edge-Triggered Flip-Flops With Clear and Preset 16-SOIC 0 to 70 Original PDF 673.69KB 16
    SN74ALS112ADRG4
    Texas Instruments SN74ALS112 - Dual J-K Negative-Edge-Triggered Flip-Flops With Clear and Preset 16-SOIC 0 to 70 Original PDF 1.05MB 17
    SN74ALS112ADRG4
    Texas Instruments Dual J-K Negative-Edge-Triggered Flip-Flops With Clear and Preset 16-SOIC 0 to 70 Original PDF 673.69KB 16
    SN74ALS112AFN
    Texas Instruments Dual JK Negative Edge Triggered Flip-Flop Original PDF 112.24KB 3
    SN74ALS112AN
    Texas Instruments SN74ALS112 - Dual J-K Negative-Edge-Triggered Flip-Flops With Clear and Preset 16-PDIP 0 to 70 Original PDF 1.05MB 17
    SF Impression Pixel

    SN74ALS11 Price and Stock

    Texas Instruments

    Texas Instruments SN74ALS11AN

    AND Gate 3-Element 3-IN 14-Pin PDIP Tube
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    Verical () SN74ALS11AN 40,575 356
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    SN74ALS11AN 36,430 356
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    SN74ALS11AN 11,375 356
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    SN74ALS11AN 8,775 356
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    SN74ALS11AN 6,700 356
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    SN74ALS11AN 5,000 356
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    SN74ALS11AN 4,257 356
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    SN74ALS11AN 1,000 356
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    Mouser Electronics SN74ALS11AN 641
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    Newark SN74ALS11AN Bulk 581 1
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    Bristol Electronics SN74ALS11AN 386
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    Rochester Electronics SN74ALS11AN 114,126 1
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    Texas Instruments SN74ALS11AD

    AND Gate 3-Element 3-IN 14-Pin SOIC Tube
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    Verical () SN74ALS11AD 23,346 312
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    SN74ALS11AD 20,892 312
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    SN74ALS11AD 3,400 312
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    SN74ALS11AD 3,350 312
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    SN74ALS11AD 950 312
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    Rochester Electronics SN74ALS11AD 55,013 1
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    Texas Instruments SN74ALS112AD

    Flip Flop JK-Type Neg-Edge 2-Element 16-Pin SOIC Tube
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    Verical SN74ALS112AD 1,440 278
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    Mouser Electronics SN74ALS112AD 982
    • 1 $2.08
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    Quest Components () SN74ALS112AD 752
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    SN74ALS112AD 398
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    Rochester Electronics SN74ALS112AD 13,459 1
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    TME SN74ALS112AD 25
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    Texas Instruments SN74ALS11ADR

    Logic Gates Triple 3-Input A 595 -SN74ALS11AD A 595- A 595-SN74ALS11AD
    Distributors Part Package Stock Lead Time Min Order Qty Price Buy
    Mouser Electronics SN74ALS11ADR 3,246
    • 1 $1.45
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    Bristol Electronics () SN74ALS11ADR 3,068
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    SN74ALS11ADR 1,965 1
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    Rochester Electronics SN74ALS11ADR 37,400 1
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    Texas Instruments SN74ALS112AN

    Flip Flops Dual Neg-Edge-Trig J -K Flip-Flop
    Distributors Part Package Stock Lead Time Min Order Qty Price Buy
    Mouser Electronics SN74ALS112AN 185
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    Bristol Electronics () SN74ALS112AN 12,702
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    SN74ALS112AN 2,895 1
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    Quest Components () SN74ALS112AN 2,316
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    SN74ALS112AN 2,316
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    SN74ALS112AN 548
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    SN74ALS112AN 129
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    SN74ALS112AN 53
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    SN74ALS112AN 20
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    Component Electronics, Inc SN74ALS112AN 605
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    SN74ALS11 Datasheets Context Search

    Catalog Datasheet Type Document Tags PDF

    Contextual Info: SN54ALS11A, SN54AS11, SN74ALS11A, SN74AS11 TRIPLE 3-INPUT POSITIVE-AND GATES SDAS009C - MARCH 1984 - REVISED DECEMBER 1994 • Package Options Include Plastic Small-Outline D Packages, Ceramic Chip Carriers (FK), and Standard Plastic (N) and Ceramic (J) 300-mil DIPs


    OCR Scan
    sn54als11asn54as11sn74als11asn74as11+3sdas009c300-milsns4als11 PDF

    ls11m

    Abstract: LS-11m
    Contextual Info: TYPES SN54ALS11, SN54AS11, SN74ALS11, SN74AS11 TRIPLE 3 INPUT POSITIVE-AND GATES 0 2 0 6 1 , A P R IL 1 9 8 2 — R E V IS E D D E C E M B E R 1 9 8 3 I# • Package Options Include Both Plastic and Ceramic Chip Carriers in Addition to Plastic and Ceramic DIPs


    OCR Scan
    sn54als11sn54as11sn74als11sn74as11+2ls11mls-11m PDF

    Contextual Info: SN54ALS112A, SN74ALS112A DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET SDAS199A – APRIL 1982 – REVISED DECEMBER 1994 • SN54ALS112A . . . J PACKAGE SN74ALS112A . . . D OR N PACKAGE TOP VIEW Fully Buffered to Offer Maximum Isolation


    Original
    sn54als112asn74als112asdas199a300-mil+3als112aszzu001bsdyu001n PDF

    Contextual Info: SN74ALS112A, SN54ALS112A DUAL J-K NEGATIVE-EDGE-TRIGGERED FUP-FLOPS WITH CLEAR AND PRESET 02661, A PRIL 1982 - REVISED MAY 1986 • Fully Buffered to Offer Maximum Isolation from External Disturbance • Package Options Include Plastic "Small Outline" Packages, Ceramic Chip Carriers,


    OCR Scan
    sn74als112asn54als112a300-mllls112a+1l8112a PDF

    SN54ALS11A

    Abstract: SN54AS11 SN74ALS11A SN74ALS11AD SN74ALS11ADR SN74ALS11AN SN74AS11 SN74AS11D SN74AS11N
    Contextual Info: SN54ALS11A, SN54AS11, SN74ALS11A, SN74AS11 TRIPLE 3-INPUT POSITIVE-AND GATES SDAS009D – MARCH 1984 – REVISED NOVEMBER 2002 4.5-V to 5.5-V VCC Operation Max tpd of 5.5 ns at 5 V SN54ALS11A, . . . J OR W PACKAGE SN54AS11 . . . J PACKAGE SN74ALS11A, SN74AS11 . . . D, N, OR NS PACKAGE


    Original
    sn54als11asn54as11sn74als11asn74as11+6sdas009dsn74als11adsn74als11adrsn74als11ansn74as11dsn74as11n PDF

    Contextual Info: SN54ALS112A, SN74ALS112A DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET SDAS199A – APRIL 1982 – REVISED DECEMBER 1994 • SN54ALS112A . . . J PACKAGE SN74ALS112A . . . D OR N PACKAGE TOP VIEW Fully Buffered to Offer Maximum Isolation


    Original
    sn54als112asn74als112asdas199a300-mil+1als112a PDF

    Contextual Info: SN54ALS11A, SN54AS11, SN74ALS11A, SN74AS11 TRIPLE 3-INPUT POSITIVE-AND GATES SDAS009D – MARCH 1984 – REVISED NOVEMBER 2002 4.5-V to 5.5-V VCC Operation Max tpd of 5.5 ns at 5 V SN54ALS11A, . . . J OR W PACKAGE SN54AS11 . . . J PACKAGE SN74ALS11A, SN74AS11 . . . D, N, OR NS PACKAGE


    Original
    sn54als11asn54as11sn74als11asn74as11+1sdas009d PDF

    SN74ALS11

    Contextual Info: SN54ALS11A, SN54AS11, SN74ALS11A, SN74AS11 TRIPLE 3-INPUT POSITIVE-AND GATES SDAS009C - MARCH 1984 - REVISED DECEMBER 1994 * Package Options Include Plastic Smali-Outline D Packages, Ceramic Chip Carriers (FK), and Standard Plastic (N) and Ceramic (J) 300-mil DIPs


    OCR Scan
    sn54als11asn54as11sn74als11asn74as11+3sdas009c300-milsn74als11 PDF

    Contextual Info: SN54ALS114A, SN74ALS114A DUAL JĆK NEGATIVEĆEDGEĆTRIGGERED FLIPĆFLOPS WITH PRESET,COMMON CLEAR,AND COMMON CLOCK ą SDAS201 − D2661, DECEMBER 1982 − REVISED MAY 1986 • • • • • Fully Buffered to Offer Maximum isolation from External Disturbance


    Original
    sn54als114asn74als114asdas201d2661+1300-mil PDF

    SN54ALS112A

    Abstract: SN74 SN74ALS112A
    Contextual Info: SN54ALS112A, SN74ALS112A DUAL J K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET D 2 6 6 1 , A P R IL 1 9 8 2 — R E V IS E D M A Y 1 9 8 6 • Fully Buffered to Offer Maxim um Isolation from External Disturbance • Package Options Include Plastic "Sm all


    OCR Scan
    sn54als112asn74als112ad2661300-mil+2als112asn74 PDF

    SN54ALS11A

    Abstract: SN54AS11 SN74ALS11A SN74AS11
    Contextual Info: is 1 SNS4ALS11A, SN54AS11, SN74ALS11A, SN74AS11 TRIPLE 3 INPUT POSITIVE AND GATES M A R C H 1 9 8 4 — R E V IS E D M A Y 1 9 8 6 P a c k a g e O p tio n s In c lu d e P la s tic " S m a ll O u tlin e " P a c k a g e s , C e ra m ic C h ip C a rrie rs , a n d S ta n d a rd P la s tic a n d C e ra m ic 3 0 0 -m il


    OCR Scan
    sns4als11asn54as11sn74als11asn74as11+4300-milsn54als11asn54as1sm74als1 PDF

    8400002EA

    Abstract: 8400002FA SN54ALS112A SN74ALS112A
    Contextual Info: SN54ALS112A, SN74ALS112A DUAL JĆK NEGATIVEĆEDGEĆTRIGGERED FLIPĆFLOPS WITH CLEAR AND PRESET SDAS199A − APRIL 1982 − REVISED DECEMBER 1994 • SN54ALS112A . . . J PACKAGE SN74ALS112A . . . D OR N PACKAGE TOP VIEW Fully Buffered to Offer Maximum Isolation


    Original
    sn54als112asn74als112asdas199a300-mil+4als112asn54d8400002ea8400002fa PDF

    SN54ALS114A

    Abstract: SN74ALS114A
    Contextual Info: SN54ALS114A, SN74ALS114A DUAL JĆK NEGATIVEĆEDGEĆTRIGGERED FLIPĆFLOPS WITH PRESET,COMMON CLEAR,AND COMMON CLOCK ą SDAS201 − D2661, DECEMBER 1982 − REVISED MAY 1986 • • • • • Fully Buffered to Offer Maximum isolation from External Disturbance


    Original
    sn54als114asn74als114asdas201d2661+1300-mil PDF

    Contextual Info: SN54ALS112A, SN74ALS112A DUAL JĆK NEGATIVEĆEDGEĆTRIGGERED FLIPĆFLOPS WITH CLEAR AND PRESET SDAS199A − APRIL 1982 − REVISED DECEMBER 1994 • SN54ALS112A . . . J PACKAGE SN74ALS112A . . . D OR N PACKAGE TOP VIEW Fully Buffered to Offer Maximum Isolation


    Original
    sn54als112asn74als112asdas199a300-mil+1als112a PDF

    Contextual Info: SN54ALS11A, SN54AS11, SN74ALS11A, SN74AS11 TRIPLE 3-INPUT POSITIVE-AND GATES SDAS009D – MARCH 1984 – REVISED NOVEMBER 2002 4.5-V to 5.5-V VCC Operation Max tpd of 5.5 ns at 5 V SN54ALS11A, . . . J OR W PACKAGE SN54AS11 . . . J PACKAGE SN74ALS11A, SN74AS11 . . . D, N, OR NS PACKAGE


    Original
    sn54als11asn54as11sn74als11asn74as11+1sdas009d PDF

    Contextual Info: SN74ALS11A, SN74AS11, SN54ALS11A, SN54AS11 TRIPLE 3-INPUT POSITIVE-AND GATES MARCH 19B4 - REVISED M AY 1986 • Package Options Include Plastic ‘ 'Small O utlin e" Packages, Ceramic Chip Carriers, and Standard Plastic and Ceramic 300-m il DIPs SN54ALS11A. SN54AS11


    OCR Scan
    sn74als11asn74as11sn54als11asn54as11+2300-m8n74a811 PDF

    LS112AM

    Abstract: 74AS112 AX2022
    Contextual Info: TYPES SN54ALS112A, SN54AS112, SN74ALS112A, SN74AS112 DUAL J K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET 0 2 6 6 1 , APRIL 1 9 8 2 —REVISED DECEMBER 1 9 8 3 Fully Buffered to O ffer Maxim um Isolation from External Disturbance J PACKAGE N PACKAGE


    OCR Scan
    sn54als112asn54as112sn74als112asn74as112+4ls112als112am74as112ax2022 PDF

    Contextual Info: SN54ALS11A, SN54AS11, SN74ALS11A, SN74AS11 TRIPLE 3-INPUT POSITIVE-AND GATES SDAS009C – MARCH 1984 – REVISED DECEMBER 1994 Package Options Include Plastic Small-Outline D Packages, Ceramic Chip Carriers (FK), and Standard Plastic (N) and Ceramic (J) 300-mil DIPs


    Original
    sn54als11asn54as11sn74als11asn74as11+2sdas009c300-mil PDF

    SN54ALS112A

    Abstract: SN74ALS112A
    Contextual Info: SN74ALS112A, SN54ALS112A DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET _ • D2661, APRIL 1982 - REVISED M A Y 1986 S N 5 4 A L S 1 1 2 A . . . J PACKAGE Fully Buffered to Offer Maximum Isolation from External Disturbance S N 7 4 A L S 1 1 2 A . . . D OR N P A C K A G E


    OCR Scan
    sn74als112asn54als112ad2661300-mil+1als112a PDF

    SN54ALS11A

    Abstract: SN54AS11 SN74ALS11A SN74ALS11AD SN74ALS11ADR SN74ALS11AN SN74AS11 SN74AS11D SN74AS11N
    Contextual Info: SN54ALS11A, SN54AS11, SN74ALS11A, SN74AS11 TRIPLE 3-INPUT POSITIVE-AND GATES SDAS009D – MARCH 1984 – REVISED NOVEMBER 2002 4.5-V to 5.5-V VCC Operation Max tpd of 5.5 ns at 5 V SN54ALS11A, . . . J OR W PACKAGE SN54AS11 . . . J PACKAGE SN74ALS11A, SN74AS11 . . . D, N, OR NS PACKAGE


    Original
    sn54als11asn54as11sn74als11asn74as11+6sdas009dsn74als11adsn74als11adrsn74als11ansn74as11dsn74as11n PDF

    MPDI002A

    Abstract: SN54ALS112A SN74ALS112A
    Contextual Info: SN54ALS112A, SN74ALS112A DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET SDAS199A – APRIL 1982 – REVISED DECEMBER 1994 • SN54ALS112A . . . J PACKAGE SN74ALS112A . . . D OR N PACKAGE TOP VIEW Fully Buffered to Offer Maximum Isolation


    Original
    sn54als112asn74als112asdas199a300-mil+5als112a4040049/cms-00120-pinmpdi002a PDF

    8400002EA

    Abstract: 8400002FA SN54ALS112A SN74ALS112A
    Contextual Info: SN54ALS112A, SN74ALS112A DUAL JĆK NEGATIVEĆEDGEĆTRIGGERED FLIPĆFLOPS WITH CLEAR AND PRESET SDAS199A − APRIL 1982 − REVISED DECEMBER 1994 • SN54ALS112A . . . J PACKAGE SN74ALS112A . . . D OR N PACKAGE TOP VIEW Fully Buffered to Offer Maximum Isolation


    Original
    sn54als112asn74als112asdas199a300-mil+4als112asn54trollers8400002ea8400002fa PDF

    SN54ALS114A

    Abstract: SN74ALS114A
    Contextual Info: SN54ALS114A, SN74ALS114A DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET,COMMON CLEAR,AND COMMON CLOCK SDAS201 – D2661, DECEMBER 1982 – REVISED MAY 1986 • • • • • Fully Buffered to Offer Maximum isolation from External Disturbance Package Options include Plastic Small


    Original
    sn54als114asn74als114asdas201d2661+2300-milsn54alcustomer PDF

    SN54ALS112A

    Abstract: SN74ALS112A
    Contextual Info: SN54ALS112A, SN74ALS112A DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET SDAS199A – APRIL 1982 – REVISED DECEMBER 1994 • SN54ALS112A . . . J PACKAGE SN74ALS112A . . . D OR N PACKAGE TOP VIEW Fully Buffered to Offer Maximum Isolation


    Original
    sn54als112asn74als112asdas199a300-mil+1als112a PDF