54 FK Search Results

HC4353

Abstract: C4351
Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA MC54/74HC4351 M C54/74HC4352 M C54/74HC4353 Advance Information Analog M ultiplexers/ Dem ultiplexers w ith Address Latch High-Performance Silicon-Gate CM O S N SUFFIX PLASTIC CASE 738-03 The M C 54/74H C 43 51, M C 54/74H C 43 52, and M C 54/74H C 43 53 utilize silicon-gate

SN74ALS123

Abstract: SN7401 74LS424 54175 SN74298 SN74265 SN74LS630 SN74LS69 National Semiconductor Linear Data Book Transistor AF 138
Contextual Info: INDEX • FUNCTIONAL SELECTION GUIDE • NUMERICAL FUNCTION INTERCHANGEABILITY GUIDE GENERAL INFORMATION AND EXPLANATION OF NEW LOGIC SYMBOLS ORDERING INSTRUCTIONS AND MECHANICAL DATA 54/74 SERIES OF COMPATIBLE TTL CIRCUITS • PIN OUT DIAGRAMS 54/74 FAMILY SSI CIRCUITS

TA 7698 AP

Contextual Info: PRELIMINARY INFORMATION L9D3256M32SBG1 L9D3512M32SBG1 8-16 Gb, DDR3, 256-512M x 32 Single Channel Memory Module Benefits FEATURES " " " " " " Configuration: "‚"N;F5478O54UDI3<"54Ogi"z"54"z" 8 banks ‚"N;F5734O54UDI3<"86Ogi"z"54"z" 8 banks DDR3 Integrated Module [iMOD]:

C-15

Abstract: C-16 CR16 CR16A
Contextual Info: C.book : cover+ i Sat Mar 1 14:38:54 1997 CompactRISC C Compiler Reference Manual Part Number: 424521426-002 February 1997 C.book : cover+ ii Sat Mar 1 14:38:54 1997 REVISION RECORD VERSION RELEASE DATE SUMMARY OF CHANGES 0.6 August 1995 First release. 0.7

Contextual Info: Contents Dimensions 54-pin S O P . 2 Pin Terminal

EA-048-0204

Abstract: Q545 287P RQ5RW30A RQ5RW30B SC-82AB
Contextual Info: ULTRA SMALL PACKAGE VOLTAGE REGULATOR 545: 6 5,(6 NO. EA-048-0204 OUTLINE 7KH 545: 6HULHV DUH &026EDVHG YROWDJH UHJXODWRU ,&V ZLWK KLJK DFFXUDF\ RXWSXW YROWDJH DQG XOWUDORZ VXSSO\ FXUUHQW GHYHORSHG (DFK RI WKHVH ,&V FRQVLVWV RI D GULYHU WUDQVLVWRU D YROWDJH UHIHUHQFH XQLW DQ HUURU DPSOLILHU UHVLV

erqh

Abstract: UL-1412 4574 film fuse
Contextual Info: Metal Oxide Film Fuse Resistors, ERQH, C, R 0HWDO 2[LGH )LOP )XVH 5HVLVWRUV 7\SH (54+ )ODPH UHWDUGDWLYH KHUPHWLF W\SH 7\SH (54& 7\SH (545 )ODPHSURRI EDWKWXE W\SH $[LDO OHDGV )ODPHSURRI EDWKWXE W\SH 5DGLDO OHDGV • Features ● Accurate Fusing Characteristics

ERq resistor

Contextual Info: Metal Film Fuse Resistors, ERQA, Z 0HWDO LOP )XVH 5HVLVWRUV 7\SH 54$ (54=  :  :  :  : FRDWLQJ W\SH • Features ● Accurate fusibility ● Small Size, Light Weight ● Consistent Quality $Q H[FOXVLYH DXWRPDWHG SURFHVV GHYHORSHG EXLOW DQG XVHG RQO\ E\ 0DWVXVKLWD together with VHYHUH TXDOLW\

SN54ALS2540

Abstract: SN54ALS2541 SN74ALS2540 SN74ALS2541
Contextual Info: SN54ALS2540, SN54ALS2541, SN74ALS2540, SN74ALS2S41 OCTAL LINE DRIVERSfMOS DRIVERS WITH 3-STATE OUTPUTS JU NE 1 9 8 4 — R E V ISE D M A Y 1986 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers SN 5 4 A L S2 5 4 0 . SN 54 A L S2 54 1 . . . J PA C KA G E

Contextual Info: AN-2021 LM3753/54 Evaluation Board User's Guide Literature Number: SNVA420 December 2009 Contents 1 2 Introduction . 5 Powering and Loading Considerations . 5

74AS241

Abstract: 74AS240 2269s TH 2267 54ALS240A
Contextual Info: SN 54A LS240A , S N 54 A LS 2 41A , SN 54 A S240 , SN 54AS241 SN 74A LS240A , S N 74A LS 241A , S N 74A S240, SN 74AS241 OCTAL BUFFERS AND LINE DRIVERS WITH 3-STATE OUTPUTS D2661, DECEMBER 1982-RE ViS E D MAY 1986 • SN 54ALS&#39;, SN 54A S' . . . J PACKAGE SN 74ALS&#39;, SN 74A S ' . , . DW or N PACKAGE

74 hc 589

Abstract: 4by4 multiplexer 224 k 70 4-bit bidirectional shift register 74 194 54 fk
Contextual Info: LOGIC PRODUCT SPECTRUM TYPE 00 01 02 03 F U N C TIO N Quad 2-input N A N D 07 Quad 2-input N O R 54 54 AS BCT J,FK J,FK J,FK,W J,FK,W J,FK J,FK J,FK Quad 2-input N A N D with open-collector Hex inverter J,FK,W J,FK,W J,FK outputs J,FK J,FK J,FK,W J,FK,W Hex inverter with unbuffered outputs

SS501

Abstract: LS190 LS191 131-6 RJ 4 nts 5d-11 SN54190 SN54191 SN54LS190 T-13-L SN74190
Contextual Info: SDLS072 SPJ54190, S N 54191, SN54LS190, SN54LS191, SN74190, SN 74191, SN74LS190, SN74LS191 SYNCHRONOUS UP/DOWN COUNTERS WITH DOWNiUP MODE CONTROL D E C E M B E R 1 9 7 2 — RE V IS E D M A R C H 1 9 8 8 Counts 8-4-2-1 BCD or Binary S N 54 1 9 0. S N 54 1 9 1, SN 54LS190.

S29B

Abstract: S298
Contextual Info: PRODUCT PREVIEW S N 54 A S 298 21, S N 54 A S298 22. S N 74 A S 298 21, SN 74 A S 298 22 10 BIT BUS INTERFACE FLIP-FLOPS WITH 3-STATE OUTPUTS D 2 8 2 5 , M AY 1986 > Designed to be Interchangeable with AMD A M 2 98 2 1 and A M 2 9 8 2 2 SN 54A S29821 . . . J T PACKAGE

6264l

Abstract: 27C301G 27c301 fp 101g TI232 6116asp 50464cp ls 11m M62256FP 02S-0
Contextual Info: • PACKAGE INFORMATION • Dual-In-line Plastic U n it: m m inch Scale 1/1 • DP-16B • DP-18B 2 54 + 0 25 0 48 < 0 I (0 100 ‘ 0 0 1 0 ) (0 019 * 0 004) -X - 4 4 .- . 0 48 t 0 I ? 54 f 0 25 ~ (0 019 ± 0 004) (0 100 ± 0 010) • DP-20N • DP-18C 2 2 2 6 (0 1 7 6 )

SN74ALS04

Contextual Info: SN54ALS04B, SN54AS04, SN74ALS04B, SN74AS04 HEX INVERTERS SDAS063B -A P R IL 1982 - REVISED DECEMBER 1994 • Package Options Include Plastic Small-Outline D Packages, Ceramic Chip Carriers (FK), and Standard Plastic (N) and Ceramic (J) 300-mll DIPs SN54ALS04B, S N 54 A S 0 4 . . . J PACKAGE

74AS251

Abstract: LS251
Contextual Info: SN 54 A LS2 51, SN 54 A S251 , S N 74A LS251, SN 74A S251 1-0F-8 DATA SELECTORS/MULTIPLEXERS WITH 3-STATE OUTPUTS D 2 6 6 1 , APRIL 1 9 8 2 -R E V IS E D M A Y 1 9 8 6 S N 5 4 A L S 2 5 1 , S N 5 4 A S 2 5 1 . . . J PACKAGE T h ree -S tate V ersion s o f 'A L S 1 5 1 and 'A S 1 5 1

Contextual Info: ADVANCED CMOS LOGIC NOMENCLATURE Example: P re fix -SN = Standard Prefix, Commercial Processing SNJ = C lass B Process Option Military Temperature Range 54 = — 5 5 °C to 12 5 ° C Product F am ily-AC

20E4

Abstract: Electronic GmBH PIN kopp glass
Contextual Info: SERIES 5000 - ROUND PUSHBUT TON SWITCHES ON REQUEST  Attractive, round pushbutton switch  Other colors  Efficient contact system at least 200 000 mechanical switching cycles  Actuator printing  Variants with sealing cap for IP 54 dust and water protection

TI0040

Contextual Info: 54 AC11000, 74AC11000 QUADRUPLE 2-INPUT POSITIVE-NAND GATES TI0040—02957. APRIL 1987— REVISED MARCH 1990 54AC11000 . . . J PACKAGE 74AC11000 . . . D OR N PACKAGE Flow-Through Architecture to Optimize PCB Layout TOP VIEW Center-Pin V q c and GND Configurations to

Contextual Info: r 8 7 THIS DRAWING IS UNPUBLISHED. C COPYRIGHT 19 RELEASED FOR PUBLICATION BY AMP INCORPORATED. 6 ,19 ALL RISHTS RESERVED. D . 2 . 54+0 .0 8 t v d [ . 1 0 0 + . 0 0 3 ] 1Y K ‘ TOLERANCE NON- CUML AT I V E 7 fK "\ / f "\ f ) 0 . 8 9 + 0 . 0 8 [ . 0 3 5 + . 0 0 3 ]

KH 56 lm

Abstract: HQM584450 TCB 44 T427 BG20 t428 U5-28
Contextual Info: 31*11 ;=-6474,<=:0 47<0:60/4,<0 98?0: :05,@ 1EBOPMEN U 54@ koal[`af_ [YhYZadalq U 5 Egje @ Yf\ 5 Egje B [gf^a_mjYlagfk U NdYkla[ k]Yd]\ Yf\ ^dmp hjgg^]\ lqh]k YnYadYZd] Ead] Lg2>D57895; U Dfnajgfe]flYd ^ja]f\dq hjg\m[l .PgGQ [gehdaYfl/ U Mmldaf] Cae]fkagfk> .6629 p 5:29 p 5:29/ ee

Contextual Info: SN54ALS758, SN54AS758, SN54AS759 SN74ALS758, SN74AS758, SN74AS759 QUADRUPLE BUS TRANSCEIVERS WITH OPEN-COLLECTOR OUTPUTS D 2 9 1 0 , DECEMBER 1 9 8 3 -R E V IS E D M A Y 1986 S N 54' . . . J PACKAGE SIM74&#39; . . . D OR IM PACKAGE 2-Way Asynchronous Communication

Contextual Info: r 8 7 THIS DRAWING IS UNPUBLISHED. C COPYRIGHT 19 RELEASED FOR PUBLICATION BY AMP INCORPORATED. 6 ,19 ALL RISHTS RESERVED. D . 2 . 54+0 .0 8 t v d [ . 1 0 0 + . 0 0 3 ] 1Y K ‘ TOLERANCE NON- CUML AT I V E 7 fK "\ / f "\ f ) 0 . 8 9 + 0 . 0 8 [ . 0 3 5 + . 0 0 3 ]