54ALS Search Results

Contextual Info: S IM 54ALS1 0 1 0A , SIM 74ALS1 □ 1 0 A TRIPLE 3 INPUT POSITIVE N A N D B U FFE R S D 2 6 6 1 , A P R IL 1 9 8 2 • Buffer Version of 'A LS 10A • Package Outline” Addition Ceramic S N 74A LS 1010A . . . D O R N • -R E V IS E D M A Y 1 9 8 6 S N 5 4 A L S 1 0 1 0 A . . . J PACKAGE

ls74a

Abstract: 74as74
Contextual Info: SN 54ALS74A, SN 54AS74, SN 74ALS74A, SN 74 A S 74 DUAL D TYPE POSITIVE EDGE TRIGGERED FLIP FLOPS WITH CLEAR AND PRESET D 2 6 6 1 , APRIL 1 9 8 2 - • SN 54A LS74A , S N 54A S 74 . . . J PACKAGE SN 74A LS74A , S N 74A S 74 . , . D OR N PACKAGE Package O ption s Include P lastic "S m a ll O u tlin e "

LS299

Contextual Info: SN74ALS299, SN74ALS323 54ALS299 54ALS323 8-BIT UNIVERSAL SHIFT/STORAGE REGISTERS WITH 3-STATE OUTPUTS D 2 6 6 1 , D E C E M B E R 198 2 - R E V IS E D M A Y 19 8 6 SN 54ALS' s o £ 1 G lC 2 19 : s G 2 E 3 18 ] S L /Q g C 4 17 D Q h ' /q e L 5 16 3 h /q h

74AS1034

Abstract: LS1034
Contextual Info: TYPES 54ALS1034, SN54AS1034, SN74ALS1034, SN74AS1034 HEX DRIVERS D 2 6 6 1 . A P R IL 1 9 8 2 - R E V I S E D D E C E M B E R 1 9 8 3 'A S 1 0 3 4 O ffers High Capacitlve-Drive Capability SN 54ALS1034. S N 54A S1034 . . . J PACKAGE SN 74ALS1034, S N 74A S1034 . . . N PACKAGE

Contextual Info: SN 54ALS616, S N 5 4 A L S 6 1 7 , S N 74 A LS 6 16 . S N 7 4 A L S 6 1 7 16-BIT P A R A LLE L ERROR DETECTION AN D CORRECTION CIRCUITS D 2 8 4 0 , A P R IL 1 9 8 4 - R E V IS E D M A Y 1 9 8 6 • Detects and Corrects Single-Bit Errors • Detects and Flags Dual-Bit Errors

74ALS1000

Abstract: SN54ALS1000A
Contextual Info: TYPES 54ALS1000A. SN54AS1000, SN74ALS1000A, SN74AS1000 QUADRUPLE 2-INPUT POSITIVE NANO BUFFERS/DRIVERS 0 2 6 6 1 , A P R IL 1 9 8 2 - R E V I S E D D E C E M B E R 1 9 8 3 ' A L S 1 0 0 0 A is a B u ffe r V e r s io n o f SN 54ALS1O O O A, S N 5 4 A S 1 0 0 0 . . . J PA C K A G E

74AS843

Abstract: 74AS844 74ALS844 LS844 74ALS843
Contextual Info: SN 54ALSB43, SN 54A S843, SN 54A LS844, SN 54 A S844 SN 74ALSB43, SN 74A S843, SN 74A LS844, SN 74 A S844 9 BIT BUS INTERFACE D TYPE LATCHES WITH 3 STATE OUTPUTS D 2 9 1 0 , DECEMBER 1 9 8 3 - 3-S tate Buffer-Type Outputs Drive Bus-Llnes Directly REVISED M A Y 1 9 8 6

2yl6

Abstract: 74ALS38aM
Contextual Info: SN74ALS38A, 54ALS38A QUADRUPLE 2-INPUT POSITIVE-NAND BUFFERS WITH OPEN-COLLECTOR OUTPUTS D2661, A PRIL 1982 - R EV ISED M A Y 1986 • • SN 54ALS38A Package Options Include Plastic '"Small Outline" Packages, Ceramic Chip Carriers, and Standard Plastic and Ceramic 300-mii

Contextual Info: SN 54ALS100 3A, S N 74 A LS 10 0 3 A Q U AD RUPLE 2 INPUT POSITIVE-NAND BUFFERS WITH OPEN-COLLECTOR OUTPUTS D 2 6 6 1 , APRIL 1 9 8 2 -R E V IS E D M A Y 1 9 8 6 • S N 5 4 A IS 1 0 0 3 A . . . J PACKAGE Buffer Version of 'A LS03B S N 7 4 A L S 1 0 0 3 A . . . D OR N PACKAGE

54ALS04

Abstract: smd 6 pin als
Contextual Info: M M O T O R O L A Military 54ALS04 Hex 1-Input Inverter Gate ELECTRICALLY TESTED PER: 54ALS04 AVAILABLE AS: LOGIC DIAGRAM V cc A6 Y6 A5 FI r«! nri h Y5 A4 1) JA N : N/A 2) SM D: N/A 3) 883C: 54ALS04/BXAJC Y4 n°l r*l m X = CASE OUTLINE A S FOLLOWS: PACKAGE: CERDIP: C

54ALS08

Abstract: Y411
Contextual Info: MOTOROLA Military 54ALS08 Quad 2-Input Positive AND Gate ELECTRICALLY TESTED PER: 54ALS08 AVAILABLE A S: L O G IC D IA G R A M B4 Vqc fi^l A4 Y4 B3 Rai Rii F I A3 1 JAN : N/A 2) SM D: N/A 3) 883C: 54ALS08/BXAJC Y3 nói ITI ITI X = C A S E OUTLINE A S FO LLOW S:

MPG54ALS163

Abstract: 4 bit synchronous counter
Contextual Info: ^ M O T O R O L A M ilitary 54ALS163 S y n c h ro n o u s 4-Bit B in a ry C o u n te r (With S y n c h ro n o u s C lear) ELECTRICALLY TESTED PER: 54ALS163 AVAILABLE AS: The ALS163 is a high-speed 4-bit synchronous counter. It is edgetriggered, synchronously presetable, and cascadable M SI building

SN54AS352

Abstract: ALS352 AS153 SN54ALS352 SN74ALS352
Contextual Info: SN 54ALS352, SN 54AS352, SN 74ALS352, SN 74AS352 DUAL 4 LINE TO 1 LINE DATA SELECTORS/MULTIPLEXERS D 2 6 6 1 , A P R IL 1 9 8 2 - f t E V I S E D M A Y 1 9 8 6 S N 5 4 A L S 3 5 2 , S IM 54 A S 3 52 . . . J PACKAGE S N 7 4 A L S 3 5 2 , S N 7 4 A S 3 5 2 . . . D OR N PACKAGE

SN54AS808B

Abstract: SN74AS808B 54ALS808
Contextual Info: SN 54ALS808A, SN 54AS808B, SN 74ALS808A, SN 74 AS808 B HEX 2-INPUT AND DRIVERS D 2 6 6 1 , DECEMBER 1 9 8 2 - S N 5 4 A L S 8 0 8 A , S N 5 4 A S 8 0 8 B . . . J P AC K A G E S N 7 4 A L S 8 0 8 A , S N 7 4 A S 8 0 8 B . . . D W OR N P AC KA G E High Capacitive Drive Capability

Contextual Info: MOTOROLA Military 54ALS04 Hex 1-Input Inverter Gate ELECTRICALLY TESTED PER: 54ALS04 AVAILABLE A S: LOGIC DIAGRAM Vcc A6 Y6 A5 pui fwi nri H Y5 A4 D J A N : N/A 2 SM D: N/A 3) 883C: 54ALS04/BXAJC Y4 H»! ITI m X = C A S E O U TU N E A S FO LLO W S: PA C KA G E: CERDIP: C

SN74ALS1243

Abstract: 74als12 74ALS124
Contextual Info: TYPES S N 54A LS 1242, SM 54ALS1243, SN74ALS1242, SN74ALS1243 QUADRUPLE BUS TRANSCEIVERS W ITH 3-STATE OUTPUTS u w u n u ru in « B W « i 2-W a y Asynchronous Communication between Data DECEMBER 1982-REVISED DECEMBER 1983 SN S 4A LS12 4 2 , S N 54A LS 12 4 3

54als04

Contextual Info: M MOTOROLA M ilitary 5 4 A L S0 4 Hex 1-In p u t In v e rte r G ate ELECTRICALLY TESTED PER: 54ALS04 AVAILABLE AS: LOGIC DIAGRAM VC c A6 Y6 A5 V5 P«1 P»1 M FH N A4 Y4 \T\ [~5~| 1) JAN: N/A 2) SMD: N/A 3) 883C: 54ALS04/BXAJC X = CASE OUTLINE AS FOLLOWS:

54ALS00

Contextual Info: M O TO R O LA M ilitary 5 4 A L S0 0 Q u ad 2-Input P o sitiv e IM AN D G ate ELECTRICALLY TESTED PER: 54ALS00 AVAILABLE AS: LOGIC DIAGRAM Vcc B4 A4 Y4 1 JAN: N/A 2) SM D: N/A 3) 883C: 54ALS0Q/BXAJC B3 X = CASE OUTLINE A S FOLLOWS: PACKAGE: CERDIP: C CERFLAT:D

Contextual Info: ^ M O TO RO LA M ilitary 54ALS163 Synchronous 4 -B it Binary C o u n ter (W ith S ynchronous C lear) ELECTRICALLY TESTED PER: 54ALS163 AVAILABLE AS: The ALS163 is a high-speed 4-bit synchronous counter. It is edgetriggered, synchronously presetable, and cascadable MSI building

74als647

Contextual Info: 54ALS646 THRU 54ALS649, SN54AS646, SN54AS648 SN74ALS646 THRU SN74ALS649, SN74AS646, SN74AS648 OCTAL BUS TRANSCEIVERS AND REGISTERS D2661, DECEMBER 1983-NO VEM BER 1985 SN 54ALS'. SN 54AS' . JT PACKAGE SN74ALS'. SN 74A S' DW OR NT PACKAGE • Independent Registers for A and B Buses

74ALS533

Abstract: 74AS533
Contextual Info: TEXAS INSTR LOGIC a^biTai Daa3sfis s 2SE D 54ALS533, SNS4ASS33, SN74ALS533, SN74AS533 OCTAL D TYPE TRANSPARENT LATCHES WITH 3-STATE OUTPUTS D266T, APHIL 1982 - REVISED MAY 1986 SN 54ALS533. SN 54ASS33 . . . J PACKAGE S N 74A LS533, SN 74AS533 . . . DW OR N PACKAGE

74AS08

Abstract: 74ALS08
Contextual Info: SN 54ALS08, SN 54AS08, SN 74ALS08, SN 74A S08 QUADRUPLE 2-INPUT P0S1TIVE-AND GATES D 2 6 6 1 , A P R IL 1 9 8 2 - R E V I S E D M A Y 1 9 8 6 Package Options Include Plastic "Sm all O utline” Packages, Ceramic Chip Carriers, and Standard Plastic and Ceramic 300-m il

74AS857

Abstract: 74als857 54AS857 54ALS857 LTA 703 S 74als85 74as85
Contextual Info: SN 54ALS857, SN 54AS857, SN 74ALS857, SN 74AS857 HEX 2-T0-1 UNIVERSAL MULTIPLEXERS D 2 6 6 1 , DECEMBER 1 9 8 2 - SN 54A LS857, S N 54A S857 . . . JT PACKAGE SN 74ALS857, S N 74A S857 . . . DW OR NT PACKAGE • S elects True or C om p le m en tary Data •

74as175

Abstract: texas instruments of ic 74 ls 83 54AS174 IC sn 74 ls 83 54ALS175 54als174
Contextual Info: TYPES SN 54A LS174, SN 54ALS17S, SIU54AS174, SN 54 A S17S SN 74A LS174, SN 74A LS175, SN 74A S 174, SN 74 A S 175 HEX/QUADRUPLE D-TYPE FLIP-FLOPS WITH CLEAR D 2 6 6 1 , APRIL 1 9 8 2 - REVISION DECEMBER 1 9 8 3 'ALS174 and 'A S 174 Contain Six Flip-Flops with