LS240A Search Results

ALS240A-1

Abstract: DM74ALS240A als240a 74ALS DM64ALS240AWM DM74ALS241 DM74ALS240AWM
Contextual Info: Semiconductor D M 7 4A L S 2 4 0 A /D M 7 4 A L S 2 4 1 A /7 4 A L S 2 4 0 A -1 / D M 64A LS240A O ctal TR I-STA TE Bus Driver General Description Features These octal TRI-STATE bus drivers are designed to provide the designer with flexibility in implementing a bus interface

Contextual Info: g M O T O R O L A D E S C R IP T IO N — The S N 54LS/74LS540an d SN54LS/74LS541 are octal buffers and line drivers with the same functions a s the LS240and LS241. but with pinouts on the opposite side of the package. These device types are designed to be used as memory address drivers,

74AS241

Abstract: 74AS240 2269s TH 2267 54ALS240A
Contextual Info: SN 54A LS240A , S N 54 A LS 2 41A , SN 54 A S240 , SN 54AS241 SN 74A LS240A , S N 74A LS 241A , S N 74A S240, SN 74AS241 OCTAL BUFFERS AND LINE DRIVERS WITH 3-STATE OUTPUTS D2661, DECEMBER 1982-RE ViS E D MAY 1986 • SN 54ALS', SN 54A S' . . . J PACKAGE SN 74ALS', SN 74A S ' . , . DW or N PACKAGE

Contextual Info: R C H II_ D EM ICONDUCTO R t LS240A/DM74ALS241A/LS240A-1 Octal 3-STATE Bus Driver General Description Features These octal 3-STATE bus drivers are designed to provide the d esigner with fle xib ility in im plem enting a bus interface with memory, m icroprocessor, o r com m unication system s. The

74ALS

Abstract: DM74ALS240AN DM74ALS240ASJ DM74ALS240AWM ALS240A-1
Contextual Info: E M IC D N D U C T O R t LS240A/DM74ALS241A/LS240A-1 Octal 3-STATE Bus Driver General Description Features These octal 3-STATE bus drivers are designed to provide the d esigner w ith flexibility in im plem enting a bus interface with memory, m icroprocessor, o r com m unication system s. The

M74ALS374P

Abstract: dd127 4d40t
Contextual Info: MITSUBISHI iDGTL LOGIC} TI 1mF | bSLHÖ27 D0155E5 5 MITSUBISHI ALSTTLs ,oC* M 74A LS374P OCTAL D-TYPE EDGE-TRIGGERED FLIP FLOP W ITH 3-STATE OUTPUT NONINVERTED 6249827 MITSUBISHI 9 1D 12525 (DGTL LOGIC) DESCRIPTION D PIN CONFIGURATION (TOP VIEW) T h e M 7 4 A L S 3 7 4 P is a s e m ic o n d u c to r in te g ra te d c irc u it

D0-15L

Abstract: LS74AD
Contextual Info: 7 z1 % > -'0 '7 -¿ ? S ' M 74ALS873AP ¡C' 3< DUAL 4 -B IT D-TYPE TRANSPARENT LATCH W ITH 3-STATE OUTPUT NONINVERTED 50t° CDGTL LOGIC) DESCRIPTION PIN CONFIGURATION (TOP VIEW) DIR EC T RESET , p " IN P U T I M ° O UTPUT } -q C O N TR O L IN PU T E c

M74ALS193P

Abstract: TF2N 154027
Contextual Info: MITSUBISHI I -CDGTL L O G I C ? =11 De | bEMTñE? □□12454 ñ T~ ^ MITSUBISHI ALSTTLs . M74ALS193P SYNCHRONOUS PRESETTABLE U P /D O W N 4 -B IT B IN A R Y COUNTER 6248827 MITSUBISHI ÍDGTL LOGIC DESCRIPTION The M74ALS193P is a semiconductor integrated circuit

C 5121-00

Abstract: s48c tlc 1125 2811DZ D7528 TL500 TL 413 tl501 tlc1125 TLC7533
Contextual Info: SYSTEM/SERVO CIRCUITS SELECTION GUIDE data acquisition and conversion single-slope and dual-slope converters values specified for Ta = 25 C DESCRIPTION RESOLUTION SPEED (ms) 4 1/2 Digits 34 Dual-slope A/D with BCD output Dual-slope analog processors TYPE

dd127

Contextual Info: D e | hS4clflE!7 GG1E3M7 7 |~~ MIT SUB ISHI íDGTL LOGIC} TI MITSUBISHI ALSTTLs M74ALS15AP 6249827 MITSUBISHI <DGTL LOGI C 91D 12347 D TRIPLE 3-IN P U T POSITIVE AND GATE W ITH OPEN COLLECTOR OUTPUT DESCRIPTION Th e M 7 4A L S 15A P is a se m ic o n d u c to r in teg rated circu it

1e4d

Abstract: ls151p LS29 LS245 74als15
Contextual Info: MITSUBISHI -CDGTL LOGIC} TI -DE | 00123^0 S MITSUBISHI ALSTTLs ,o c* M 7 A L S ! 4 5 1 JP T-66-21-53 8-LINE TO 1-LINE DATA SELECTOR/MULTIPLEXER WITH STROBE 6249827 MITSUBISHI DGTL LOGIC r DESCRIPTION T h e M 7 4A L S 151 P is a sem iconductor in teg rated circuit

LS353P

Abstract: d12518 74ALS04A
Contextual Info: MI TSU BISHI {DGTL LOGIC! TI » F l b5MTÖ27 0Q1SS1Ö fl | ~ MITSUBISHI ALSTTLs M 74A LS353P o O ° DUAL 4 -U N E TO 1-LINE DATA SELECTOR/MULTIPLEXER WITH 3-STATE OUTPUT INVERTED 6249827 MITSUBISHI 9 1 D 12518 (DGTL LOGI C) DESCRIPTION T h e M 7 4A L S 353 P is a sem iconductor integrated circuit

74AS240

Abstract: 54ALS240A
Contextual Info: LS240A, SN74AS240 LS240A, SN54AS240 OCTAL BUFFERS AND LINE DRIVERS WITH 3-STATE OUTPUTS D2661, DECEM BER 1982-R E V IS E D M A Y 1986 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers S N 5 4 A L S ', S N 5 4 A S '. J P A C K A G E

Contextual Info: TYPES LS240A, SN54ALS241A, SN54AS240, SN54AS241 LS240A, SN74ALS241A, SN74AS240. SN74AS241 OCTAL BUFFERS AND LINE DRIVERS WITH 3-STATE OUTPUTS D2661, DECEMBER 1 9 8 2 - REVISED DECEMBER 1983 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers

SN7401

Abstract: National Semiconductor 4045 transistor bf 175 74ALS569 74AS1008 SN7449 SN74ALS244A SN54ALS1000A SN74ALS519 SN54ALS27
Contextual Info: GENERAL INFORMATION ORDERING INSTRUCTIONS AND MECHANICAL DATA FUNCTIONAL INDEX/SELECTION GUIDE PRODUCT GUIDE ADVANCED LOW-POWER SCHOTTKY AND ADVANCED SCHOTTKY CIRCUITS PROGRAMMABLE LOGIC ARRAYS BETA PRODUCTS EXPLANATION OF NEW LOGIC SYMBOLS CONNECTOR AND KEYBOARD PRODUCTS

74als05

Abstract: 74als245a LS574A
Contextual Info: MITSUBISHI íDGTL I LOGIC} _ TI 6249827 MITSUBISHI D eT | bEMTflE? □D lE 7t.l t I MITSUBISHI ALSTTLs M 74ALS1 6 2 3 AP DGTL LOGIC - 91D 12761 D OCTAL BUS TRANSCEIVER W ITH 3-STATE OUTPUT (NONINVERTED) 7 = 5 2 ? -3 / DESCRIPTION PIN CONFIGURATION (TOP VIEW)

diode ED 74a

Abstract: se 115n 74ALS04A
Contextual Info: MM MITSUBISHI -CDGTL LOGIC} T1 6249827 M I T S U B I S H I {D G T L 9 1 D 1 23 6 3 D GG123b3 S |~ MITSUBISHI ALSTTLs LOGIC M 74A LS 33A P QUADRUPLE 2-IN P U T POSITIVE NOR BUFFER W ITH OPEN COLLECTOR OUTPUT DESCRIPTION The M 7 4A L S 33A P is a se m ic o n d u c to r in teg rated circu it

LS240A

Contextual Info: R C H II_ D EM ICONDUCTO R t LS240A/DM74ALS241A/LS240A-1 Octal 3-STATE Bus Driver General Description Features These octal 3-STATE bus drivers are designed to provide the d esigner with fle xibility in im plem enting a bus interface with memory, m icroprocessor, o r com m unication system s. The

74AS240

Abstract: 54ALS240A
Contextual Info: LS240A, SN74AS240 LS240A, SN54AS240 OCTAL BUFFERS AND UNE DRIVERS WITH 3-STATE OUTPUTS DM01, DECEM BER 1982 - REVISED MAY 1986 3-State Outputs Drive Bus Lines or Duffer Memory Address Registers S N 5 4 A L S ', S N 5 4 A S ' . . . J P AC KA G E S N 7 4 A L S ', S N 7 4 A S '. . . D W OR N P AC KA G E

DT530

Abstract: 74ALS193D 74ALS573AD
Contextual Info: MITSUBISHI ÍDGTL LOGIC} TI D E I bEMTflE? .0012450 S I M ITSUBISHI ALSTTLS 6249827 MITSUBISHI M 7 4 A L S 2 4 0 A P 91D 12458 D CDGTL LOGIC OCTAL B U FFER/LIN E D R IVE R W IT H 3-STATE O U TPUT IN V E R T E D ) 7 ^ 5 5 - 0 DESCRIPTION The LS240AP is a semiconductor Integrated circuit

1d12407

Contextual Info: MITSUBISHI -CDGTL LOGICI TI TËj|t,EMTâ27 DDiaHO? □ MITSUBISHI ALSTTLs o c ^ , * 0 M 7 4 A LS 15 8 P 6249827 MITSUBISHI CDGTL L O GI C :' • T-66-21-51 QUADRUPLE 2-LINE TO 1-LINE DATA SELECTOR/MULTIPLEXER INVERTED) 9 1 D 12407 DESCRIPTION The M 74ALS158P is a sem iconductor integrated circuit

74ALS04A

Abstract: LS08D 74ALS37A LS193D
Contextual Info: MITSUBISHI -CDGTL LOGIC} 1>Ë| bEM^ôE? QaiaasT 3 | ” =11 MITSUBISHI ALSTTLs M 74A LS 30A P 6249827 MITSUBISHI D G T L LOGIC 91D D 1235 9 SINGLE 8-IN P U T POSITIVE NAND GATE | 5 — DESCRIPTION PIN CONFIGURATION (TOP VIEW) The M74ALS30AP is a semiconductor integrated circuit

LS192P

Abstract: 74ALS38
Contextual Info: MITSUBISHI -CDGTL LOGIC]-*!! bSMTñí? D 0 1 5 4 5 G □ |"~ MITSUBISHI ALSTTLs iV jG Ï M 74A LS192P ,* o o SYNCHRONOUS PRESETTABLE UP/DOW N DECADE COUNTER 6249827 M1 t s H j e h s h i 9 1D D G fL ~ ~ L d G ~ i~ cJ ~ DESCRIPTION 12450 D PIN CONFIGURATION (TOP VIEW

als240a

Abstract: SN54ALS240A SN54AS240 SN54AS241 SN74ALS240A SN74AS240 SN74AS241 SN54ALS241A
Contextual Info: LS240A, SN54A LS241A , S N 54A S 240, SN54AS241 LS240A, SN74A LS241A , S N 74A S 240, SN74AS241 OCTAL BUFFERS AND LINE DRIVERS WITH 3-STATE OUTPUTS D 2 6 6 1 , DECEMBER 1 9 8 2 -R E V IS E D M A Y 198 6 S N 5 4 A L S ', S N 5 4 A S ' . . . J P AC KA G E