51C256 Search Results

Contextual Info: ¡ n t I» P ftE U R fl 11 " H ì1 51C256H HIGH PERFORMANCE RIPPLEMODE 256Kx 1 CHMOS DYNAMIC RAM 51C256H-10t 51C256H-12 51C256H-15 51C256H-20 100 120 150 200 Maximum Column Address Accsss Tims (ns 40 50 65 85 Ripplemode Cycle Tims (ns) 50 60 75 95 Maximum Access Tims (ns)

Contextual Info: in te i’ 51C256L LOW POWER 256K X 1 CHMOS DYNAMIC RAM 51C256L-15 51C256L-20 Maximum Access Time ns 150 200 Maximum CHMOS Standby Current (mA) 0.1 0.1 • Low Power Data Retention ■ TTL and HCT Compatible — Standby current, CHMOS — 100 ¡¡A (max.)

Contextual Info: in te i’ 51C256HL HIGH PERFORMANCE LOW POWER RIPPLEMODE 256K X 1 CHMOS DYNAMIC RAM 51C256HL-15 51C256HL-20 Maximum Access Time ns 150 200 Maximum Column Address Access Time (ns) 70 90 Maximum CHtyOS Standby Current (mA) 0.1 0.1 Ripplemode Operation

Contextual Info: in te T 51C256HL HIGH PERFORMANCE LOW POWER RIPPLEMODE 256K X 1 CHMOS DYNAMIC RAM 51C256HL-15 51C256HL-20 Maximum Access Time ns 150 200 Maximum Column Address Access Time (ns) 70 90 Maximum CHMOS Standby Current (mA) 0.1 0.1 Ripplemode Operation Low Power Data Retention

intel 2102 Static RAM

Abstract: 51C256HL 51C256HL-15 51C256HL-20 TCAM
Contextual Info: in te i' 51C256HL HIGH PERFORMANCE LOW POWER RIPPLEMODE 256K X 1 CHMOS DYNAMIC RAM 51C256HL-15 51C256HL-20 Maximum Access Time ns 150 200 Maximum Column Address Access Time (ns) 70 90 Maximum CHtyOS Standby Current (mA) 0.1 0.1 Ripplemode Operation • Low Power Data Retention

51C256L

Abstract: 51C256L-12 51C256L-15 51C256L-20 28003* intel
Contextual Info: [P iF S iiU B lO tM Ä ß W in te T 51C256L LOW POWER 256K x 1 CHMOS DYNAMIC RAM Maximum Access Time ns Maximum CHMOS Standby Current (mA) • Low Power Data Retention - Standby current, CHMOS — 1 0 0 /¿A (max.) - Refresh period, RAS-Only — 32ms (max.)

A1803

Contextual Info: in t ^ l p,aiL 51C256H HIGH PERFORMANCE RIPPLEMODETM 256K X 1 CHMOS DYNAMIC RAM 51C256H-12t Maximum Access Time ns 120 Maximum Column Address Access Time (ns) Ripplemode Cycle Time (ns) 55 65 Ripplemode Operation 51C256H-15 150 70 B0 21C256H-20 209 90 100

Contextual Info: int ! 51C256L LOW POWER 256K X 1 CHMOS DYNAMIC RAM 51C256L-15 51C25Ì6L-20 Maximum Access Time ns 150 200 Maximum CHMOS Standby Current (mA) 0.1 0.1 • Low Power Data Retention ■ TTL and HCT Compatible — Standby current, CHMOS — 100 jxA (max.) — Refresh period, RAS-Only — 32 ms (max)

28003* intel

Abstract: 51C256L 51C256L-15 51C256L-20 2800-310
Contextual Info: in te i 51C256L LOW POWER 256K X 1 CHMOS DYNAMIC RAM 51C256L-15 51C256L-20 Maximum Access Time ns 150 200 Maximum CHMOS Standby Current (mA) 0.1 0.1 Low Power Data Retention • TTL and HCT Compatible — Standb y current, C HM O S — 100 /¿A (m ax.) — R efresh period, R AS-O nly — 32 m s (m ax)

B1GP

Abstract: 51C256H 51C256H-10 51C256H-12 51C256H-15 51C256H-20 28003* intel tpC-170
Contextual Info: i n t ^ r P R E U M M Â Ifflf " f l 1 5 1 C 2 5 6 H HIGH PERFORMANCE RIPPLEMODE 256K x 1 CHMOS DYNAMIC RAM Maximum Accesa Time ns Maximum Column Address Access Time (ns) Ripplemode Cycle Time (ne) 51C256H-10f 51C256H-12 51C256H-15 51C256H-20 100 120

Contextual Info: in té T 51C256L LOW POWER 256K x 1 CHMOS DYNAMIC RAM 51C256L-12 Maximum Access Time ns Maximum CHMOS Standby Current (mA) 120 0.1 • Low Power Data Retention - Standby current, CHMOS — 100 nA (max.) - Refresh period, RAS-Only — 32 ms (max.) - Data Retention Current — 230 ¡¡A

20 led VU meter

Abstract: 51C256HL 51C256HL-15 51C256HL-20 28003* intel
Contextual Info: in te i’ 51C256HL HIGH PERFORMANCE LOW POWER RIPPLEMODE 256K X 1 CHMOS DYNAMIC RAM 51C256HL-15 51C256HL-20 Maximum Access Time ns 150 200 Maximum Column Address Access Time (ns) 70 90 Maximum CHMOS Standby Current (mA) 0.1 0.1 Ripplemode Operation Low Power Data Retention

Contextual Info: in t e i 51C256H HIGH PERFORMANCE RIPPLEMODETM 256K X 1 CHMOS DYNAMIC RAM 51C256H-12t 51C256H-15 21C256H-20 Maximum Access Time ns 120 150 200 Maximum Column Address Access Time (ns) 55 70 90 Ripplemode Cycle Time (ns) 65 80 100 Ripplemode Operation Fast “ Usable Speed”

Contextual Info: U M M h m in te i 51C256H HIGH PERFORMANCE RIPPLEMODE 256Kx 1 CHMOS DYNAMIC RAM Maximum Access Time ns Maximum Column Address Access Time (ns) Rlppiemode Cycle Time (ns) 51C256H-10f 51C256H-12 51C256H-15 51C256H-20 100 120 150 200 40 50 65 85 50 60 75

21C256

Abstract: 51C256H 51C256H-12 51C256H-15 51C256H-20
Contextual Info: intei* 51C 256H HIGH PERFO RM ANCE RIPPLEM O D E 256K X 1 CHM OS D YN A M IC RAM Maximum Access Time ns Maximum Column Address Access Time (ns) Ripplemode Cycle Time (ns) 51C256K-12t 120 51C256H-15 150 55 70 80 65 21C256H-20 200 90 100 Ripplemode Operation

51C256L

Abstract: 51C256L-15 51C256L-20
Contextual Info: in te i 51C256L LOW POWER 256K X 1 CHMOS DYNAMIC RAM 51C256L-15 51C29Î6L-20 Maximum Access Tim e ns 150 200 Maximum CHMOS Standby Current (mA) 0.1 0.1 • Low Power Data Retention ■ TTL and HCT Com patible — Standby current, CHMOS — 100 jxA (max.)

21C256

Abstract: 51C256H 51C256H-12 51C256H-15 51C256H-20 28003* intel
Contextual Info: in t e i E 51C 256H HIGH PERFO RM AN CE R I P P L E M O D E T M 256K X 1 CH M O S D YN A M IC RAM 51C256H-12t 51C256H-15 120 150 70 80 Maximum Access Time ns Maximum Column Address Access Time (ns) 55 Ripplemode Cycle Time (ns) 65 21C256H-20 200 90 100 Ripplemode Operation

A1603

Abstract: 28003* intel C1101 51C256H 51C256H-10 51C256H-12 51C256H-15 51C256H-20
Contextual Info: P R E u m m ^ m in t e i 51C256H HIGH PERFORMANCE RIPPLEMODE 256K x 1 CHMOS DYNAMIC RAM Maximum Access Time ns Maximum Column Address Access Tims (ns) Ripplemode Cycle Tims (ns) 51C256H-10+ 51C256H-12 51C256H-15 51C256H-20 100 120 150 200 40 50 65 85

iw 1688

Abstract: 57C256 51C256L 51C256L-12 51C256L-15 51C256L-20 28003* intel
Contextual Info: P E E L m m ^ m ir it e T 51C256L LOW POWER 256K x 1 CHMOS DYNAMIC RAM 51C256L-12 51C256L-15 51C256L-20 120 150 200 0.1 0.1 0.1 Maximum Access Time ns Maximum CHMOS Standby Current (mA) Low Operating Current — 50 mA (max.) • Low Power Data Retention

KM41C256-8

Abstract: HM51256P-10 km41c256 HM51256P-12 HM51256LP-10 HM51256P-15 KM41C256-10 HM51256LCP-10 MB81C258-10 HM51256CP-15
Contextual Info: - 2 5 6 K X i m & tt £ OC TRAC max ns) CMOS • ; + TRCY min (ns) TCAD (ns) TAH min (ns) > ? TF mir (ns) D y n a m i c RAM íf li TWCY min (ns) TDH (ns) TRWC min (ns) V D D or V C C (V) 16 P I N ( 2 6 2 1 4 4 X 1 M A M 1 DD max (mA) ti [+typ] 5 12 5 8 ÍÜ

MSM51C256A

Abstract: MSC2321B-70YS18
Contextual Info: O K I Semiconductor MSC2321 B-xxYSI 8/DS18 524,288-Word by 36-Bit DRAM Module: Fast Page Mode DESCRIPTION The OKI M SC2321B-xxYS18/DS18 is a fully decoded 524,288-w o rd x 36-bit CMOS D ynam ic R andom Access M em ory M odule com posed of sixteen 1-Mb DRAMs in SOJ M SM 514256B packages an d eight

FZJ 131

Abstract: MSM51C256 MSM51C256-10 MSM51C256-12 MSM51C256-8 MSM51C256RS dynamic ram binary cell
Contextual Info: O K I semiconductor 51C256RS/JS • 7= - a .* - A S " * 262, 144 W ORD X 1-BITS DYNAM IC RAM GENERAL DESCRIPTION The 51C256 is a new generation dynamic RAM organized as 262,144 words by 1 bit. The technology used to fabricate the 51C256 is OKI's CMOS silicon gate process technology. The

Contextual Info: O K I semiconductor 51C256A 262,144-Word x 1-Bit DYNAMIC RAM G EN E R A L DESCRIPTION T h e M S M 5 1 C 2 5 6 A is a new generation dynam ic R A M org an ized a s 262,144-w ord x 1-bit. T h e technology u sed to fabricate the M S M 5 1 C 2 5 6 A is O K I’s C O M S silicon gate p ro c e ss tech ­

41C1000

Abstract: fujitsu 814100 TC 55464 toshiba HN62304 hn623257 658128 816b 41c464 hn62324 M7202A
Contextual Info: MEM ORY ICs FUNCTION GUIDE 3. C R O S S REFERENCE GUIDE 3.1 DRAM Density Org. Samsung Mode Toshiba Hitachi Fujitsu H M 51 256 M B 81256 NEC Oki 64K X 1 Page K M 416 4 25 6 K X 1 F. Page KM 41C256 TC 51256 Nibble KM 41C257 TC51257 S. C olu m n KM 41C258 TC 51258