48LD Search Results

circuited

Abstract: SMD0820-48LD microwave detection
Contextual Info: Power Amplifiers SMD0820-48LD 900/1800 MHz to 1000/2000 MHz Specifications RF Frequency P1dB Power Output Linear Gain Gain Flatness Over Band Gain Change Over Temp Third Order Intercept OIP3 Input Return Loss Output Return Loss Min Typ Max 900/1800 1000/2000

Contextual Info: Reportable Substances in Components Package Type : QFN77 Component Weight : Document No : QFN77-48LD-GRN-RS-3 Process Type : Standard D/A & NiPdAu Lead Finish 0.1311 grams 7.0mmx7.0mm Lead #: No 1 2 3 4 5 6 7 48LD Material Content in % Molding Compound 47.96%

Contextual Info: FAX# 408 944-0970 TITLE 48 LEAD LQFP 7x7mm PACKAGE OUTLINE & RECOMMENDED LAND PATTERN DRAWING # LQFP7x7-48LD-PL-1 Rev A ECN 022312HC05 Originator E. dlSantos Change New release UNIT MM [INCHES] Reason Per George C.

48LD

Contextual Info: SSOP-48LD-PD-1-A

LP62S16128BV-55LLTF

Abstract: LP62S16128BV-70LLTF 48LD LP62S16128B-T
Contextual Info: LP62S16128B-T Series 128K X 16 BIT LOW VOLTAGE CMOS SRAM Document Title 128K X 16 BIT LOW VOLTAGE CMOS SRAM Revision History Rev. No. 1.1 History Issue Date Remark Add product family May 26, 2003 Final Change ICC2 from 15mA to 8mA 1.2 Modify 48LD CSP outline dimensions

LP62S16128BV-70LLIF

Abstract: LP62S16128BU-55LLIF LP62S16128BU55LLIF 48LD LP62S16128B-I LP62S16128BV-55LLIF LP62S16128BU-70LLIF
Contextual Info: LP62S16128B-I Series 128K X 16 BIT LOW VOLTAGE CMOS SRAM Document Title 128K X 16 BIT LOW VOLTAGE CMOS SRAM Revision History Rev. No. 1.1 History Issue Date Remark Add product family May 26, 2003 Final Change ICC2 from 15mA to 8mA 1.2 Modify 48LD CSP outline dimensions

48LD

Contextual Info: FREESCALE SEMICONDUCTOR, ALL RIGHTS RESERVED. TITLE: INC. MECHANICAL OUTLINE 48LD LQFP, 12 X 12 X 1. 4 PKG, 0. 8 PITCH, CASE OUTLINE PRINT VERSION NOT TO SCALE DOCUMENT NO: 98ARL10538D REV: A CASE NUMBER: 1426-01 26 JUL 2005 STANDARD: NON-JEDEC 0 . 20 0 . 10

Contextual Info: LP62S16128B-I Series 128K X 16 BIT LOW VOLTAGE CMOS SRAM Document Title 128K X 16 BIT LOW VOLTAGE CMOS SRAM Revision History Rev. No. 1.1 History Issue Date Remark Add product family May 26, 2003 Final Change ICC2 from 15mA to 8mA 1.2 Modify 48LD CSP outline dimensions

48LD

Abstract: 175C 245C MC74LCX16245DTR2
Contextual Info: PRODUCT/PROCESS CHANGE NOTIFICATION Generic Copy 14-JUN-2000 SUBJECT: ON Semiconductor Product/Process Notification #10188 TITLE: Addendum to PCN#10180: 48LD TSSOP 3-Layer Pre-Plated Lead Frame EFFECTIVE DATE: 22-Sep-2000 AFFECTED CHANGE CATEGORY: Package Change

48LD

Contextual Info: LP62S16256F-I Series 256K X 16 BIT LOW VOLTAGE CMOS SRAM Document Title 256K X 16 BIT LOW VOLTAGE CMOS SRAM Revision History History Issue Date Remark 0.0 Initial issue November 22, 2002 Preliminary 0.1 Change ICC2 from 15mA to 8mA April 18, 2003 0.2 Modify 48LD CSP bottom view outline drawing

Contextual Info: FAX# 408 944-0970 TITLE 48 LEAD TQFP 7x7mm PACKAGE OUTLINE & RECOMMENDED LAND PATTERN DRAWING # TQFP7x7-48LD-PL-1 UNIT MM NOTES : 1. DIMENSION DOES NOT INCLUDE MOLD FLASH OR PROTRUSIONS, EITHER OF WHICH SHALL NOT EXCEED 0.254MM. 2. LEAD DIMENSION DOES NOT INCLUDE DAMBAR PROTRUSION.

48LD

Abstract: LP62E16256E LP62E16256E-T
Contextual Info: LP62E16256E-T Series 256K X 16 BIT LOW VOLTAGE CMOS SRAM Document Title 256K X 16 BIT LOW VOLTAGE CMOS SRAM Revision History History Issue Date Remark 0.0 Initial issue July 4, 2002 Preliminary 1.0 Final version release July 17, 2003 Final 1.1 Modify 48LD CSP outline dimensions

SSPA C Band

Abstract: SMD0820-48LD 1800 ldmos 48LD SSPA j1 female connector pin
Contextual Info: SMD0820-48LD Dual Band SSPA FOR ECM APPLICATIONS The SM0820-45LD is a solid state LDMOS amplifier designed primarily for ECM applications. This amplifier provides two operating bands from 900-1000 MHz and 1800-2000 MHz, provides 50 dB of gain per band, ± 0.5 dB gain flatness over each

SMD0820-48LD

Abstract: microwave detection Stealth Microwave
Contextual Info: Power Amplifiers SMD0820-48LD 900/1800MHz to 1000/2000MHz Specifications RF Frequency P1dB Power Output Linear Gain Gain Flatness Over Band Gain Change Over Temp Third Order Intercept OIP3 Input Return Loss Output Return Loss Min Typ Max 900/1800 1000/2000

Contextual Info: FAX# 408 944-0970 TITLE 48 LEAD SSOP PACKAGE OUTLINE & RECOMMENDED LAND PATTERN DRAWING # SSOP-48LD-PL-1 Rev A ECN 050112HC06 Originator E. dlSantos Change New release UNIT MM Reason Per George C.

Contextual Info: LP62S16128B-T Series 128K X 16 BIT LOW VOLTAGE CMOS SRAM Document Title 128K X 16 BIT LOW VOLTAGE CMOS SRAM Revision History Rev. No. 1.1 History Issue Date Remark Add product family May 26, 2003 Final Change ICC2 from 15mA to 8mA 1.2 Modify 48LD CSP outline dimensions

Contextual Info: UM23C64100 4,194,304 X 16/8,388,608 X 8 BIT CMOS MASK ROM PRELIMINARY Features • 4,194,304 x 1 6 /8 ,3 8 8 ,6 0 8 x 8 -b it o rga n izatio n ■ Full static o pe ra tio n ■ S in g le + 5 V p o w e r s u p p ly ■ T T L-co m p atib le inputs and o utp uts

AN2232-02

Abstract: AN2232L-02 CSTLSM00G53 ADM213 FT2232D AN2232L-01 MAXIM 9737 93LC ft2232dr SP213
Contextual Info: Document No.: FT_000173 FT2232D DUAL USB TO SERIAL UART/FIFO IC Datasheet Version 2.05 Clearance No.: FTDI# 127 Future Technology Devices International Ltd FT2232D Dual USB to Serial UART/FIFO IC The FT2232D is a dual USB to serial UART or FIFO interface with the following advanced

A29L800

Abstract: A29L800V
Contextual Info: A29L800 Series 1M X 8 Bit / 512K X 16 Bit CMOS 3.0 Volt-only, Preliminary Boot Sector Flash Memory Features n Single power supply operation - Full voltage range: 2.7 to 3.6 volt read and write operations for battery-powered applications n Access times: - 70/90 max.

LP62E16256E

Abstract: LP62E16256E-T
Contextual Info: LP62E16256E-T Series 256K X 16 BIT LOW VOLTAGE CMOS SRAM Document Title 256K X 16 BIT LOW VOLTAGE CMOS SRAM Revision History Rev. No. History Issue Date Remark 0.0 Initial issue July 4, 2002 Preliminary 1.0 Final version release July 17, 2003 Final July, 2003, Version 1.0

smd transistor HB

Abstract: LP62S16128B-T
Contextual Info: LP62S16128B-T Series 128K X 16 BIT LOW VOLTAGE CMOS SRAM Features n Operating voltage: 2.7V to 3.6V n Access times: 55/70 ns max. n Current: Very low power version: Operating: 55ns 40mA (max.) 70ns 35mA (max.) Standby: 10µA (max.) n n n n n Full static operation, no clock or refreshing required

0X00

Abstract: 16C550 LM3S608
Contextual Info: TE X AS INS TRUM E NTS - P RO DUCTI O N D ATA Stellaris LM3S608 Microcontroller D ATA SH E E T D S -LM 3S 608- 9 1 0 2 C opyri ght 2007-2011 Texas Instruments Incor porated Copyright Copyright © 2007-2011 Texas Instruments Incorporated All rights reserved. Stellaris and StellarisWare are registered trademarks of Texas Instruments

Contextual Info: DS90UR905 Serializer and DS90UR906 Deserializer Evaluation Kit User’s Manual NSID: SERDESUR-65USB Rev 0.4 National Semiconductor Corporation Date: 3/26/2010 Page 1 of 44 Table of Contents TABLE OF CONTENTS . 2

Contextual Info: TE X AS INS TRUM E NTS - P RO DUCTI O N D ATA Stellaris LM3S300 Microcontroller D ATA SH E E T D S -LM3S 300- 111 0 7 C o p yri g h t 2 0 07-2011 Te xa s In stru me n ts In co r porated Copyright Copyright © 2007-2011 Texas Instruments Incorporated All rights reserved. Stellaris® and StellarisWare® are registered trademarks of Texas Instruments