2B443FL Search Results

DDU-6-10

Abstract: DDU-6-12 DDU-6-16 DDU-6-20 DDU-6-30 DDU-6-35 DDU-6-40 DDU-6-45 DDU-6-50 DDU-6-60
Contextual Info: DATA DELAY DEVICES INC 53E D • 2b443fl2 000DS4b S ■ 7 Z' V 7 “ / 3 Digital Delay Units SERIES: DDU-6 T2L Interfaced, 5 Outputs 14 pin DIP Features: ■ ■ ■ ■ Low Cost. Completely interfaced for TTL. Low profile. Fits standard 14 pins DIP socket.

manchester

Abstract: manchester decoder T 1553 MAD-8783 MAE-8782
Contextual Info: BATA DELA Y D E V I C E S INC b3E D • 2b443fl2 □ □ □ □ ‘Ì70 ESfl ■ DDD 1553 Manchester Coders s e rie s : MAE-8782 Encoder MAD-8783 Decoder 20 mbaud Specifications: ■ Completely TTL buffered. ■ Operating temperature: 0“C to 70°C (-55*C to

Contextual Info: :a s f L ogic data V m delay \a/ devices?Inc. Programmable Delay Units SERIES: PDU-17F 7 Bit T T L Interfaced Specifications: • Delay variation: Monotonic in one direction. ■ Supply current: Ic c l ■ Program m ed delay tolerance: ± 5 % or 2 ns whichever is greater.

Contextual Info: iasi Logic Digital Delay Units SERIES: 10 Taps 14 pins DIP TTL Interfaced DDU-7F deteyW data y » » devicesYinc. Features: • ■ ■ ■ ■ Test Conditions: Auto-insertable. Com pletely interfaced for TTL No external com ponents required P.C. board space econom y achieved

PDU-13256F-1

Abstract: PDU-13256F-2 PDU-13256F-3 PDU-13256F-4 PDU-13256F-5 PDU-13256F-6 PDU-13256F-7 PDU-13256F-8 PDU-13256F-9
Contextual Info: Digitally Programmable data delayNo Delay Units SERIES: P D U -1 3256F . devices? _ _ . 8-Bit TTL Interfaced >«-. Test Conditions: Specifications: • Delay variation: Monotonic in one direction. ■ Input pulse-width: ■ Programmed delay tolerance: ±5% or

3D7303

Contextual Info: 3D7303 MONOLITHIC TRIPLE FIXED DELAY LINE SERIES 3D7303 data Gc^v) delay devices,vinc. FEATURES PACKAGES All-silicon, low-power CMOS technology TTL/CMOS compatible inputs and outputs Vapor phase, IR and wave solderable Auto-insertable (DIP pkg.) Low ground bounce noise

MAD-8783

Contextual Info: 1553 Manchester Decoder data delay 'o' series: MAD-8783 20 MBAUD devicesVinc. Specifications: • Completely TTL buffered. ■ Operating temperature: 0°C to 70°C (-55 C to +125°C on request). ■ Temperature coefficient: 100 PPM/ C. ■ Supply voltage: 5 Vdc ± 5%.

Contextual Info: 1553 Manchester Decoder s e r ie s : MAD-8783 20 MBAUD data (/£y delay \d/ devices? Specifications: • Completely TTL buffered. ■ Operating temperature: 0°C to 70°C (-55 C to +125°C on request). ■ Temperature coefficient: 100 PPM/ C. ■ Supply voltage: 5 Vdc ± 5%.

mad85-10

Contextual Info: mchester Decoder SERIES: MAD-85 14 pins DIP TTL Interfaced data Vjga delay \q devices^mi e. Features: • TTL input & outputs. ■ 14 pins DIP. ■ Data Rates to 25 MB/S. ■ Self Syncronizing within one BIT time. A pp licatio n : ■ Local Area Network LAN interfaces.

Contextual Info: 3D7502 data delay devices;inc. MONOLITHIC MANCHESTER DECODER SERIES 3D7502 PACKAGES FEATURES All-silicon, low-power CMOS technology TTL/CMOS compatible inputs and outputs Vapor phase, IR and wave solderable Auto-insertable (DIP pkg.) Low ground bounce noise

Contextual Info: 3D7010 data devices, . MONOLITHIC 10-TAP FIXED DELAY LINE SERIES 3D7010 PACKAGES FEATURES All-silicon, low-power CMOS technology* TTL/CMOS compatible inputs and outputs Vapor phase, IR and wave solderable Auto-insertable (DIP package) Low ground bounce noise

Contextual Info: 3D7304 data \Q^S> delay devices^i«. MONOLITHIC QUADRUPLE FIXED DELAY LINE SERIES 3D7304 PACKAGES FEATURES • All-silicon, low-power CMOS technology 11 c 1 ^ 1 4 □ VDD TTL/CMOS compatible inputs and outputs N/C c 2 13 □ N/C Vapor phase, IR and wave solderable

DDU7F100ME5

Abstract: DDU7F500
Contextual Info: iasi Log ic Digital Delay Units SER IES : 10 Taps 14 pins DIP T T L Interfaced DDU-7F data w3^ / delay devicesVinc. Features: • ■ ■ ■ ■ Test Conditions: Auto-insertable. Com pletely interfaced for TTL No external com ponents required P.C. board space economy achieved

24.000 mhz

Abstract: FMU-3-3R000M
Contextual Info: Frequency Multiplying Unit data SERIES: FMU-3 14 pins DIP TTL Interfaced delay devices; _ Features: • Auto-insertable. ■ Completely interfaced with TTL and DTL application. ■ No external components required. ■ P.C. board space economy achieved.

PPD-23-1

Abstract: PPD-23-10 PPD-23-15 PPD-23-2 PPD-23-20 PPD-23-3 PPD-23-40 PPD-23-5 PPD-23-50
Contextual Info: data delay devicesYinc. Programmable Pulse Discriminator SER|ES: PPD23 3 BIT T T L Interfaced Features: • D iscrim inates against precisely p ro g ram m ed pulse w idths. ■ 3 -bit address. ■ 2 4 pins DIP. ■ Low profile. PW IN = Input pulse width

1T311

Abstract: 15F4
Contextual Info: data t o delayW devices;,.^ EFasf L o g ic Programmable Delay Units SERIES: PDU-15F 5 Bit TTL Interfaced Specifications: Features: Supply current: Icch = 70 • Propagation delay: Address to output (T su a ) = 7 ns typ. Enable to output (Tsue) = 6 ns typ.

Contextual Info: HCM OS — Logic Surface Mounted SERIES: SMD-99C Delay Line 5 Outputs • Designed for surface mounting. ■ Low profile .1 7 5 max. height. ■ Com pletely interfaced HCMOS. Specifications: ■ No. Taps: 5 equally spaced taps. Total delay tolerance: ± 5% or 2 ns whichever is greater.

Contextual Info: 3D7110 data QJO delay devices,!., MONOLITHIC 10-TAP FIXED DELAY LINE SERIES 3D7110 PACKAGES FEATURES All-silicon, low-power CMOS technology TTL/CMOS compatible inputs and outputs Vapor phase, IR and wave solderable Auto-insertable (DIP pkg.) Low ground bounce noise

Contextual Info: data V£&>/ delay \L devices? igital Delay Units S ER IES ; Continuously Variable T T L Interfaced DDU-39F Features: • Completely interfaced with TTL. ■ 0.5 ns adjustment resolution. ■ Fits standard 16 pin DIP sockets. - h| Specifications: .2 ■ Temperature coefficient: 220 PPM/°C.

PDU-1064H-1

Abstract: PDU-1064H-10 PDU-1064H-2 PDU-1064H-3 PDU-1064H-4 PDU-1064H-5 PDU-1064H-6 PDU-1064H-8 T-S00
Contextual Info: Digitally Programmable Dclsy Units series: PDU-1064H 9 6-Bit E C L Interfaced Features: Low propagation delay ln p u t& output ECL buffered 6-B IT ECL program m able delay line Output sam e polarity of input Com pletely interfaced C om pact& low profile

Contextual Info: data delay devices;me. zFast Logic Delayed Pulse Generator SERIES: T2L Interfaced 8 pin DIP DPG-41 Features: • ■ ■ ■ Low Cost. Completely interfaced for TTL. Low profile. Fits standard 8 pins DIP socket. Specifications: ■ ■ ■ ■ ■ ■ ■

P103

Abstract: 13f3
Contextual Info: 7a s t L ogic data V/3\> Programmable Delay Lines delay \D devices? me. S ER IES : PDU-13F 3 BIT T 2L Interfaced b F e a tu re s : • ■ ■ ■ ■ ■ ■ Digitally program m able in 8 delay steps. Fits standard 14 pins DIP socket. Input & outputs fully TTL interfaced & buffered.

DDU-5J-101000

Abstract: H300A D00101 DDU-5J-10500 DDU-5J-10050 DDU-5J-10100 DDU-5J-10150 DDU-5J-101500 DDU-5J-10200 DDU-5J-10250
Contextual Info: data delay Digital Delay Units SERIES: DDU-5J 3 devices;inc. 10 Taps 32 pins DIP T2L Interfaced Features: • Completely interfaced for TTL and DTL applications. ■ No external components required. ■ 10 Taps equally spaced. ■ P. C. board space economy achieved.

Contextual Info: daiaV^V ddayW devices;inc. H CM O S-Logic Digital Delay Units SERIES: 5 Outputs 14 pins DIP DDU-4C ; Features: • ■ ■ ■ ■ Completely interfaced for CMOS. No external components required. P.C. board space economy achieved. Low profile. Fits standard 14 pins DIP socket.