2B443 Search Results

Contextual Info: DATA DELAY DEVICES INC 53E D • 2b443ñ2 GDQDbl4 M ■ T-5/-/9 Pulse Width Controller EC L Interfaced 16 pin DIP PWC-10 SERIES; devices^inc. Features: ■ ■ ■ ■ ■ Exact control of pulse width Rising edge trigger Auto-insertable ECL input & outputs

T110-11

Abstract: T110 T110-10 hy 010 t1-11 T110-12 t11131
Contextual Info: »ATA DELAY DEVICES INC b3E D • 2b443fi2 QQÜGRLä iQI « D D D Isolation Transformer SERIES: T110 DIL T il l (DIP) for Ethernet Application IEEE 802.3 (10 BASE 2,10 Base 5) and ECMA compatible. Low profile packages 16 pin pattern. Low leakage inductance and winding capaci­

DDU-6-10

Abstract: DDU-6-12 DDU-6-16 DDU-6-20 DDU-6-30 DDU-6-35 DDU-6-40 DDU-6-45 DDU-6-50 DDU-6-60
Contextual Info: DATA DELAY DEVICES INC 53E D • 2b443fl2 000DS4b S ■ 7 Z' V 7 “ / 3 Digital Delay Units SERIES: DDU-6 T2L Interfaced, 5 Outputs 14 pin DIP Features: ■ ■ ■ ■ Low Cost. Completely interfaced for TTL. Low profile. Fits standard 14 pins DIP socket.

manchester

Abstract: manchester decoder T 1553 MAD-8783 MAE-8782
Contextual Info: BATA DELA Y D E V I C E S INC b3E D • 2b443fl2 □ □ □ □ ‘Ì70 ESfl ■ DDD 1553 Manchester Coders s e rie s : MAE-8782 Encoder MAD-8783 Decoder 20 mbaud Specifications: ■ Completely TTL buffered. ■ Operating temperature: 0“C to 70°C (-55*C to

Contextual Info: data V7^v>/ Programmable Pulse delay \o fionoratnr PPG~36F devices?inc. EFasf Logic s e r ie s U G l l G l d l U l 6 : B it T T L I n t e r f a c e d Features: • Precise pulse width. ■ Inverted & non-inverted outputs. ■ 6-BIT address. ■ 1 ns to 10 ns incremental steps.

Contextual Info: :a s f L ogic data V m delay \a/ devices?Inc. Programmable Delay Units SERIES: PDU-17F 7 Bit T T L Interfaced Specifications: • Delay variation: Monotonic in one direction. ■ Supply current: Ic c l ■ Program m ed delay tolerance: ± 5 % or 2 ns whichever is greater.

Contextual Info: Multiple Digital Delay Units SER|ES; MDU-14 w 24 pins DIP 10 0 K E C L Interfaced data delay devices. me. Features: • Input & output buffered. ■ 4 delay lines/package. ■ Compatible with ECL circuits. S pecificatio ns: ■ Total delay tolerance: ± 5 % or 1 ns

Contextual Info: iasi Logic Digital Delay Units SERIES: 10 Taps 14 pins DIP TTL Interfaced DDU-7F deteyW data y » » devicesYinc. Features: • ■ ■ ■ ■ Test Conditions: Auto-insertable. Com pletely interfaced for TTL No external com ponents required P.C. board space econom y achieved

Contextual Info: 7a s t Logic Programmable Pulse Discriminator data V/^v> delay W devices?inc. D escription: The Programmable Discriminator Module, PPD-56 series, is a very powerful and versa­ tile unit. It can be used to discrim inate high pulse width or low pulse w idth or a

Contextual Info: = F AST data t o d elayW device^ inc. Dynamic Memory Timer T T L Interfaced 14 pins DIP DMT-300 SERIES: Features: • All DRAM’s timing generated from a single MREQ signal ■ Accurate and stable timing ■ Rising-edge triggered ■ PC board economy ■ Saves components

3D7408

Abstract: 3D7408-1 3D7408-2 3D7408-3 3D7408-4
Contextual Info: 3D7408 data delay devices. MONOLITHIC 8-BIT PROGRAMMABLE DELAY LINE SERIES 3D7408 PACKAGES FEATURES All-silicon, low-power CMOS technology TTUCMOS compatible inputs and outputs Vapor phase, IR and wave solderable Auto-insertable (DIP pkg.) Low ground bounce noise

PDU-13256F-1

Abstract: PDU-13256F-2 PDU-13256F-3 PDU-13256F-4 PDU-13256F-5 PDU-13256F-6 PDU-13256F-7 PDU-13256F-8 PDU-13256F-9
Contextual Info: Digitally Programmable data delayNo Delay Units SERIES: P D U -1 3256F . devices? _ _ . 8-Bit TTL Interfaced >«-. Test Conditions: Specifications: • Delay variation: Monotonic in one direction. ■ Input pulse-width: ■ Programmed delay tolerance: ±5% or

DDU-47F

Contextual Info: ïF a s t L o g ic Digital Delay Units SERIES: DDU-47F Continuously Variable TTL Interfaced data m delay devices; inc. Features: • Completely interfaced with TTL. ■ .25 ns adjustment resolution. ■ Surface mount. Specifications: ■ Temperature coefficient: 220 PPM/"C.

3D7303

Contextual Info: 3D7303 MONOLITHIC TRIPLE FIXED DELAY LINE SERIES 3D7303 data Gc^v) delay devices,vinc. FEATURES PACKAGES All-silicon, low-power CMOS technology TTL/CMOS compatible inputs and outputs Vapor phase, IR and wave solderable Auto-insertable (DIP pkg.) Low ground bounce noise

MAD-8783

Contextual Info: 1553 Manchester Decoder data delay 'o' series: MAD-8783 20 MBAUD devicesVinc. Specifications: • Completely TTL buffered. ■ Operating temperature: 0°C to 70°C (-55 C to +125°C on request). ■ Temperature coefficient: 100 PPM/ C. ■ Supply voltage: 5 Vdc ± 5%.

3D7110

Abstract: 3D7110D SOIC-14 SOIC-16 12M05 Q0011
Contextual Info: 3D7110 data O J> / delay _ devices; me. MONOLITHIC 10-TAP FIXED DELAY LINE SERIES 3D7110 FEATURES PACKAGES All-silicon, low-power CMOS technology TTI_/CMOS compatible inputs and outputs Vapor phase, IR and wave solderable Auto-insertable (DIP pkg.) Low ground bounce noise

Contextual Info: 1553 Manchester Decoder s e r ie s : MAD-8783 20 MBAUD data (/£y delay \d/ devices? Specifications: • Completely TTL buffered. ■ Operating temperature: 0°C to 70°C (-55 C to +125°C on request). ■ Temperature coefficient: 100 PPM/ C. ■ Supply voltage: 5 Vdc ± 5%.

mad85-10

Contextual Info: mchester Decoder SERIES: MAD-85 14 pins DIP TTL Interfaced data Vjga delay \q devices^mi e. Features: • TTL input & outputs. ■ 14 pins DIP. ■ Data Rates to 25 MB/S. ■ Self Syncronizing within one BIT time. A pp licatio n : ■ Local Area Network LAN interfaces.

Contextual Info: 3D7502 data delay devices;inc. MONOLITHIC MANCHESTER DECODER SERIES 3D7502 PACKAGES FEATURES All-silicon, low-power CMOS technology TTL/CMOS compatible inputs and outputs Vapor phase, IR and wave solderable Auto-insertable (DIP pkg.) Low ground bounce noise

Contextual Info: data delay W device^ inc. Digitally Programmable Delav Units series: PDU-1016 H * 4-Bit E C L Interfaced Specifications: Features: • ■ ■ ■ ■ ■ Test Conditions ■ Delay va riatio n : M onotonic in one direction. ■ Program m ed delay tolerance: ± 5% or 1 ns

Contextual Info: 3D7010 data devices, . MONOLITHIC 10-TAP FIXED DELAY LINE SERIES 3D7010 PACKAGES FEATURES All-silicon, low-power CMOS technology* TTL/CMOS compatible inputs and outputs Vapor phase, IR and wave solderable Auto-insertable (DIP package) Low ground bounce noise

Contextual Info: 3D7304 data \Q^S> delay devices^i«. MONOLITHIC QUADRUPLE FIXED DELAY LINE SERIES 3D7304 PACKAGES FEATURES • All-silicon, low-power CMOS technology 11 c 1 ^ 1 4 □ VDD TTL/CMOS compatible inputs and outputs N/C c 2 13 □ N/C Vapor phase, IR and wave solderable

Contextual Info: Digitally Programmable Delay Units s e r i e s : pdu-io256h sdelay s ? w\0 / devicesYinc. 8-Bit E C L Interfaced Test Conditions Specifications: • In p u t p ulse-w id th: > 1 5 0 % o f Max. delay. ■ In p u t p u lse spacing: ■ Delay variation: Monotonic in one direction.

DDU7F100ME5

Abstract: DDU7F500
Contextual Info: iasi Log ic Digital Delay Units SER IES : 10 Taps 14 pins DIP T T L Interfaced DDU-7F data w3^ / delay devicesVinc. Features: • ■ ■ ■ ■ Test Conditions: Auto-insertable. Com pletely interfaced for TTL No external com ponents required P.C. board space economy achieved