2B443A2 Search Results

Contextual Info: = F AST data t o d elayW device^ inc. Dynamic Memory Timer T T L Interfaced 14 pins DIP DMT-300 SERIES: Features: • All DRAM’s timing generated from a single MREQ signal ■ Accurate and stable timing ■ Rising-edge triggered ■ PC board economy ■ Saves components

3D7110

Abstract: 3D7110D SOIC-14 SOIC-16 12M05 Q0011
Contextual Info: 3D7110 data O J> / delay _ devices; me. MONOLITHIC 10-TAP FIXED DELAY LINE SERIES 3D7110 FEATURES PACKAGES All-silicon, low-power CMOS technology TTI_/CMOS compatible inputs and outputs Vapor phase, IR and wave solderable Auto-insertable (DIP pkg.) Low ground bounce noise

DDU-75F

Contextual Info: V oltage Controlled data Digital Delay Units delay W 24 ns - 52 ns devices; me* SERIES: DDU-75F Continuously Variable FEATURES: • C om p letely in te rfa ce d w ith T T L & DTL a p p licatio n . ■ No e xtern al c o m p o n e n ts required. ■ P.C. board sp ac e econom y achieved.

A 2057

Abstract: 2057B
Contextual Info: PICO Seconds Delay Lines SERIES: 2057 BNC Connectors data delayNO devices; m e. D escription: The ever increasing speed of today’s computers and system designs demands that propagation delays due to integrated circuit, printed circuit board lay-out and stray capacitance be compensated without reducing