256WORD Search Results

Contextual Info: High Reliability Serial EEPROMs Microwire BUS BR93□□□family BU9888FV-W No.11001EAT20 ●Description BU9888FV-W is a serial EEPROM of serial 3-line interface method. ●Features 1 256wordx16bits architecture 4k bit serial EEPROM 2) Operating voltage range 3.0～3.6V)

Contextual Info: * SYNERGY 256 X 4 ECL RAM SY10422-4 SEMICONDUCTOR Fe a t u r e s • ■ Address access time, tAA :3ns max. d e s c r ip t io n The Synergy SY10422 is a 1024-bit Random Access Memory RAM , designed with advanced Emitter Coupled Logic (ECL) circuitry. The SY10422 is organized as 256words-by-4 bits, meets the standard 10K family signal and

2NEX

Contextual Info: Datasheet Serial EEPROM Series Standard EEPROM Microwire BUS EEPROM 3-Wire BU9888FV-W ●General Description BU9888FV-W is a serial EEPROM of serial 3-line interface method. ●Package W(Typ.) x D(Typ.) x H(Max.) ●Features • 256wordx16bits architecture 4k bit serial EEPROM

cy7c122

Abstract: CY7C122-35DMB cy7c122-25PC 7C122 CY7C122-25SC CY7C122-35 CY7C122-25DC CY7C122-25
Contextual Info: CY7C122 CYPRESS SEMICONDUCTOR 256 x 4 Static R/W RAM Functional Description • 256 x 4 static RAM for control store in high-speed computers The CY7C122 is a high-performance CMOS static R A M organized as 256words by 4 bits. Easy memory expansion is pro­

Contextual Info: Datasheet Serial EEPROM Series Standard EEPROM Microwire BUS EEPROM 3-Wire BU9888FV-W General Description BU9888FV-W is a serial EEPROM of serial 3-line interface method. Features 256wordx16bits architecture 4k bit serial EEPROM Operating voltage range(3.0V to 3.6V)

Non-Volatile RAM

Abstract: S-22H DP-018
Contextual Info: Rev.1.1 S-22 Series PARALLEL NON-VOLATILE RAM The S-22 Series is a non-volatile CMOS RAM, composed of a CMOS static RAM and a non-volatile electrically erasable and programmable 2 memory E PROM to backup the SRAM. The organization is 256wordx4-bit (total 1K bits) for the S-22H12 and the S-22S12, and 64word×4-bit (total 256 bits) for the S-22H10 and the S-22S10.

Contextual Info: SMJ55166 262144 BY 16-BIT MULTIPORT VIDEO RAM SGMS057A - APRIL 1095 - REVISED JUNE 1995 * Organization: I • • • • • • • • • • • • • • • • • • • • HKC PACKAGE TOP VIEW - DRAM: 262144 Words x 16 Bits - SAM: 256Words x 16 Bits

Contextual Info: ADV MICRO MEMORY MfiE » • DS5752Ô GGBOflG11) Ô ■ AMD4 m i * A m Advanced Micro Devices 9 9 C 1 0 A 256 X 48 Content Addressable Memory DISTINCTIVE CHARACTERISTICS ■ 256word x 48-bit Content Addressable Memory (CAM) ■ - Optimized for Address Decoding in Local Area

ADV476

Contextual Info: ,. DEVICES ANALOG CMOS, 80 MHzMonolithic 256Word Power-Down ColorPaletteRAM-DACs LIllI ADV4111ADV415 I I FEATURES Persona' System/Z- and VGA- Compatible 80, 88, 50 and 35 MHz PipelinedOp8rltion ADV4781ADV.71 ADV8 Pin end Functional Compatible Power.oown Mode

P256

Abstract: P512 BIT12 spare assignment standard
Contextual Info: ECC Algorithm 256Word Flash Planning Group Memory Division Samsung Electronics Co., Ltd This is only example algorithm for SW ECC. In case of OneNAND which supports HW ECC, parity bit position can be changed. Product Product Planning Planning & & Application

EK-016-8905

Abstract: RP5B02N
Contextual Info: KOM EK-016-8905 CMOS 2k bit SRAM 256wordX8bit RP5B02N/W The RP5B02 is a 2k bit high speed CMOS static RAM organized 256 words by 8 bits and operates from a single 5 V supply. The RP5B02 has CMOS level inputs and outputs, and the outputs are 3-state output type.

Contextual Info: * SYNERGY SY10422-5 SY10422-6 256 x 4 ECL RAM SEMICONDUCTOR FEATURES • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ DESCRIPTION The Synergy SY10422 is a 1024-bit Random Access Memory RAM , designed with advanced Emitter Coupled Logic (ECL) circuitry. The SY10422 is organized as 256words-by-4-bits, meets the standard 10K family signal and

Contextual Info: Datasheet Serial EEPROM Series Standard EEPROM Microwire BUS EEPROM 3-Wire BU9888FV-W ●General Description BU9888FV-W is a serial EEPROM of serial 3-line interface method. ●Package W(Typ.) x D(Typ.) x H(Max.) ●Features • 256wordx16bits architecture 4k bit serial EEPROM

Contextual Info: Datasheet Serial EEPROM Series Standard EEPROM Microwire BUS EEPROM 3-Wire BU9888FV-W ●General Description BU9888FV-W is a serial EEPROM of serial 3-line interface method. ●Package W(Typ.) x D(Typ.) x H(Max.) ●Features • 256wordx16bits architecture 4k bit serial EEPROM

TMS320P17

Abstract: d6151 filter lark eng 1D2T ltw 8 pin TMS320P14 TMS320LC15
Contextual Info: TMS320C1X DIGITAL SIGNAL PROCESSORS J A N U A H Y 1 9 8 7 — R E V IS E D J U L Y 1991 • Performance Up to 8.77 MIPs Commercial and Military Versions Available • All TMS320C1x Devices are Object Code Compatible Operating Free-Air Temperature . . . 0°C to 70°C

RAV 14202

Abstract: TMS320C26
Contextual Info: SMJ320C26 DIGITAL SIGNAL PROCESSOR 68-P IN GB PIN G R ID A R R A Y C E R A M IC P A C K A G E t TO P V IE W 100-ns Instruction Cycle Time 1568 Words of Configurable On-Chip Data/Program RAM 1 2 3 4 5 6 7 6 9 10 11 256 Words of On-Chip Program ROM 128k Words of Data/Program Space

tc528126

Abstract: TC528126B
Contextual Info: PRELIMINARY 131, 0 7 2 W O R D S x 3 B IT S M U L T IP O R T D R A M D E S C R IP T IO N The TC52812GBJ/BZ is a CMOS multiport memory equipped with a 131,072-words by 8-bits dynamic random access memory RAM port and a 256-words by 8-bits static serial access memory (SAM) port. The

SPRU132B

Contextual Info: SMQ320C32 DIGITAL SIGNAL PROCESSOR SGUS027B – APRIL 1998 – REVISED MARCH 1999 D D D D D D D D D D D Military Operating Temperature Range – 55°C to 125°C; QML Processing High-Performance Floating-Point Digital Signal Processor DSP SMQ320C32-50 (5 V)

Contextual Info: TVP3026M Video Interface Palette SGLS101A January 1999 Printed on Recycled Paper IMPORTANT NOTICE Texas Instruments and its subsidiaries TI reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information

Contextual Info: TMS320LF2407, TMS320LF2406, TMS320LF2402 DSP CONTROLLERS SPRS094E – APRIL 1999 – REVISED AUGUST 2000 D High-Performance Static CMOS Technology D D D D D External Memory Interface LF2407 – 33-ns Instruction Cycle Time (30 MHz) – 30 MIPS Performance

Contextual Info: TE X AS INS TRUM E NTS - ADVANCE INFO R MAT ION Tiva TM4C1297NCZAD Microcontroller D ATA SH E E T D S -T M 4C 1297 NCZ A D- 1 5 8 0 2 . 2 7 2 9 S P M S 435A C o p yri g h t 2 0 07-2013 Te xa s In stru me n ts In co rporated Copyright Copyright © 2007-2013 Texas Instruments Incorporated. Tiva and TivaWare are trademarks of Texas Instruments Incorporated. ARM and Thumb are

diode p4e

Contextual Info: TLC34058 256 x 24 COLOR PALETTE SLAS050 – D3961, NOVEMBER 1991 • • • • • • • • LinEPIC 1-µm CMOS Process 125-MHz Pipelined Architecture Available Clock Rates . . . 80, 110, 125, 135 MHz Dual-Port Color RAM 256 Words x 24 Bits Bit Plane Read and Blink Masks

AT91SAM3U4

Abstract: at91sam3 1N1308 MAR 735 REGULATOR IC 7912 pin identify AT91SAM3U4E SAM3u1 AT91SAM3U 3961 G.E 0x20180
Contextual Info: Features • Core • • • • • • – ARM Cortex®-M3 revision 2.0 running at up to 96 MHz – Memory Protection Unit MPU – Thumb®-2 instruction set Memories – From 64 to 256 Kbytes embedded Flash, 128-bit wide access, memory accelerator,

f2407

Abstract: TMS320LC2402A TMS320LC2403A TMS320LC2404A TMS320LC2406A TMS320LF2402A TMS320LF2403A TMS320LF2406A TMS320LF2407A TMS320LF2407A CPU and Instruction Set
Contextual Info: TMS320LF2407A, TMS320LF2406A, TMS320LF2403A, TMS320LF2402A TMS320LC2406A, TMS320LC2404A, TMS320LC2403A, TMS320LC2402A DSP CONTROLLERS SPRS145L − JULY 2000 − REVISED SEPTEMBER 2007 D High-Performance Static CMOS Technology D External Memory Interface LF2407A