256KX1 DRAM Search Results

AEG DD 31 n 1200

Abstract: aeg dd 55 n 1200
Contextual Info: 256KX1BASED Dense-Pac Microsystems, Inc. C M O S SR A M FAM ILY -PREUMINARYDPS25616 DPS20482 DESCRIPTION: The Dense-Pac 256KX1 Based Family modules consists of very high speed 256KX1 based static RAMs which have been configured in the organizations described

HY53C256

Abstract: HY53C256LS
Contextual Info: HYUNDAI HY53C256 Series 256Kx1-bit CMOS DRAM DESCRIPTION The HY53C256 is fast dynamic RAM organized 262,144 x 1-bit. The HY53C256 utilizes Hyundai’s CMOS silicon gate process technology as well as advanced circuit techniques to provide wide operating margins to the users.

Contextual Info: ADV MICRO {MEMORY} Tb dË | 0557550 Am90CL256 005L.3ÖM is : Low-Pöwer 256Kx1 CMOS Enhanced Page Mode DRAM : OVERVIEW The 256K x 1 CMOS Low-Power fL ' DRAM versions share common functional descriptions, DC and AC characteristics with the corresponding standard CMOS non-'L1) versions. The only additions to these sections are:

30A008-00

Abstract: 256KX1 256KX16 256KX4 S2564 CFT-5 A618
Contextual Info: DENSE-PAC MICROSYSTEMS 0?E D | STSTMIS 0000135 O | 256KX1 BASED Dense-Pac Microsystems, Inc. C M O S SRAM FAM ILY -PRELIM INARYDPS25616 DPS20482 DESCRIPTION: T h e D e n se -P ac 2 56K X1 B ase d Fa m ily m od ules con sists o f v e ry high sp eed 256K X1 b a sed static R A M s w h ic h

synchronous sram

Abstract: 4Kx1 DRAM SRAM 6T SRAM DRAM 64kx16 edi8832
Contextual Info: ^EDI_ Electronic DMlgrw Inc. ^ by Part Number _ _ _ Part No. Tvoe Density Ora EDH816H64C EDI2018QC EDI20181C EDI20182C EDI20183C EDI20184C EDI20185C EDI2040C EDI2041C EDI2042C SRAM Module Synchronous SRAM, Latched I/O, 1CLK Synchronous SRAM, Registered I/O, 1CLK

128kx8

Abstract: EDI88130 32 PIN edi84256
Contextual Info: moi Selector Guide ELECTRONIC DESIGNS INC. Density Oraanization Part No. Speed ns Max Current (mAl Packaae Paae x32 Flash 4 Megabits 4 Megabits 128KX32 4 Megabits 4 Megabits 128KX32 128Kx32 EDI7C32128C-JM EDI7M32128C-GB 120-200 120-200 250 250 68 lead JLCC

64kx4 DRAM

Abstract: SRAM 6T PS-136 4Kx1 DRAM EDI8F8512LP MILITARY 4Kx1 SRAM 5962-89598 EDI8833LP 32kx8 bit low power cmos sram edi84256
Contextual Info: EDI8833C/LP/P ^E D I Electronic Designs Inc. High Speed 256K Monolithic SRAM 32Kx8 Static RAM CMOS, Monolithic u m m Features The EDI8833C/LP/P is a high speed, high perform­ ance, low power, 262,144bit C M O S Static R A M orga­ 32Kx8 bit C M O S Static

dram zip 256kx16

Abstract: I8833C
Contextual Info: Electronic Design* Inc. Table of Contents Page Letter from the Table o f Contents . 2

256Kx1 dRAM

Abstract: UPD424256 dram memory 256kx4
Contextual Info: TOYOCOM U S A INC 37F » _ ti i Q E!Q7a a o a o s m 3 . TOYOCOM Is Quality! •»*, % •Xa*" • . .yt.ivX: -"■ "■ ■ ■ ;. sv.% ' ■ " '' , , , , ' ' ^ i<j/ff *■ *■ ' ' /vw ■ ■ ■ ■ , *• ■'' ^ W.J^^38£*S y , ^ U :J

TMS4256FML

Abstract: tms4256 256Kx1 dRAM
Contextual Info: ADVANCE INFORMATION TM4256GP9, TM4256GV9 262.144 BY 9-BIT DYNAMIC RAM MODULES OCTOBER 1 9 8 5 - • 2 6 2 .1 4 4 X 9 Organization • Single 5-V Supply 10% Tolerance V SINGLE-IN-LINE PACKAG E f ITOP VIEW) 30-Pin Single-in-Line Package (SIP) —Pinned Module for Through-Hole

EDI81257CA

Abstract: A10q
Contextual Info: Part Number Guide Electronic Designs Inc. Modules Monolithics EDI 8 8 12& P 100 F B EDI 8 M 4 257 Ç 35 L 1 B P re fix -Product Group 8 = SRAM 9 = Special/Custom Substrate -M = Ceramic F = FR4 Epoxy Laminate Word W id th -1 = 1 bit wide

256Kx1 dram pinout

Contextual Info: SM536256 August 1994 Rev 2 SMART Modular Technologies SM536256 1MByte 256K x 36 CMOS DRAM Module General Description Features The SM536256 is a high performance, 1-megabyte dynamic RAM module organized as 256K words by 36 bits, in a 72-pin, leadless, single-in-line memory module

ic CV 203

Contextual Info: SIEM ENS 512K X 36-Bit Dynamic RAM Module HYM 365120S-80 Advanced Information • 524 288 words by 36-bit organization • Fast access and cycle time 80 ns access time 150 ns cycle time • Fast page mode capability with 55 ns cycle time • Single + 5 V ± 10 % supply

256Kx1 dram pinout

Abstract: HY514264 HY514264B
Contextual Info: •HYUNDAI H Y514264B 256K x16, E xten ded Data O ut m ode DESCRIPTION T his fam ily is a 4M bit d yn am ic RAM org an ized 26 2 ,1 4 4 x 16-bit con figu ration w ith C M O S D R A M s. T he c irc u it and pro ce ss d e sign allow this d e vice to a ch ie ve high p e rfo rm a n ce and low p o w e r d issip a tio n . O p tio n a l fe a tu re s are a cce ss tim e 5 0 , 60

1mx1 DRAM

Abstract: AA2035 UM82C380 256KB static RAM 6182s UM82152 UM82C384 AADS PA10 Unicorn Microelectronics
Contextual Info: UNICORN MICROE LE CTRON ICS E4E D • =1270700 QOQOTOH T ■ UM82C389 Austek Cache Interface I General Description The UM82C389 Cache Interface Chip is one of the UMC UM82C380 series High End AT HEAT chip set. As a DRAM controller, UM82C389 works in tandem with

Deico Electronics

Abstract: delco SIMM 30-pin 30-pin simm memory 30-pin simm memory dynamic Delco Electronics DD0256P8 256k x 8 dram 4 pin Single-in-Line Package
Contextual Info: DEICO EL EC T RO NI C S INC nE » 2757715 ÜDa OGlS 5 DEICO ELECTRONICS, 5NC. '. 2800 Bayview Dr. Fremont, CA 94537 Telephone 415 651-7800 Telex 176427 » FAX (415) 651-6109 Vdd • Vss ■ T 256k X 8 DRAM S in g le-In -lin e M em ory M odule rM k-rs-is

Contextual Info: WDÌ DRAM Test Enable Function E lectronic D « «tg n i Inc. EDI411024CXXQB Functional Description The T e s t E nable Function im plem entation on E lectronic D esigns' 1M x 1 dynam ic RAM allow s te st tim e reduction by use o f a parallel test algorithm . By asserting the TE pin, the

cmos dynamic ram 256kx1

Abstract: 256Kx1 dram pinout SQ721 KM4216C528
Contextual Info: DENSE-PAC /U-Dcnstos High Density Memory Device M IC R O SYSTEM S 8 Megabit CMOS VIDEO RAM DP0512X16MGY5-CM PRELIM IN ARY D ESC R IPTIO N : P IN -O U T D IA G RA M The D P0 5 1 2X16MCY5-CM is a 512Kx16 bit Dual Port Dynamic RAM module that utilize the new and

TMS4256FML

Abstract: TMS4256 TMS4256-12 TMS4256-20 AZ31
Contextual Info: ADVANCE INFORMATION TM4256GP8, TM4256GV8 262,144 BY 8-BIT DYNAMIC RAM MODULES OCTOBER 1 9 8 5 - V SINGLE-IN-LINE PA C K A G Er 2 6 2 ,1 4 4 X 8 Organization TOP VIEW Single 5 -V Supply {1 0 % Tolerance) 30-Pin Single-in-Line Package (SIP) — Pinned Module for Through-Hole

HM62V8512LFP

Abstract: HM53861J M51419 16M dram dram zip 256kx16 m514280 hn27c1024hg 4M DRAM EDO M5241605 HM534253BT
Contextual Info: Memories Dynamic RAMs DRAM Access time ns 60 80 {HM5116100AS/ATS J F.P. 4k refresh -4Mx4 - {HM5116400AS/ATS ] F.P. 4k refresh 1HM51W16400AS/ATS ] F.P. 4k refresh 1HM5117400AS/ATS ] F.P. 2k refresh -3.3V operation- 16M- 70 -16Mx1 -3.3V operation— 2Mx8 -3.3V operation-

27c eeprom

Abstract: AS27C256 92132 eeprom dip 36 uv 4lc eeprom 4Mx1 sram FPM DRAM MT42C4256 256Kx4 ZIP FLASH MEMORY 29F
Contextual Info: STAND ARD MEMOR Y PRODUCT SELECT OR GUIDE ANDARD EMORY ELECTOR CERAMIC CONFIGURATIONS COMMITTED TO PROVIDING HIGH-QUALITY, INNOVATIVE SOLUTIONS TO THE HIGH-RELIABILITY MARKETPLACE STANDARD MEMORY PRODUCTS CERAMIC CONFIGURATIONS SRAM 16MEG MCM Configurable as

MCM511000BJ60

Abstract: CM511000 256Kx1 dRAM MCM511000 MCM511000BZ80 mcm511000bj L1219
Contextual Info: MOTOROLA SEM ICONDUCTOR TECHNICAL DATA MCM511000B MCM51L1000B 1Mx1 CMOS Dynamic RAM Page Mode The M C M 511000B is a 0.8p CMOS high-speed, dynamic random access memory. It is organized as 1,048,576 one-bit words and fabricated with CMOS silicon-gate process

1mx1 DRAM DIP

Abstract: 1mx1 DRAM 1MX1
Contextual Info: D A LLA S s e m ic o n d u c t o r FEATURES • Provides 3-wire serial acoess to DRAM • Converts DRAM into nonvolatile memory using external backup supply • Addresses up to 16Mx1 of memory • Data can be read from or written to DRAM via single or multi-bit transfers

Contextual Info: DALLAS DS1262 Serial DRAM Nonvolatizer Chip s e m ic o n d u c to r PIN DESCRIPTION FEATURES • Provides 3-wire serial access to DRAM • Converts DRAM into nonvolatile memory using external backup supply • Addresses up to 16Mx1 of memory • Data can be read from or written to DRAM