200JX Search Results

569014-1

Abstract: 5684-14-1 3241-14-1 2174-14-1 20191
Contextual Info: ADVANCED INTERCONNECTIONS' Double - Turret Standoffs 5 Energy W ay, P.O. Box 1342, W est Warwick, R l 02893 • Tel. 401-823-5200 • F A X 401 -823-8723 • T W X 9102403454 EMCTroduct "DTS" Series Plating: -14: 400|±" Tin term inal, 200|T' Cadm ium Chrom ate base/eyelet

Contextual Info: Section 17. Electrical Specifications 17.1 A bsolute M axim um R atings Table 17-1 lists the absolute maximum ratings. Table 17-1. Absolute M axim um Ratings Item Symbol Rating Unit Supply voltage V cc -0 .3 to +7.0 V Program m ing voltage V -0 .3 t o +13.5

Contextual Info: T E N T A T I YE T O S H I B A TPC6101 TOSHIBA FIELD EFFECT TRANSISTOR SILICON P CHANNEL MOS TYPE U-MOSII TPC6101 INDUSTRIAL APPLICATIONS UNIT: nun NOTE BOOK PC PORTABLE EQUIPMENTS APPLICATIONS •Low Drain - Source ON Resistance : R DS(0N)= 48mQ(Typ.) • High Forward Transfer Admittance : |Y f s |=8.2S (Typ.)

diode E1110

Abstract: lN4002 LN4003 ANA 618 20010 TDB 0123 km b3170 E1110 Diode UB8560D MAA723 moc 2030
Contextual Info: elektronik-bauelem ente I WT VD AVL 1 /8 7 Bl. 2 E r l ä u t e r u n g e n z u m I n h a l t und zu d e n A n g a b e n d e r B a u e l e m e n t e - V e r g l e i c h s l i s t e D ie B a u e l e m e n t e - V e r g l e i c h s l i s t e e n t h ä l t a l l e in d e r B i l a n z v e r a n t w o r t u n g d e s V E B K o m b i n a t

GM71C4256A-80

Contextual Info: PRELIMINARY SPECIFICATION GM71C4256A 262,144 WORDS X 4 BIT CMOS DYNAMIC RAM Description Pin Configuration The GM71C4256A is the new generation dynam ic RAM organized 262,144 x 4 Bit. GM71C4256A has re­ 20 PLASTIC DIP alized higher density, higher perform ance and va­

Certavolt Codi Semiconductor

Abstract: 234L Potentiometer 10k lineal 15A1S DAC1136K DAC16QM DAC1138 Model 234L DAC-14QM DAC1156J
Contextual Info: ANALOG ► DEVICES High Resolution, 16and 18 Bit Digital to Analog Converters FEATURES DAC11I38 High Resolution 18 Bits 38juV, 1 Pait in 262,144 Integral Nonlinearity < %LSB Differential Nonlinearity O iL S B Settling to ’/ î LSB (0.0002%) in 10/is Programmable Output Ranges

Contextual Info: n = y S G S -TH O M S O N L4949 MULTIFUNCTION VERY LOW DROP VOLTAGE REGULATOR ADVANCE DATA . . • ■ ■ ■ ■ . ■ ■ OPERATING DC SUPPLY VOLTAGE RANGE 5V - 28V TRANSIENT SUPPLY VOLTAGE UP TO 40V EXTREMELY LOW QUIESCENT CURRENT IN STANDBY MODE HIGH PRECISION STANDBY OUTPUT VOLT­

LA 7687 A

Contextual Info: y UNITRODE Isolated Boost PFC Preregulator Controller FEATURES PFC With Isolation, VO < VIN Single Power Stage Zero Current Switched IGBT Programmable ZCS Time Corrects PF to >0.99 Fixed Frequency, Average Current Control Improved RMS Feedforward Soft Start

Contextual Info: April 1999 S E M I C O N D U C T O R TM • l2C compatible interface Because this device incorporates a hardware "Write Protect" feature, the upper half of the memory can be disabled against programming by connecting the WP pin to Vcc. This section of memory then effectively becomes a ROM Read-Only Memory

Contextual Info: 28C64A M icro ch ip 64K 8K x 8 CMOS Electrically Erasable PROM FEATURES DESCRIPTION • Fast Read Access Time— 150ns Maximum • CMOS Technology for Low Power Dissipation —30mA Active — 100|iA Standby • Fast Byte Write Time— 200|js or 1ms • Data Retention >10 years

Contextual Info: /TLin^AB _ LT1103/Lm05 TECHNOLOGY o fflin e S w itc h in g R e g u la to r FCmUIKS D€SCRIPTIOn • ±1% Line and Load Regulation with No Opto-Coupler ■ Switch Frequency up to 200kHz ■ Internal 2A Switch and Current Sense LT1103 ■ Internal 1A Totem Pole Driver (LT1105)

C103B

Abstract: CS92B C103A C103Y C103YY CS55B CS55BZ CS55D CS55DZ CS92BZ
Contextual Info: SCRS Continued I t (AMPS) 0.8 @ T c (°C) 60 60 60 60 60 ITSM (AMPS) 10 10 10 10 10 1 C A SE 1 T O -9 2 -1 8 R TO -92 VRRM (VOLTS) 30 C103Y 60 C 103YY 100 C103A 200 C103B C S55B C S55BZ C S92B C S92BZ C S55D C S55D Z C S92D G S92D Z 600 CS92M CS92M Z soo

C103YY

Abstract: C103A C103B CS55B C103Y CS55BZ CS55D CS55DZ CS92B CS92BZ
Contextual Info: SCRS Continued I t (AMPS) 0.8 @ T c (°C) 60 60 60 60 60 ITSM (AMPS) 10 10 10 10 10 1 C A SE 1 T O -9 2 -1 8 R TO -92 VRRM (VOLTS) 30 C103Y 60 C 103YY 100 C103A 200 C103B C S55B C S55BZ C S92B C S92BZ C S55D C S55D Z C S92D G S92D Z 600 CS92M CS92M Z soo

phillips 031 ko Capacitor

Abstract: laptop mother board voltage details LT1432 LT107C amplifier circuit diagram techno 5a schematic diagram of laptop inverter LT1171 buck npn fet EI type bobbin 8 pin ic used in laptop
Contextual Info: | Ar* *« _ u rre A ß TECHNOLO GY LT1432 5 v High E fficie n cy S te p -D o w n S w itch in g R e g u la to r C o n tro lle r F€fiTUR€S DCSCMPTIOn • ■ ■ ■ ■ ■ ■ ■ The LT1432 is a control chip designed to operate with the LT1170/LT1270 family of switching regulators to make a

CX-53

Abstract: KM48C2100A cx53 KMM53221 KM48C2100AJ
Contextual Info: DRAM MODULE 8 Mega Byte KMM53221OOAU /AUG Fast Page Mode 2Mx32 DRAM SIMM , 2K Refresh, 5 Using 2Mx8 B/W DRAM J GENERAL DESCRIPTION FEATURES The Samsung KMM5322100AU is a 2M bit x 32 Dynamic RAM high density memory module. The Samsung KMM5322100AU consists of four CMOS

nte5455

Abstract: nte5679 NTE5402 NTE5556 NTE5614 NTE5534 NTE5457 NTE5646 NTE5468 NTE5629
Contextual Info: N T E ELECTRONICS INC SEE D Bi b 4 3 1 2 S ci DGOs'bSfi 4TS INTE SfcLCQN CQNTROLLE&REeB FOR PHASE CONTROL APPLICATIONS DC or Pk Votts V DRM i (t(rmS) Maximum Forward Current Amps (A ll Conducting Angles) 0.8A 3A Sensitive Sensitive Gate Gate 4A Sensitive Gate

1706s

Contextual Info: 19-1198; Rev 0; 4/97 k \T A l i l X I V M 1 - t o 3-Cel l , H i g h - C u r r e n t , L o w - N o i s e , S t e p - U p DC-DC C o n v e r t e r s w i t h L i n e a r R e g u l a t o r Features The MAX1705/MAX1706 are high-efficiency, low-noise, s te p -u p DC-DC co n ve rte rs w ith an a u xilia ry linearregulator output. These devices are intended for use in

Contextual Info: Thyristor Selection Guide SELECT GUIDE 15 Metal/Plastic lT AMPS 0.2 @ TC (°C) 25 60 60 60 60 25 25 lTSM (AMPS) 7.5 10 10 10 10 10 10 0.8 * % CASE TO-92 SOT-23 SOT-89 TO-92 SOT-223 VDRM,VRRM (VOLTS) 30 2N5060 BRX44I 60 2N5061 BRX45t 2N5062 BRX46t 100 CMPS5061

nsm 4002

Abstract: nsm 4000
Contextual Info: ANALO G DEVICES □ CMOS 12-Bit Successive Approximation ADC AD7578 FEATURES 12-Bit S u ccessive Approximation ADC No M issed C odes Over Full Temperature Range Low Total U nadjusted Error ± 1LSB max High Im pedance Analog Input Autozero Cycle for Low O ffset Voltage

cc196

Abstract: DSTRT
Contextual Info: Objective specification Philips Semiconductors Microcontroller Products CMOS single-chip 8-bit microcontroller PIN CONFIGURATIONS DESCRIPTION FEATURES The 83C 504 and 87C 504 hereafter referred to as 8XC504 Single-Chip 8-Bit M icrocontroller is m anufactured in an

Contextual Info: MA J O R L E A C U E E L E C T R O N I C S .100"c.l. Terminal Strip Headers - Surface Mount -Horizontal M ates with: SSHS, SSHR, SH, BSSH, BSSQ, BSSHC, SSHSM, SSHQ, SSHQR Pins per row Sin gles Doubles Pin O ption s Post H eight 5,84 .230 (8,38) ,330 (10,92) .430

Contextual Info: M A J O R L E A G U E E L E C T R O N I C S .100"c.l. Board Stacker Socket Strips - Custom OBSSHC-1I i i-j~~i-i i i i-m-fi-m-i 11 i-i i i-rm I Mates w ith: TSHS, TSHR, TSHC, BSTS, BSTC, TSCHRE, LTSHR, LTSHRE, BSTCM, LTSHCRE, TSHRE, TSHSM, TSHCR H ig h J e m p ^ J

2U97

Contextual Info: TMS626402 2097152-WORD BY 4-BIT BY 2-BANK SYNCHRONOUS DYNAMIC RANDOM-ACCESS MEMORY SMOS642A- FEBRUARY 1994 - REVISED JUNE 1995 DGEPACKAGE TOP VIEW • Organization . . . 2M x 4 x 2 Banks • 3.3-V Power Supply (±10% Tolerance) • TWo Banks for On-Chip Interleaving

MSM514260

Abstract: SM5142
Contextual Info: • O K I S em iconductor MSM5 14 2 6 0 B/BSL 262,144-Word x 16-Bit DYNAMIC RAM : FA ST P A G E M O D E T Y P E DESCRIPTION The MSM514260B/BSL is a 262,144-word x 16-bit dynamic RAM fabricated in OKI's CMOS silicon gate technology. The MSM514260B /BSL achieves high integration, high-speed operation, and lowpower consumption due to quadruple polysilicon single metal CMOS. ITie MSM514260B/BSL is