200JXS Search Results

GM71C4256A-80

Contextual Info: PRELIMINARY SPECIFICATION GM71C4256A 262,144 WORDS X 4 BIT CMOS DYNAMIC RAM Description Pin Configuration The GM71C4256A is the new generation dynam ic RAM organized 262,144 x 4 Bit. GM71C4256A has re­ 20 PLASTIC DIP alized higher density, higher perform ance and va­

Certavolt Codi Semiconductor

Abstract: 234L Potentiometer 10k lineal 15A1S DAC1136K DAC16QM DAC1138 Model 234L DAC-14QM DAC1156J
Contextual Info: ANALOG ► DEVICES High Resolution, 16and 18 Bit Digital to Analog Converters FEATURES DAC11I38 High Resolution 18 Bits 38juV, 1 Pait in 262,144 Integral Nonlinearity < %LSB Differential Nonlinearity O iL S B Settling to ’/ î LSB (0.0002%) in 10/is Programmable Output Ranges

Contextual Info: 28C64A M icro ch ip 64K 8K x 8 CMOS Electrically Erasable PROM FEATURES DESCRIPTION • Fast Read Access Time— 150ns Maximum • CMOS Technology for Low Power Dissipation —30mA Active — 100|iA Standby • Fast Byte Write Time— 200|js or 1ms • Data Retention >10 years

CX-53

Abstract: KM48C2100A cx53 KMM53221 KM48C2100AJ
Contextual Info: DRAM MODULE 8 Mega Byte KMM53221OOAU /AUG Fast Page Mode 2Mx32 DRAM SIMM , 2K Refresh, 5 Using 2Mx8 B/W DRAM J GENERAL DESCRIPTION FEATURES The Samsung KMM5322100AU is a 2M bit x 32 Dynamic RAM high density memory module. The Samsung KMM5322100AU consists of four CMOS

1706s

Contextual Info: 19-1198; Rev 0; 4/97 k \T A l i l X I V M 1 - t o 3-Cel l , H i g h - C u r r e n t , L o w - N o i s e , S t e p - U p DC-DC C o n v e r t e r s w i t h L i n e a r R e g u l a t o r Features The MAX1705/MAX1706 are high-efficiency, low-noise, s te p -u p DC-DC co n ve rte rs w ith an a u xilia ry linearregulator output. These devices are intended for use in

2U97

Contextual Info: TMS626402 2097152-WORD BY 4-BIT BY 2-BANK SYNCHRONOUS DYNAMIC RANDOM-ACCESS MEMORY SMOS642A- FEBRUARY 1994 - REVISED JUNE 1995 DGEPACKAGE TOP VIEW • Organization . . . 2M x 4 x 2 Banks • 3.3-V Power Supply (±10% Tolerance) • TWo Banks for On-Chip Interleaving

MSM514260

Abstract: SM5142
Contextual Info: • O K I S em iconductor MSM5 14 2 6 0 B/BSL 262,144-Word x 16-Bit DYNAMIC RAM : FA ST P A G E M O D E T Y P E DESCRIPTION The MSM514260B/BSL is a 262,144-word x 16-bit dynamic RAM fabricated in OKI's CMOS silicon gate technology. The MSM514260B /BSL achieves high integration, high-speed operation, and lowpower consumption due to quadruple polysilicon single metal CMOS. ITie MSM514260B/BSL is

IR 4110 MOSFET FP

Abstract: 48 volt 25 amp smps circuit diagram X741 741u 14v ,5v smps schematic 12 VOLT 10 AMP smps controller
Contextual Info: , 19-0097; Rev 1; 8/93 >i/i >j x i >i/i Pin-Program m ed, Low -V oltage Current-M ode SMPS C o ntro ller The MAX741 is a highly versatile switch-mode powersupply SMPS controller IC that operates from an input supply as low as 2.7V, and typically starts up from 1.8V.

Contextual Info: OM9369 FULL-FEATURED POWER MODULE FOR HIGH-VOLTAGE DIRECT DRIVE OF 3-PHASE BRUSHLESS DC MOTORS 25 A m p . P ush-P ull 3 -P h a s e B ru s h le s s DC M oto r C o n tro lle r/D riv e r M o d u le in a P o w e r Flatpack FEATURES • • • • • • •

TMS626812

Contextual Info: TMS626812B 1 048 576 BY 8-BIT BY 2-BANK SYNCHRONOUS DYNAMIC RANDOM-ACCESS MEMORIES SMOS693A- OCTOBER 1997 - REVISED APRIL 199B Organization 1048576 by 8 Bits by 2 Banks 3.3-V Power Supply ±10% Tolerance Two Banks for On-Chip Interleaving (Gapless Accesses)

Contextual Info: 128 Megabit CMOS DRAM D E N S E -P A C m i e R e s y s t e m s : DPD32MX4PY5 PRELIM INARY DESCRIPTION: The DPD32MX4PY5 is the 32 M e g x4 Dynamic RAM module that utilizes the new and innovative space saving TSOP stacking technology. The module is constructed of eight 16

S2L00

Contextual Info: 256K x 4 molale V id e o R A M M V M 4 2 5 9 -1 0 /1 2 Issue 2.0 : February 1992 P R E L IM IN A R Y S e m ic o n d u c to r Inc. Pin Definition 262,144 X 4 CMOS Fully Featured Video RAM SC SI01 SI02 DT/OE W1/I01 W 2/I02 WB/WE NC RAS A8 A6 A5 A4 Vcc Features

Contextual Info: 19-1254; Rev 0; 7/97 3 . 3 V / 5 V or A d j u s t a b l e , S t e p - U p / D o w n DC-DC C o n v e r t e r s The MAX710/MAX711 can be configured for minimum noise or optimum efficiency. Shutdown control turns off the part com pletely, disconnecting the input from the

Contextual Info: 19-1195; Rev0; 4/97 > k l> JX I> l/l SOT23, M i c r o p o w e r , Si ng l e- Su ppl y, R a i l - t o - Ra i l I/O Op A m p s Description Features ♦ 5-Pin SOT23 Package MAX4162 The combination of excellent bandwidth/power perfor­ mance, single-supply operation, and miniature footprint

Contextual Info: May.7 ‘93 MITSUBISHI LSIs M5M4V16407ATP-10,-12,-15 Preliminary 16M 4194304 - WORD BY 4 - BIT Synchronous DRAM PRELIMINARY This document is a preliminary specification and some of the contents are sub­ ject to change without notice. DESCRIPTION The M5M4V16407A incorporates 8 bit data registers and amultiplexer into a 4194304-word by 4-bit

KJ -V20

Abstract: ADC0801 ADC1001 ADC1001CCJ-1 ADC1021 ADC1021CCJ ADC1021CCJ-1 AIX1001CCJ J20A LM336
Contextual Info: ADC1001/ADC1021 National Semiconductor ADC 1001/ADC 1021 10-Bit jaP Compatible A/D Converters General Description The ADC1001 and ADC1021 are CMOS, 10-bit successive approximation A /D converters. The 20-pin ADC1001 is pin compatible with the ADC0801 8-bit A /D family. The 10-bit

J1850-VPW

Abstract: dd3848 atd4 MARKING
Contextual Info: Order this document by MC68HC708AS48/D Rev. 4.0 MC68HC708AS48 Advance Information This docum ent contains information on a new product. Specifications and information herein are subject to change without notice. M MOTOROLA A d v a n c e Inform ation Motorola reserves the right to make changes without further notice to

71c464

Abstract: GoldStar gm71c464 GM71C464-80 GM71C464-10 GM71C464-12 GM71C464
Contextual Info: GOLDSTAR TECHNOLOGY I N C / 4Q2A757 G0G31Û7 T « G S T 34E » PRODUCT SPECIFICATION T ~ ¥ 6 'Z 3 ~ / 7 G M 71C 464 65.536WORDS X 4 BIT CMOS DYNAMIC RAM Description The GM71C464 is a high speed dynamic RAM or­ ganized 65,536 x 4 Bit. The GM71C464 utilizes