200MBS Search Results

Fairchild part numbering

Abstract: GTLP16612 GTLP16616 GTLP16617 GTLP16T1655 GTLP17T616 GTLP18T612 GTLP6C816 GTLP6C816A GTLP6C817
Contextual Info: GTLP Solutions GTLP Gunning Transceiver Logic Plus Product Line Card Overview The GTLP Advantage: • Reduced Output Swing • Tight Receiver Threshold • Signal Edge-rate Control • Low Voltage • Low Power • High Speed • Throughput Rates of 200Mbs - 30Gbs

ARM7 SPECIFICATIONS

Abstract: common features of ARM9 ARM7 pin diagram ARM7DMI atmel utopia 11 5643as algorith for watchdog timer ARM7 pin configuration ARM9 AES ARM946 PIN
Contextual Info: Features • Routing Functions Running on ARM946ES Interworking Processor with 8K Data Cache and 8K Instruction Cache Memory • Two Ethernet 10/100T-Base MAC Units with MII Interface to External PHY • Maximum Sustainable Wired Bandwidth: 200Mbs Half Duplex or 400 Mbs (Full

Sony IMX 183

Abstract: Sony sony cmos sensor imx 178 Sony imx 214 Sony ImX 252 sony cmos sensor imx 226 Sony IMX 219 CMOS Sony "IMX 219" CMOS sony IMX 322 cmos sony cmos sensor imx 185
Contextual Info: i.MX 6Solo/6DualLite Applications Processor Reference Manual Document Number: IMX6SDLRM Rev. 1, 04/2013 i.MX 6Solo/6DualLite Applications Processor Reference Manual, Rev. 1, 04/2013 2 Freescale Semiconductor, Inc. Contents Section number Title Page Chapter 1

W3E64M72S-XBX

Contextual Info: White Electronic Designs W3E64M72S-XBX ADVANCED* 64Mx72 DDR SDRAM BENEFITS FEATURES Data rate = 200, 250, 266 and 333Mbs 66% Space Savings vs. TSOP Package: Reduced part count • 219 Plastic Ball Grid Array PBGA , 25 x 32mm 55% I/O reduction vs TSOP 2.5V ±0.2V core power supply

Contextual Info: White Electronic Designs W3E32M64S-XBX 32Mx64 DDR SDRAM BENEFITS FEATURES DDR SDRAM rate = 200, 250, 266Mb/s 41% SPACE SAVINGS vs. TSOP Package: Reduced part count • Reduced trace lengths for lower parasitic capacitance 219 Plastic Ball Grid Array PBGA ,

Contextual Info: White Electronic Designs W3E64M72S-XSBX 64Mx72 DDR SDRAM BENEFITS FEATURES „ Data rate = 200, 250, 266 and 333Mbs* „ 66% Space Savings vs. TSOP „ Package: „ Reduced part count • 219 Plastic Ball Grid Array PBGA , 25 x 32mm „ 55% I/O reduction vs TSOP

Contextual Info: White Electronic Designs W3E64M72S-XSBX 64Mx72 DDR SDRAM FEATURES BENEFITS „ Data rate = 200, 250, 266 and 333Mbs* „ 66% Space Savings vs. TSOP „ Package: „ Reduced part count • 219 Plastic Ball Grid Array PBGA , 25 x 32mm „ 55% I/O reduction vs TSOP

VCCQ15

Contextual Info: White Electronic Designs W3E64M16S-XSBX PRELIMINARY* 64Mx16 DDR SDRAM FEATURES BENEFITS „ DDR SDRAM rate = 200, 250, 266, 333* „ „ Package: „ • 60 Plastic Ball Grid Array PBGA , 10 x 12.5mm „ 1Gb upgrade to 512Mb 60 FBGA SDRAM „ 2.5V ±0.2V core power supply

W3E32M64S-XBX

Contextual Info: White Electronic Designs W3E32M64S-XBX 32Mx64 DDR SDRAM BENEFITS FEATURES „ DDR SDRAM rate = 200, 250, 266, 333Mb/s „ 41% SPACE SAVINGS vs. TSOP „ Package: „ Reduced part count • „ Reduced trace lengths for lower parasitic capacitance 219 Plastic Ball Grid Array PBGA ,

W3E32M72S-XBX

Contextual Info: White Electronic Designs W3E32M72S-XBX 32Mx72 DDR SDRAM FEATURES „ Data rate = 200, 250, 266, 333Mbs „ Package: BENEFITS • 219 Plastic Ball Grid Array PBGA , 32 x 25mm „ 2.5V ±0.2V core power supply „ 2.5V I/O (SSTL_2 compatible) „ Differential clock inputs (CK and CK#)

Contextual Info: INTEGRATED CIRCUITS NOTICE: SEE ATTACHED ERRATA WHICH FOLLOWS THIS DOCUMENT FOR INFORMATION REGARDING CHANGED SPECIFICATIONS PDI1394L21 1394 full duplex AV link layer controller Preliminary specification Supersedes data of 1998 Dec 16 Philips Semiconductors

transistor 2Fn

Abstract: Phychip IEC61883 LQFP144 PDI11394L40 PDI1394L40 PDI1394L40BE EIR25 PDI1394L40 1394
Contextual Info: INTEGRATED CIRCUITS SEE THE LAST 2 PAGES OF THIS DATASHEET FOR A LIST OF ERRATA RELATED TO THIS PART. PDI1394L40 1394 enhanced AV link layer controller Preliminary specification Supersedes data of 2000 May 15 Philips Semiconductors 2000 Dec 15 Philips Semiconductors

16M x 16 DDR TSOP-66

Contextual Info: White Electronic Designs W3E32M64SA-XBX 32Mx64 DDR SDRAM BENEFITS FEATURES „ DDR SDRAM rate = 200, 250, 266, 333Mb/s „ 41% SPACE SAVINGS vs. TSOP „ Package: „ Reduced part count • „ Reduced trace lengths for lower parasitic capacitance 219 Plastic Ball Grid Array PBGA ,

PDI1394L40BE

Abstract: Phychip IEC61883 LQFP144 PDI11394L40 PDI1394L40
Contextual Info: 34 .807IRELESS IMPORTANT NOTICE Dear customer, As from August 2nd 2008, the wireless operations of NXP have moved to a new company, ST-NXP Wireless. As a result, the following changes are applicable to the attached document. ● Company name - Philips Semiconductors is replaced with ST-NXP Wireless.

Contextual Info: W3E32M72S-XB3X 32Mx72 DDR SDRAM FEATURES GENERAL DESCRIPTION  Data rate = 200, 250, 266, 333Mbs* The 256MByte 2Gb DDR SDRAM is a high-speed CMOS, dy nam ic ran dom-access, memory using 5 chips containing 536,870,912 bits. Each chip is internally configured as a quadbank DRAM.

Contextual Info: W3E64M16S-XSBX 64Mx16 DDR SDRAM FEATURES GENERAL DESCRIPTION  DDR SDRAM rate = 200, 250, 266, 333* The 128MByte 1Gb DDR SDRAM is a high-speed CMOS, dy nam ic ran dom-access, memory using 2 chips containing 536,870,912 bits. Each chip is internally configured as a quadbank DRAM.

Contextual Info: W3E64M72S-XBX 64Mx72 DDR SDRAM GENERAL DESCRIPTION FEATURES The 512MByte 4Gb DDR SDRAM is a high-speed CMOS, dynamic random-access, memory using 9 chips containing 536,870,912 bits. Each chip is internally configured as a quad-bank DRAM.  Data rate = 200, 250, 266 and 333Mbs*

Contextual Info: W3E32M72S-XSBX 32Mx72 DDR SDRAM FEATURES GENERAL DESCRIPTION  Data rate = 200, 250, 266, 333Mbs* The 256MByte 2Gb DDR SDRAM is a high-speed CMOS, dy nam ic ran dom-access, memory using 5 chips containing 536,870,912 bits. Each chip is internally configured as a quadbank DRAM.

Contextual Info: White Electronic Designs W3E64M72S-XSBX 64Mx72 DDR SDRAM BENEFITS FEATURES „ Data rate = 200, 250, 266 and 333Mbs* „ 66% Space Savings vs. TSOP „ Package: „ Reduced part count • 219 Plastic Ball Grid Array PBGA , 25 x 32mm „ 55% I/O reduction vs TSOP

Contextual Info: IBM21S650PFA 1394 Serial Bus Link Layer PCI Controller Features • • • • • Fully IEEE 1394-1995 compatible General purpose IEEE 1394 Host Controller Asynchronous and isochronous capability Data rates: S100, S200, or S400Mb/s Standard Link-PHY protocol and an Isolation

EN61326-1

Abstract: EN-61326-1 100Mbs
Contextual Info: Since environmentally controlled telecom closets aren’t common on the shop floor, RJ-Lnxx switches are built to thrive in adverse conditions. Enclosures are eliminated, and network design is simplified, while your business enjoys the highest level of data integrity

Contextual Info: White Electronic Designs W3E64M16S-XNBX 64Mx16 DDR SDRAM FEATURES „ DDR SDRAM rate = 200, 250, 266, 333* „ Package: BENEFITS „ • 60 Plastic Ball Grid Array PBGA , 10mm x 12.5mm x 1.5mm „ 1Gb upgrade to 512Mb 60 FBGA SDRAM „ 2.5V ±0.2V core power supply

Sn63pB37 tds

Abstract: W3E32M64S-XSBX TSOP66
Contextual Info: White Electronic Designs W3E32M64S-XSBX 32Mx64 DDR SDRAM FEATURES „ DDR SDRAM rate = 200, 250, 266, 333* „ Package: BENEFITS „ • 208 Plastic Ball Grid Array PBGA , 13 x 22mm „ 2.5V ±0.2V core power supply „ 2.5V I/O (SSTL_2 compatible) „ Differential clock inputs (CK and CK#)

PDI1394L40BE

Abstract: PDI1394L40 1394
Contextual Info: INTEGRATED CIRCUITS PDI1394L40 1394 enhanced AV link layer controller Preliminary specification Philips Semiconductors 2000 May 15 Philips Semiconductors Preliminary specification 1394 enhanced AV link layer controller PDI1394L40 1.0 FEATURES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .