1KX4 Search Results

C1507

Abstract: C1504 C1502 c1509 C150 CY7C150 R1329
Contextual Info: CY7C150 1Kx4 Static RAM Features Separate I/O paths eliminates the need to multiplex data in and data out, providing for simpler board layout and faster system performance. Outputs are three-stated during write, reset, deselect, or when output enable OE is held HIGH, allowing for

IC 4804

Contextual Info: FEATURES • Single +5V Power Supply ■ 1Kx4 Organization ■ Replaces 41024x1 Static RAMs ■ Completely Static—No Clocks or Refresh ■ 18 Pin Package ■ Access/Cycle Times As Low As 400 nsec max ■ 250 mw Typical Operating Power ■ Common I/O Bus

2kx8 EPROM

Contextual Info: 1Kx4 CMOS Static RAM PIN CONFIGURATION UM6116 1 18 □ vcc C 2 17 □ A7 *A 4 C ’3 16 □ A8 A3 C 4 A6 L ab Ao C Ai C A2 C c l E : 5 - • Single 5V Supply and High Density 24 Pin Package ■ High speed: Fast Access Time 55/70/90 ns Max. ■ Low Power Standby and

C1507

Abstract: C150 CY7C150 R1329 C1509 C1502
Contextual Info: 1CY 7C15 0 CY7C150 1Kx4 Static RAM Features Separate I/O paths eliminates the need to multiplex data in and data out, providing for simpler board layout and faster system performance. Outputs are three-stated during write, reset, deselect, or when output enable OE is held HIGH, allowing

4804B

Abstract: 4804 4804BCC semi 4804 4804a c 4804a TCO 706 1N3064 EMM Semi
Contextual Info: GENERAL DESCRIPTION FEATURES • Single +5V Power Supply ■ 1Kx4 Organization ■ Replaces 41024x1 Static RAMs ■ Completely Static—No Clocks or Refresh ■ 18 Pin Package ■ Access/Cycle Times As Low As 400 nsec max ■ 250 mw Typical Operating Power

C148

Abstract: CY7C148 CY7C149 R1481 CY7C149-25PC
Contextual Info: 49 CY7C148 CY7C149 1Kx4 Static RAM Features • • • • sion is provided by an active LOW chip select CS input and three-state outputs. The CY7C148 remains in a low-power mode as long as the device remains unselected; i.e., (CS) is HIGH, thus reducing the average power requirements of the

1K x4 static ram

Abstract: C150 CY7C150 R1329 C1507 C1502
Contextual Info: 50 CY7C150 1Kx4 Static RAM Features Separate I/O paths eliminates the need to multiplex data in and data out, providing for simpler board layout and faster system performance. Outputs are three-stated during write, reset, deselect, or when output enable OE is held HIGH, allowing

K4505

Abstract: 1601l 4Kx4 SRAM MK48T87B Z30A SRAM 2kx8 sram IMS1630 256KX1 MK41S80
Contextual Info: ALPHANUMERICAL INDEX unless otherwise specified all Static RAMs listed are produced in CMOS technology Part Nuraöer Organization 4Kx1 IMS1203 ( 4Kx1 IMS1203M , 1Kx4 IMS1223 1Kx4 IMS1223M ' 16Kx1 IMS1400M 16Kx1 IMS1403 ' IMS1403M/LM f 16Kx1 IM S1420M A 4Kx4

Contextual Info: intgl ,f, M3625A 4K 1Kx4 PROM : > ' - M • ± 1 0 % Power Supply Tolerance ■ Three-State Outputs ■ Fast Access Time: 60 ns Maximum ■ Polycrystalline Silicon Fuse for Higher Reliability ■ Lower Power Dissipation: 0.14mW/Bit Typically ■ Hermetic 18-Pin DIP

Contextual Info: CY7C148 1Kx4 Static RAM Features Functional Description • Automatic power-down when deselected ■ CMOS for optimum speed/power ■ 35-ns access time ■ Low active power ❐ 440 mW The CY7C148 is a high-performance CMOS static RAMs organized as 1024 by 4 bits. Easy memory expansion is provided

6116 RAM

Abstract: 7217 up down counter ram 6116 256KB static RAM PY 88 74FST3390 7M1002 c 3198 c 3198 transistor dual-port RAM
Contextual Info: Integrated Device Technology, Inc. As of 10/10/95 Page 1 Alpha-Numeric List of Products Doc ID Product Product Description Speeds Pkgs Temp Volt Avail 2760 10474 1KX4 CORNER POWER Bi SRAM, ECL-10K I/O 4ns C 5V Now 2759 10480 16KX1 Bi SRAM, ECL-10K I/O 4ns

c1484

Abstract: 7c148-35
Contextual Info: CY7C148 CY7C149 1Kx4 Static RAM Features Functional Description • Automatic power-down when deselected 7C148 The CY7C148 and CY7C149 are high-performance CMOS static RAMs organized as 1024 by 4 bits. Easy memory expansion is provided by an active LOW chip select (CS) input and three-state

M3625A

Contextual Info: intei i ä:; : M3625A 4K 1Kx4 PROM à i • ± 1 0 % Power Supply Tolerance Three-State Outputs ■ Fast Access Time: 60 ns Maximum Polycrystalline Silicon Fuse for Higher Reliability ■ Lower Power Dissipation: 0.14mW/Bit Typically Hermetic 18-Pin DIP

M3625A

Contextual Info: intei M3625A 4K 1Kx4 PROM • ± 10% Power Supply Tolerance ■ Three-State Outputs ■ Fast Access Time: 60 ns Maximum ■ Polycrystalline Silicon Fuse for Higher Reliability ■ Lower Power Dissipation: 0.14 mW/Bit Typically ■ Hermetic 18-Pin DIP ■ Simple Memory Expansion Two Chip

WECO* 1502

Contextual Info: p yXpX : v « *1 CY7C150 - 1Kx4 Static RAM Features • Memory reset function • 1024 x 4 static RAM for control store in high-speed com­ puters • CMOS for optimum speed/power • High speed — 10 ns commercial — 12 ns (military) • Low power — 495 mW (commercial)

C148

Abstract: CY7C148 CY7C149 R1481 18-LEAD
Contextual Info: CY7C148 CY7C149 1Kx4 Static RAM Features • • • • sion is provided by an active LOW chip select CS input and three-state outputs. The CY7C148 remains in a low-power mode as long as the device remains unselected; i.e., (CS) is HIGH, thus reducing the average power requirements of the

IMS1223A-25M

Abstract: IMS1223M IMS1223S-25M
Contextual Info: I IMS1223M CMOS High Performance 1K x 4 Static RAM MIL-STD-883C DESCRIPTION FEATURES The INMOS IMS1223M is a high speed CMOS 1Kx4 static RAM processed in full compliance to MIL-STD883C. The IMS1223M provides performance enhance­ ments with the additional CMOS benefits of lower power

C148 10A

Abstract: C148 CY7C148 CY7C149 R1481
Contextual Info: 1CY 7C14 9 CY7C148 CY7C149 1Kx4 Static RAM Features • • • • sion is provided by an active LOW chip select CS input and three-state outputs. The CY7C148 remains in a low-power mode as long as the device remains unselected; i.e., (CS) is HIGH, thus reducing the average power requirements of the

C1507

Abstract: 1K x4 static ram
Contextual Info: 50 CY7C150 1Kx4 Static RAM Features Separate I/O paths eliminates the need to multiplex data in and data out, providing for simpler board layout and faster system performance. Outputs are three-stated during write, reset, deselect, or when output enable OE is held HIGH, allowing

74S471

Abstract: mmi 6331 74S287 MMI 6330 74s188 programming AMD 27S21 MMI 6309 6306 MMI 74S188 74S288 PROGRAMMING
Contextual Info: V1.6 Jan 13,1999 Fujitsu -7051 7052 7053 7057 7111 32x8 7112 32x8 7113 256x4 7114 256x4 7115 512x4 7116 512x4 7117 256x8 7118 256x8 7121 1kx4 7122 1kx4 7123 512x8 7124 512x8 7126 7127 7128 2kx4 7131 7132 1kx8 7134 4kx4 7137 2kx8 7138 2kx8 7142 4kx8 7144 8kx8

Contextual Info: _ UNITED M IC R O E L E C T R O N I C S TE 9 3 2 5 8 1 2 U N IT E D . M IC R O E L E C T R O N IC S D Ë J 1325015 0000523 S 92D 0 05 23 T-46-23-12 1Kx4 CMOS Static RAM PIN C O N F IG U R A T IO N T T L Compatible • Three State Outputs ■ Data Retention Supply Voltage:

ST L487

Contextual Info: C Y 7 C 1 4 8 C Y 7 C 1 4 9 P YP: V « *1 i. X - 1Kx4 Static RAM sion is provided by an active LO W chip select CS input and th re e -sta te outputs. T h e C Y 7 C 1 48 rem ains in a lo w -po w e r m ode as long as th e device rem ains un selected; i.e., (CS) is

C1509

Abstract: C1502 C1507 1K x4 static ram C150 CY7C150 R1329 CY7C150-12DMB
Contextual Info: 50 CY7C150 1Kx4 Static RAM Features Separate I/O paths eliminates the need to multiplex data in and data out, providing for simpler board layout and faster system performance. Outputs are three-stated during write, reset, deselect, or when output enable OE is held HIGH, allowing

C1482

Abstract: C-1481 C148 c-1486 CY7C148 CY7C149 R1481 c1489
Contextual Info: 49 CY7C148 CY7C149 1Kx4 Static RAM Features • • • • sion is provided by an active LOW chip select CS input and three-state outputs. The CY7C148 remains in a low-power mode as long as the device remains unselected; i.e., (CS) is HIGH, thus reducing the average power requirements of the