128K X 8 SRAM Search Results

Contextual Info: D P E 4 1 2 8 8 128K X 8 CMOS EEPROM MODULE DESCRIPTION: The DPE41288 is a high-performance Electrically Erasable and Programmable Read Only Memory EEPROM module organized 128K X 8. The DPE41288 is pin compatable with the JEDEC Standard for 128K X 8 SRAM Monolithic devices.

LP621024DM-70LLF

Abstract: LP621024DV-70LLF LP621024D-70LLF LP621024D-55LLF LP621024 LP621024DM70LLF LP621024D LP621024D-55LL LP621024D-70LL LP621024DM-55LL
Contextual Info: LP621024D Series 128K X 8 BIT CMOS SRAM Document Title 128K X 8 BIT CMOS SRAM Revision History Rev. No. 1.1 History Issue Date Remark Add Pb-Free package type August 19, 2004 Final August, 2004, Version 1.1 AMIC Technology, Corp. LP621024D Series 128K X 8 BIT CMOS SRAM

LP621024D-70LLTF

Abstract: LP621024D-55LLT LP621024D-70LLT LP621024DM-55LLT LP621024DM-T LP621024D-T
Contextual Info: LP621024D-T Series 128K X 8 BIT CMOS SRAM Document Title 128K X 8 BIT CMOS SRAM Revision History Rev. No. 1.1 History Issue Date Remark Add Pb-Free package type August 19, 2004 Final August, 2004, Version 1.1 AMIC Technology, Corp. LP621024D-T Series 128K X 8 BIT CMOS SRAM

Contextual Info: □PM DPE41288 Dense-Pac Microsystems. Inc. 128K X 8 CMOS EEPROM MODULE O DESCRIPTION: The DPE41288 is a high-performance Electrically Erasable and Programmable Read O nly Memory EEPROM module organized 128K X 8. The DPE41288 is pin compatable with the JEDEC Standard for 128K X 8 SRAM Monolithic devices.

DRAM 256 X 1, 18 PDIP

Abstract: 64K X 4 SRAM mmui
Contextual Info: A Contents Fast SRAM Low Voltage Fast SRAM Short Form 1995 AS7C164 8K x 8 3 AS7C256 32K x 8 4 AS7C259 32K x 9 5 AS7C512 64K x 8 6 AS7C1024 128K x 8 300/400 mil 7 AS7C1028 256K x 4 400 mil 8 AS7C3256 32K x 8 3.3V 9 AS7C3512 64K x 8 3.3V 10 AS7C31024 128K x 8

CY14B101LA-SZ45XI

Abstract: CY14B101LA-SZ25XI
Contextual Info: CY14B101LA CY14B101NA 1 Mbit 128K x 8/64K x 16 nvSRAM 1 Mbit (128K x 8/64K x 16) nvSRAM Features Functional Description • 20 ns, 25 ns, and 45 ns Access Times ■ Internally Organized as 128K x 8 (CY14B101LA) or 64K x 16 (CY14B101NA) ■ Hands off Automatic STORE on Power Down with only a Small

A81L801

Abstract: 69LD
Contextual Info: A81L801 Stacked Multi-chip Package MCP 1 M X 8 Bit / 512K X 16 Bit Boot Sector Flash Memory and 128K x 8 Low Voltage CMOS SRAM Preliminary Document Title Stacked Multi-chip Package (MCP) 1M X 8 Bit / 512K X 16 Bit Boot Sector Flash Memory and 128K x 8 Low Voltage CMOS SRAM

Contextual Info: AK632128W/AK632128Z 128K x 32 SRAM MODULE ACCUTEK MICROCIRCUIT DESCRIPTION The Accutek AK632128 high density memory module is a static random access memory organized in 128K x 32 bit words. The assembly consists of four high speed 128K x 8 SRAMs in surface

32-PIN

Abstract: GVT73024UL8 GVT73024ULXX GVT73024ULXXB
Contextual Info: PRELIMINARY GALVANTECH, INC. ASYNCHRONOUS ULTRA LOW POWER FULL CMOS SRAM GVT73024UL8 ULTRA LOW POWER 128K X 8 SRAM 128K x 8 SRAM LOW POWER SUPPLY VOLTAGE LOW STANDBY CURRENT FEATURE GENERAL DESCRIPTION • • • The GVT73024UL8 is organized as a 131,072 x 8 SRAM

GVT72128A8

Abstract: GALVANTECH
Contextual Info: GALVANTECH, INC. ASYNCHRONOUS SRAM GVT72128A8 REVOLUTIONARY PINOUT 128K X 8 128K x 8 SRAM WITH SINGLE CHIP ENABLE REVOLUTIONARY PINOUT FEATURES GENERAL DESCRIPTION • • • • • • • • • • • The GVT72128A8 is organized as a 131,072 x 8 SRAM

GVT73128A8

Abstract: 73128A8
Contextual Info: GALVANTECH, INC. ASYNCHRONOUS SRAM GVT73128A8 REVOLUTIONARY PINOUT 128K X 8 128K x 8 SRAM +3.3V SUPPLY, SINGLE CHIP ENABLE REVOLUTIONARY PINOUT FEATURES GENERAL DESCRIPTIO N • • • • • • • • • • • The GVT73128A8 is organized as a 131,072 x 8 SRAM

Contextual Info: ADVANCE M T5LC 128K 8D 4 128K X 8 SR AM l^ llC R a iM 128K X 8 SRAM 3.3V OPERATION WITH SINGLE CHIP ENABLE FEATURES • High speed: 20 and 25ns • Multiple center power and ground pins for greater noise immunity • Easy memory expansion with CE and OE options

DP3S128X32Y5

Contextual Info: 4 Megabit 3.3 Volt High Speed SRAM DP3S128X32Y5 ADVANCED INFORMATION DESCRIPTION: The DP3S128X32Y5 is the 128K x 32 SRAM module the utilize the new and innovative space saving TSOP stacking technology. The module is constructed of four 128K x 8 SRAM’s that are configured as 128K x 32.

GALVANTECH

Abstract: GVT72024A8
Contextual Info: GALVANTECH, INC. GVT72024A8 TRADITIONAL PINOUT 128K X 8 SRAM ASYNCHRONOUS SRAM 128K x 8 SRAM WITH TWO CHIP ENABLE TRADITIONAL PINOUT FEATURES GENERAL DESCRIPTIO N • • • • • • • • The GVT72024A8 is organized as a 131,072 x 8 SRAM using a four-transistor memory cell with a high performance,

Contextual Info: 33C108 1 Megabit 128K x 8-Bit CMOS SRAM 33C108 Memory Logic Diagram FEATURES: DESCRIPTION: • RAD-PAK Technology radiation-hardened against natural space radiation • 128K x 8 bit organization • Total dose hardness: - > 100 krad (Si), depending upon space mission

Contextual Info: 128K x 8 3.3V SYNCHRONOUS SRAM WITH ZBT AND PIPELINED OUTPUT PRELIMINARY IDT71V508 Integrated Device Technology, Inc. FEATURES: • • • • • • • 128K x 8 memory configuration High speed - 100 MHz 5 ns Clock-to-Data Access Registered Output

Contextual Info: LP62S1024B-T Series Preliminary 128K X 8 BIT LOW VOLTAGE CMOS SRAM Document Title 128K X 8 BIT LOW VOLTAGE CMOS SRAM Revision History Rev. No. 0.0 PRELIMINARY History Issue Date Remark Initial issue February 19, 2002 Preliminary February, 2002, Version 0.0

saa 1291

Abstract: CY7C008 CY7C009 CY7C018 CY7C019 IDT7008
Contextual Info: iJë- CY7C008/009 CY7C018/019 : CYPRESS PRELIMINARY 64K/128K x 8/9 Dual-Port Static RAM Features True Dual-Ported memory cells which allow sim ulta­ neous access of the same memory location 64K x 8 organization CY7C008 128K x 8 organization (CY7C009) 64K x 9 organization (CY7C018)

Contextual Info: 128K x 8 3.3V SYNCHRONOUS SRAM LATE WRITE WITH ZBT AND PIPELINED OUTPUT PRELIMINARY IDT71V508 Integrated Device Technology, Inc. FEATURES: • • • • • • • 128K x 8 memory configuration High speed -100 MHz 5 ns Clock-to-Data Access Registered Output

A6173081

Abstract: A6173081S-12 A6173081S-15 A6173081SW-12 A6173081SW-15
Contextual Info: A6173081 Series Preliminary 128K X 8 BIT HIGH SPEED CMOS SRAM Document Title 128K X 8 BIT HIGH SPEED CMOS SRAM Revision History Rev. No. 0.0 PRELIMINARY History Issue Date Remark Initial issue July 14, 2000 Preliminary July, 2000, Version 0.0 AMIC Technology, Inc.

A67L73361

Abstract: A67L83181
Contextual Info: A67L83181/A67L73361 Preliminary 256K X 18, 128K X 36 LVTTL, Flow-through ZeBLTM SRAM Document Title 256K X 18, 128K X 36 LVTTL, Flow-through ZeBLTM SRAM Revision History Rev. No. 0.0 PRELIMINARY History Issue Date Remark Initial issue July 8, 2005 Preliminary

LP621024EM-70LL

Abstract: LP621024EM-I
Contextual Info: LP621024E-I Series 128K X 8 BIT CMOS SRAM Document Title 128K X 8 BIT CMOS SRAM Revision History History Issue Date Remark 0.0 Initial issue January 14, 2008 Preliminary 1.0 Final version release September 21, 2010 Final Rev. No. September, 2010, Version 1.0

LP621024D-55LLI

Abstract: LP621024D-70LLI LP621024D-I LP621024DM-55LLI LP62S1024D
Contextual Info: LP621024D-I Series Preliminary 128K X 8 BIT CMOS SRAM Document Title 128K X 8 BIT CMOS SRAM Revision History Rev. No. 0.0 PRELIMINARY History Issue Date Remark Initial issue August 9, 2002 Preliminary August, 2002, Version 0.0 1 AMIC Technology, Inc. LP621024D-I Series

8128 static ram

Contextual Info: 128K x 8 Static RAM MSM8128B - 020 Issue 1.0 June 1999 Description Block Diagram The MSM8128B is a 128K x 8 SRAM monolithic device available in CSP Chip Size Package with access times of 20ns. The device is available to commercial and industrial temperature grades.