125JIS Search Results

Contextual Info: «HYUNDAI H Y 5 1 1 7 1 O O A S e r ie s 1 6 M x 1 - b it CM O S DRAM DESCRIPTION The HY5117100A is the new generation and fast dynamic RAM organized 16,777,216 x 1-bit. The HY5117100A utilizes Hyundai's CMOS silicon gate process technology as well as advanced circuit techniques to provide wide

KM44C1003C

Abstract: km44c1003cj 71411-4
Contextual Info: KM44C1003C CMOS DRAM 1 M x 4 B i t CMOS Quad CAS DRAM with Fast Page Mode DESCRIPTION T his is a fa m ily of 1,048,576 x 4 bit Fast Page M ode Q uad C A S C M O S DRAM s. Fast P age M ode offers high s p e e d random access of m em ory ce lls w ithin the sam e row. A cce ss tim e -5 , -6, -7 o r -8 , p o w e r

Contextual Info: HM5118160BI Series 1048576-word x 16-bit Dynamic Random Access Memory HITACHI ADE-203-580A Z Rev. 1.0 May. 20, 1996 Description T he H itachi H M 5118160B I is a C M O S dynam ic R A M organized as 1,048,576-w ord x 16-bit. It em ploys the m ost advanced C M O S technology fo r high perform ance and low pow er. T he H M 5118160B I offers

dram 88 pin

Contextual Info: MICRON TECHNOLOGY INC 55E D MICRON I • blllS4T 0DGSDb3 3T0 ■ MRN MT12D88C25636 256K x 36, 512K x 18 IC DRAM CARD - " T

Contextual Info: PRELIMINARY .ü ïïi04,0^ !? -j, MEG x 4 DRAM « ch«oL„ „ « DRAM 1 MEG x 4 DRAM FEATURES * * » * «• Single +5V ±10% power supply JEDEC-standard pinout and packages High-perform ance CMOS silicon-gate process All inputs, outputs and clocks are TTL-com patible

Contextual Info: MT10D25640 256K X 40 DRAM MODULE |U |IC = R O N 256K x 40 DRAM FAST PAGE MODE MT10D25640 LOW POWER, EXTENDED REFRESH (MT10D25640 L) FEATURES • • • • • • • • • PIN ASSIGNMENT (Top View) 72-pin single-in-line package High-performance, CMOS silicon-gate process.

Contextual Info: KMM332F204AT-L KMM332F224AT -L DRAM MODULE KMM332F204AT-L / KMM332F224AT-L Fast Page with EDOMode 2Mx32 DRAM DIMM, Low Pow er, 4K & 1K Refresh, 3.3V G EN ERA L FEATURES DESCRIPTIO N The Samsung KMM332F20 2 4AT is a 2M bit x 32 Dynamic RAM high density memory module. The

16C5S

Abstract: 16C7S
Contextual Info: ADVANCE MT4 L C1 M 16C3/5/6/7 S 1 MEG X 16 W IDE DRAM I^ IIC R C D N WIDE DRAM 1 MEG 16 DRAM X 5.0V SELF REFRESH (MT4C1M16C3/5/6/7 S) 3.0/3.3V, SELF REFRESH (MT4LC1M16C3/5/6/7 S) FEATURES PIN ASSIGNMENT (Top View) OPTIONS • Timing 60ns access 70ns access

m62x42

Abstract: OKI M62X42B M62X42B 400P Crystal STDP MSM62X42BX
Contextual Info: O K I Sem iconductor MSM62X42B REAL TIM E CLOCK 1C W ITH B U ILT-IN CRYSTAL DESCRIPTION The MSM62X42B is a bus-connection Micro* com puter peripheral IC of a Real Tim e Clock w ith built-in crystal in the p erpetual calendar w hich can be read and w ritten from a second

Contextual Info: P a n a Y S e r i e s TheOnetöWatchfor Constant Innovation-Making theFuture ComeAlive M IC R O C O M P U TE R M N101 COO MN101C23A/23C/23D/35A/ 35C/35D LSI User’s Manual Pub. No.21435-01OE Panasonic PanaXSeries is a trademark of Matsushita Electric Industrial Co., Ltd.

Contextual Info: KM416C256B, KM416V256B CMOS DRAM 256K x 16 Bit CMOS Dynamic RAM with Fast Page Mode DESCRIPTION This is a family of 262,144 x 16 bit Fast Page Mode CMOS DRAMs. Fast Page Mode offers high speed random access of memory cells within the same row. Power supply voltage +5.0V or +3.3V , access time

Contextual Info: <- Am79C31 A/312 A a Digital Exchange Controller DEC /Digital Transceiver Controller (DTC) PRELIM IN ARY > 3 DISTINCTIVE CHARACTERISTICS Digital access to the ISDN Compatible with CCITT l-Series recommenda­ tions at ‘S’ a n d ‘T’ reference points

Contextual Info: •HYUNDAI HYM532210A E-Series 2M X 32-bit CMOS DRAM MODULE DESCRIPTION The HYM53221OA is a 2M x 32-bit Fast Rage mode CMOS ORAM module consisting of four HY5117800B In 28/28 pin SOJ or TSOPII on a 72 pin glass-epoxy printed circuit board. 0.22^F decoupling capacitor is mounted for

Contextual Info: MICRON 4 MEG X MT9D49 9 DRAM MODULE 4FAST MEG x 9 DRAM PAGE MODE (MT9D49 □PAM . _ MODULE m V U U L L . _ _ ^ LOW POWER, EXTEDEND REFRESH (MT9D49 L) FEATURES PIN ASSIGNMENT (Top View) OPTIONS o Vcc CAS DQ1 A0 A1 DQ2 A2 A3 Vss DQ3 A4 A5 DQ4 A6 A7 DQ5 A8

rt6164

Abstract: 1PXF transformer
Contextual Info: XR-T61 66 C'EXAR [.the a n a lo g plu s Codirectional Digital Data Processor com pan y J M June 1997-3 APPLICATIONS FEATURES • Low Power CMOS Technology • • All Receiver and Transmitter Inputs and Outputs are TTL Compatible CCITT G.703 Interface •

Contextual Info: NOV 2 1 199» n Preliminary Am79C30A Advanced Micro Devices Digital Subscriber Controller DSC DISTINCTIVE CHARACTERISTICS • Combines CCITT 1.430 S/T Interface Trans­ ceiver, D-channel LAPD Processor, Audio Processor (DSC only), and IOM-2 Interface

Contextual Info: ADVANCE M IC m n N 1 MT8LD T 132(X)(S), M T16LD(T)232(X)(S) 1 MEG, 2 MEG X 32 DRAM M ODULES DRAM 1 m e g , 2 MEG x 32 4, 8 MEGABYTE, 3.3V, OPTIONAL SELF M O D U L E m o d e ESH’ FAST PAGE ° R ED° PAGE FEATURES PIN ASSIGNMENT (Front View) OPTIONS Timing

Contextual Info: ACE9050 MITEL System Controller and Data Modem S E M IC O N D U C T O R Advance Information Supersedes January edition, DS4290 - 2.3 The ACE9050 provides the control and interface functions needed for AMPS or TACS analog cellular handsets. The device has been designed using Mitel Semiconductor sub­

S191 marking

Contextual Info: PMC-Sierra, Inc. S ta n d a rd P r o d u c t I I / 1 ^ ^ ISSUE 7 PM 6341 E 1X C E1 FRAMER/TRANSCEIVER P M 6341 E1 XC E1 FRAMER/TRANSCEIVER Is s u e 7: F e b r u a r y , 1996 PMC-Sierra, Inc. 8501 Commerce Court, Burnaby, BC Canada V5A 4N3 604 668 7300 S ta n d a rd P r o d u c t

Contextual Info: MICRON SEMICONDUCTOR INC M b3E J> b i l l 5 4 ‘i DDQÔ3Q3 3 4 0 • u r n ADVANCE MT16D88C232VH 2 MEG x 32, 4 MEG x 16 IC DRAM CARD IC R O N IC DRAM CARD 8 MEGABYTES 2 MEG x 32, 4 MEG x 16 FEATURES • • • • PIN ASSIGNMENT End View 88-Pin Card (DF-2)

Contextual Info: GEC P L E S S E Y I S E M I C O N D U C T O R S~| DS3163-1.0 Supersedes C1080FDS Issue 2 MA8112 DIGITAL SWITCH MODULE DSM DIO [ 1 26 ] FSP1 DH [ 2 27 ] VdO 26 ] cuc DB [ 3 DO [ 4 25 ] Ct1 DI4 [ 5

MT4C1024DJ-7

Contextual Info: MT4C1024 L 1 MEG X 1 DRAM MICRON • SEMICONDUCTOR. iHC 1 MEG x 1 DRAM DRAM STANDARD OR LOW POWER, EXTENDED REFRESH FEATURES • 512-cycle refresh in 8ms (MT4C1024) or 64ms (MT4C1024 L) • Industry-standard x l pinout, timing, functions and packages • High-performance CMOS silicon-gate process

116404B

Abstract: HY5117404BT
Contextual Info: - H Y U N D A I • HY5117404B,H Y5116404B 4Mx4, Extended Data Out mode DESCRIPTION This fam ily is a 16M bit dynamic RAM organized 4,194,304 x 4-bit configuration with Extended Data Out mode CMOS DRAMs. Extended data out mode is a kind of page mode which is useful for the read operation. The circuit and process

514260C

Abstract: 514260 MSM514260
Contextual Info: O ld Semiconductor MSM5 14260C/CSL E 2 G 0 0 2 6 -1 7 -4 1 262,144-Word x 16-Bit DYN A M IC RA M : FAST PAG E M O D E TYPE DESCRIPTION The MSM514260C/CSL is a 262,144-word x 16-bit dynamic RAM fabricated in Oki's silicon-gate CMOS technology. The MSM514260C/CSL achieves high integration, high-speed operation, and