125FIS Search Results

gm71c4400b

Contextual Info: GM71C4400B/BL GoldStar 1,048,576 WORDS x 4 BIT GOLDSTAR ELECTRON CO., LTD. CMOS DYNAMIC RAM Description Features • • • • T h e G M 7 1 C 4 4 0 0 B /B L is t h e n e w g e n e r a t i o n d y ­ n a m ic RAM o rg a n iz e d 1 ,0 4 8 ,5 7 6 x 4 G M 7 1 C 4 4 0 0 B /B L h a s r e a l iz e d

KM41C4000A

Contextual Info: S A M S UN G E L E C T R O N I C S INC tME ]> • 7 T b M : m 2 D G 1 M 5 0 4 flOO ■ Sn6K KMM584020A DRAM MODULES 4M X 8 CMOS DRAM SIMM Memory Module, Low Power FEATURES GENERAL DESCRIPTION • Performance range: The Samsung KMM584020A is a 4M bit x 8 Dynamic

Contextual Info: KM416V1004BJ CMOS DRAM ELECTR ONICS 1M x16Bit CMOS Dynamic RAM with Extended Data Out DESCRIPTION This is a family of 1,048,576 x16 bit Extended Data Out CMOS DRAMs. Dxtended Data Out mode offers high speed random access of memory cells within the same row, so called Hyper Page Mode. Power

DECT/DSP GROUP

Abstract: AN 7274
Contextual Info: SIEM ENS ICs for Communications 4 Channel ADPCM Controller Quad ADPCM PEB7274 Version 1.2 PEF 7274 Version 1.2 Data Sheet 08.97 DS 1 PEB 7274 Revision History: Current Version: 08.97 Previous Version: Preliminary Data Sheet 01.97 Page in previous Version

COUNTER MODULO 503

Abstract: TBA 1205 TBA 281 lcd wz AM2085 TBA 651 eaw t200 T200 BCX1 microprocessor architecture
Contextual Info: Cl Preliminary Am2085 ISDN Subscriber Access Controller ISAC-S Advanced Micro Devices DISTINCTIVE CHARACTERISTICS S-Bus transceiver according to CCITT i.430 Recovery of clock and frame Frame alignment for trunk line termination Access to Echo bit Serial interfaces for various types of B-channel

Contextual Info: KM416C1000B, KM416C1200B KM416V1000B, KM416V1200B Preliminary CMOS DRAM 1Mx16 Bi t CMOS Dynamic RAM with Fast Page Mode DESCRIPTION This is a family of 1,048,576 x16 bit Fast Page Mode CM O S DRAMs. Fast Page Mode offers high speed random access of memory cells within the same row. Power supply voltage +5.0V or +3.3V , refresh

Contextual Info: HYUNDAI HY 514400 B S eries 1Mx4-bit CMOS DRAM PRELIMINARY DESCRIPTION The HY514400B is the new generation and fast dynamic RAM organized 1,048,576 x 4-bit. "Hie HY514400B utilizes Hyundai’s CMOS silicon gate process technology as well as advanced circuit techniques to provide wide operating

NG9-2

Contextual Info: KM41C4000AL CMOS DRAM 4 M X 1 Bit CMOS Dynamic RAM with Fast Page Mode FEATURES GENERAL DESCRIPTION • Perform ance range: The Samsung K M 41C 4000A L is a high speed CMOS 4 ,1 9 4 ,3 0 4 bit X 1 Dynamic Random Access Memory. Its design is optimized for high performance applications

Contextual Info: MICRON S E M I C O N D U C T O R INC M IC R O N OO Ü Û Q 4 4 11G b3E D 2 MEG X IMRN MT16D(T 232 32, 4 MEG x 16 DRAM MODULE 2 MEG X 32, 4 MEG X 16 DRAM MODULE FAST-PAGE-MODE (MT16D(T)232) LOW POWER, EXTENDED REFRESH (MT16D(T)232 L) FEATURES PIN ASSIGNMENT (Top View)

gm71c4400az

Contextual Info: T sg r GM71C4400A/AL G oldStar 1,048,576 WORDS x 4 BIT CMOS DYNAMIC RAM GOLDSTAR ELECTRON CO., LTD. Description Features The GM71C4400A/AL is the new generation dy­ nam ic RAM organized 1 ,0 4 8 ,5 7 6 x 4 Bit. GM71C4400A/AL has realized higher density, higher performance and various functions by uti­

Contextual Info: KM48V2104A/AL/ALL/ASL CMOS DRAM 2M x 8 Bit CMOS Dynamic RAM with Extended Data Out FEATURES GENERAL DESCRIPTION • Performance range: The S am sung K M 48 V 2 104 A /A L/A LL /A S L is a high spe ed C M O S 2,0 9 7 ,1 5 2 b i t x 8 D ynam ic R andom A cce ss M em ory. Its d e sig n is o p tim iz e d fo r high

XRT6165ID

Abstract: se819 TX2M
Contextual Info: XR- T61 65 X T E X A R [.th e a n a lo g p lu s c o m p a n y Codirectional Digital Data Processor TM May 1997-3 FEATURES APPLICATIONS • Low Power CMOS Technology • • All Receiver and Transmitter Inputs and Outputs are TTL Compatible CCITT G.703 Compliant 64kbps Codirectional

G732

Abstract: MA811 Marconi radiation hard
Contextual Info: MARCONI CKT TECHNOLOGY 3GE D • S7Ô3442 0001520 5 ■ 7^75'"'// ' 3 3 Digital Switch Module M @ ïc s a i Electronic Devices FEATURES MA811 DIO [7 DI1 DI2 2| FSP1 [2 27] VDD [3 26] CLK 2| CI1 * Single 5v supply DI3 [4 * Low power CMOS design DI4 [5 ¡3

Contextual Info: 1 M E G x 16 EDO DRAM V IIC Z R O N n P A V n * M M T4C 1M 16E 5 \ m M T4L C 1M 16E 5 FEATURES • JEDEC- and industry-standard x l6 tim ing, functions, pinouts and packages • High-perform ance CM OS silicon-gate process • Single pow er supply (+3.3V +0.3V or 5V ±10%

Contextual Info: /= T SCS "THOMSON * 7 1 » [H D ^ Q [l[L [l(ê ¥ ^ (Q )R I]D (g i M 3 4 8 8 256 x 256 DIGITAL SWITCHING MATRIX P R E L IM IN A R Y D ATA • 256 INPUT AN D 256 O U TP U T C H AN N E L CM O S D IG ITA L SW ITC HING M ATR IX C O M ­ PATIBLE W ITH M 088

Contextual Info: MICRON 1 MEG DRAM MODULE 1 MEG X X MT9D19 9 DRAM MODULE 9 DRAM FAST PAGE MODE MT9D19 LOW POWER, EXTENDED REFRESH (MT9D19 L) FEATURES • Industry standard pinout in a 30-pin single-in-line package • High-performance, CMOS silicon-gate process • Single 5V ±10% power supply

80C49H

Abstract: 4275a5 PD80C49H p21213 P0350
Contextual Info: N E C % fW ELECTRONICS I NC Tñ bM27SaS 0 0 1 3 5 3 b ¿ 2 6427525 N E C ELECTRO N ICS . D escription . The fiPD80C39H, f PD80C49H, and /jPD49H are singlechip, 8 -bit microcomputers containing an 8 -bit CPU, ROM (80C49H and 49H , RAM, I/O ports, and control cir­

INTEL 8042

Abstract: MBL8042 MBL8243 J055 gdu4 jf1addr xchd
Contextual Info: FUJITSU MICROELECTRONICS =17 D E 37>H7fc.2 1 J^T-52-33-/5‘ FU JITSU Advanced Products October 1986 Edition 2.0 M BL8042H /N NMOS Universal Peripheral Interface 8-Bit Microcomputer Description The MBL8042 Universal Peripheral Interface is a slngle-chip 8 -bit