120KN Search Results
120KN Price and Stock
TE Connectivity EFN31-20KN-S00001FN3130-20KN |
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Pulse Electronics Corporation CL160808T-120K-NRF Signal Inductors |
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Bourns Inc PEC11R-4120K-N0018Incremental encoder 5 V impulses 18 PEC11R-4120K-N0018 |
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PEC11R-4120K-N0018 | Tray | 14 Weeks | 900 |
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Bourns Inc PEC11L-4120K-N0020Incremental encoder 5 V impulses 20 PEC11L-4120K-N0020 |
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Amphenol Corporation M85049/111-20KN09-6- Bulk (Alt: A8504911120KN096) |
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M85049/111-20KN09-6 | Bulk | 12 Weeks | 25 |
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120KN Datasheets Context Search
| Catalog Datasheet | Type | Document Tags | |
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Contextual Info: 5 % Resistor Assortment Kit 100 V alu es Features: • 3 Storage Systems • • • • E 24 Values Ohm on l.on 4.70 ion i2n isn isn 2on Excellent For Labs Design In & Prototype Replaceable When Empty Optional Drawer Set Ohm 75n 82n loon i2on ison ison 2oon |
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120kn390kn470kn510kn+5 | |
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Contextual Info: ESMT M13S128168A Operation temperature condition -40°C~85°C Revision History Revision 1.0 03 Jan. 2007 - Original Revision 1.1 (19 Mar. 2008) - Add BGA package - Modify the waveform of Power up & Initialization Sequence - Modify the θ value of TSOPII package dimension |
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m13s128168a | |
melody IC
Abstract: 8 sound effects generator IC 16-DIP HT2887 8050 s cmos sound generator d 9329 TOY SOUND sound effects chip SK 8050 S
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ht2887128-note256-note128khz+10 | |
M13S32321AContextual Info: ESMT M13S32321A DDR SDRAM 256K x 32 Bit x 4 Banks Double Data Rate SDRAM Features z JEDEC Standard z Internal pipelined double-data-rate architecture, two data access per clock cycle z Bi-directional data strobe DQS z On-chip DLL z Differential clock inputs (CLK and CLK ) |
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m13s32321a | |
2x lines of 5X7 dots matrix of charactersContextual Info: O K I Semiconductor MSM6562B-XX DOT MATRIX LCD CONTROLLER WITH 16 DOT COMMON DRIVER AND 100 DOT SEGMENT DRIVER G EN ERAL DESCRIPTION T he MSM6562B-xx controls a character type dot m atrix L C D in com bination w ith an 8-bit or 4bit m icrocontroller. T h e MSM6562B-xx can control a d isp lay of up to 40 characters. W it h the d isp lay data serial |
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msm6562b-xx2x lines of 5x7 dots matrix of characters | |
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Contextual Info: ESMT M13S128168A Revision History Revision 0.1 15 Jan. 2002 - Original Revision 0.2 (19 Nov. 2002) -changed ordering information & DC/AC characteristics Revision 0.1 Revision 0.2 M13S128168A - 5T M13S128168A - 6T M13S128168A - 6T M13S128168A - 7.5AB Revision 0.3 (8 Aug. 2003) |
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m13s128168a | |
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Contextual Info: ESMT M13S128168A Revision History Revision 0.1 15 Jan. 2002 - Original Revision 0.2 (19 Nov. 2002) -changed ordering information & DC/AC characteristics Revision 0.1 Revision 0.2 M13S128168A - 5T M13S128168A - 6T M13S128168A - 6T M13S128168A - 7.5AB Revision 0.3 (8 Aug. 2003) |
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m13s128168a | |
DDR266Contextual Info: Memory Module Specification KVR266X72C2/256 CL2 DDR266 SDRAM 184-Pin ECC Dual In-Line Memory Module DIMM DESCRIPTION: This document describes ValueRAM's 32M x 72-bit (256MB), CAS Latency 2 (CL2) SDRAM (Synchronous DRAM) DDR266 ECC memory module. The components on this |
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kvr266x72c2/256ddr266184-pin72-bit+2 | |
M1C2951
Abstract: M10295 MIC295103BN
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m1c2950-02/03m1c2951-01/02/03mic2950mic2951+8 | |
15VPH
Abstract: I-10K
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fx-107fx-207fx-307c-073+2 | |
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Contextual Info: ESMT M13S128168A Operation temperature condition -40°C~85°C Revision History Revision 1.0 03 Jan. 2007 - Original Elite Semiconductor Memory Technology Inc. Publication Date : Jan. 2007 Revision : 1.0 1/48 ESMT M13S128168A Operation temperature condition -40°C~85°C |
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m13s128168a | |
rc0510
Abstract: RC05 RC0910
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rc0508rc0510rc05rc0910 | |
M13S256328AContextual Info: ESMT M13S256328A DDR SDRAM 2M x 32 Bit x 4 Banks Double Data Rate SDRAM Features z JEDEC Standard z Internal pipelined double-data-rate architecture, two data access per clock cycle z Bi-directional data strobe DQS z On-chip DLL z Differential clock inputs (CLK and CLK ) |
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m13s256328a | |
M13S64164AContextual Info: ESMT Preliminary M13S64164A Revision History Revision 0.1 23 Oct. 2006 - Original Revision 0.2 (06 Jun. 2007) - Add BGA type spec Revision 0.3 (20 Jul. 2007) - Modify BGA assignment Elite Semiconductor Memory Technology Inc. Publication Date : Jul. 2007 |
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m13s64164a | |
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rgn354
Abstract: RGN2004 VCL11 Telefunken ecl11 ECL11 funkschau REN1004 RE074 ebl21 rgn 1064
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rgn354rgn2004vcl11telefunken ecl11+6 | |
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Contextual Info: About Lab Kits General: Engineers and designers find Lab Kits convenient and economical. Each Lab Kit contains a broad range of the most popular components. Assembly: Lab Kits are available on tape and reel for automated assembly on pick-andplace m achines or in bulk bags and |
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sm581940vtmsbt2222abt2907a+2 | |
rc0510Contextual Info: Leaded RF Chokes – RC Series RC Series Features l l l Product Identification Low cost Wide range of inductance High reliability Electrical Parameters RC0508£-1R0K-N 1.0 7.96 30 155 D.C Resistanc e Ω Max 0.186 RC0508£-1R2K-N 1.2 7.96 30 145 0.15 1670 |
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rc0508rc0510 | |
vr 0511 mb
Abstract: ic 4063 AM 4063 pin diagram of ic 4053 MB4063 A9708
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16-pin16-leaddip-16p-m01fpt-16p-m02i+6 | |
SL1016
Abstract: PBY160808T-201Y-N PBY160808T-600Y-N PBY160808T-601Y-N PBY100505T-121Y-N PBY160808T-110Y-N UPB321611T-151Y-N smd diode Lf PBY201209T-601Y-N PBY321611T-601Y-N
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iso-9001iso-14001sl1016pby160808t-201y-n+8 | |
PBY 386
Abstract: SL1016 PBY160808T-601Y-N LVS404018-3R3 PBY321611T-601Y-N PBY160808T-110Y-N NBQ160808T-241Y-N SBCB656030T-301-N PBY160808T-121Y-N UPB453215T-700Y-N
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bcc1307ri-302-nbcc1307ri-202-n15maxbcc1307ri-102-n+15 | |
LM321
Abstract: LM221 LM121A op amp LM321
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lm221/lm321lm221im1031lm321+2 | |
KVR266X64C2
Abstract: DDR266
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kvr266x64c2/256ddr266184-pin64-bit+4 | |
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Contextual Info: ESMT M13S128168A Revision History Revision 0.1 15 Jan. 2002 - Original Revision 0.2 (19 Nov. 2002) -changed ordering information & DC/AC characteristics Revision 0.1 Revision 0.2 M13S128168A - 5T M13S128168A - 6T M13S128168A - 6T M13S128168A - 7.5AB Revision 0.3 (8 Aug. 2003) |
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m13s128168a | |
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Contextual Info: ESMT M13S128168A DDR SDRAM 2M x 16 Bit x 4 Banks Double Data Rate SDRAM Features z JEDEC Standard z Internal pipelined double-data-rate architecture, two data access per clock cycle z Bi-directional data strobe DQS z On-chip DLL z Differential clock inputs (CLK and CLK ) |
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m13s128168a | |