0DD41 Search Results

Contextual Info: b q 2 0 1 0 BENCHMARQ Gas Gauge IC Features General Description >• Conservative and repeatable measurement of available charge in rechargeable batteries The bq2010 Gas Gauge IC is intended for battery-pack or in-system installa­ tion to maintain an accurate record of

TRANSISTOR BQ20

Contextual Info: bq2003 BENCHMARQ Fast Charge 1C Features General Description >• Fast charge and conditioning of nickel cadmium or nickel-metal hydride batteries The bq2003 Fast Charge IC provides com prehensive fast charge control functions together w ith high-speed switching power control circuitry on a

8086 block transfer program

Abstract: YTD418 microprocessor 8086 block diagram
Contextual Info: Y A M A H A ' i . S i Y TD 418 APPLICATION MANUAL ID N PH S User Network Interface for ISDN Basic Access YAMAHA •I DDD4GÖ4 115 H YTD418 APPLICATION MANUAL C ATA LO G No. : LSI-6TD418A3 1996.12 r 'N IMPORTANT NOTICE 1. Yamaha reserves the right to make changes to its Products and to this document

Contextual Info: W ML DC/DC CONVERTER CONTROLLER RV5VH SERIES OUTLINE T he RV5VH series are dual output CMOS DC/DC converter ICs integrating Step-up and inverting DC/DC converters. T he RV5VH3XX series ICs consist of an oscillator, two VFM control circuits, control transistors EXT switches , a phase

marking m12 sot23

Abstract: M098 M05 SOT-23 SOT-23 marking code BS
Contextual Info: SM05 is D ^ J lT H C ^ K ] 300 Watt Surface Mount TVS Diode SM36 TEL: 805-498-2111 DESCRIPTION FEATURES: The SM series of transient voltage suppressors are designed to protect components which are connected to data and transmission lines from over voltages caused

Contextual Info: L O G I C L 7 C 1 9 4 / 1 9 5 64K x 4 Static RAM DEVICES INCORPORATED FEATURES DESCRIPTION □ 64K x 4 Static RAM with Common I/O □ Auto-Powerdown Design □ Advanced CMOS Technology □ High Speed — to 15 ns maximum □ Low Power Operation Active: 210 mW typical at 35 ns

Contextual Info: Lattice G A L 2 2 L V 1 0 Low Voltage E2CMOS PLD Generic Array Logic I Semiconductor I Corporation FUNCTIONAL BLOCK DIAGRAM FEATURES • HIGH PERFORMANCE E2CMOS TECHNOLOGY — 4 ns Maxim um Propagation Delay — Fmax = 250 MHz — 3 ns Maxim um from Clock Input to Data O utput

80386

Abstract: 80386 microprocessor pin out diagram 95A 640 BTP 10/100 CL-CD1400 SCD12 SCD34 CL-CD14002 CLD140 cd 3313 eo
Contextual Info: CIRRUS L06IC INC blE T> BlBhtaT Ü004Gfl7 LOT * C I R CL-CD1400 'CIRRUS LOGIC D ata Sheet 7 ^ 7 5 ' 3 7-0! FEATURES Asynchronous Features Software-programmable serial data rates up to 135 kbits/sec. full-duplex1 Twelve bytes of FIFO for each transmitter and

Contextual Info: S P E C I F I C A TI O N DEVICE NAME : _ | Q B T TYPE NAME : SPEC. No. : M S 5 F 3 5 0 5 DATE : Jun.-25-1996 IMBC1OD-Ofifl F u j i »» iû \ DATE IN A M E APPROVED I - DRAWN ö u h . ' z S ' % I / a u u jc o i Co. Ltd. io c n a n g e w t i n o u t

Contextual Info: L4M Device Level 4 Mapper TXC-03456 DATA SHEET Preliminary . = • Maps an asynchronous 139.264 Mbit/s tributary into an AU-4/VC-4 STS-3c/SPE. • Nibble or byte 139.264 Mbit/s line interface - G.751 receive and transmit performance

u236

Abstract: K2154 KA2154
Contextual Info: SAMSUNG SE MICO ND UC TO R INC Tfl DE • T T m i M S 0D041ti7 1 T - - in * o i- o q KA2154 LINEAR INTEGRATED CIRCUIT VIDEO-CHROMA-DEFLECTION SYSTEM FOR A COLOR TELEVISION PAL/NTSC The KA2154 combines a PAL/NTSC video-chroma subsystem and a deflection combination on a single monolithic integrated circuit to

WD33C93

Abstract: western digital scsi bus interface controller
Contextual Info: WESTERN DIGITAL CORP 77 D e J T 7 1 Ö 2 S Ö 0D0411D 0 | 9718228 WESTERN DIGITÄL CORP WESTERN O R O 77C 0 4 1 1 0 D T'S2-3 3-ò 3 R DIGITAL A T I O N WD33C92 And WD33C93 SCSI-Bus Interface Controller DOCUMENT SCOPE This document describes both the WD33C92-SBIC and

Contextual Info: Integrated Circuit Systems, Inc. ICS9148-11 Frequency Generator & Integrated Buffers for PENTIUM General Description Features Generates four processor, six bus, one 14.31818MHzand 12 SDRAM clocks. Synchronous clocks skew matched to 250ps window on CPU, SDRAM and 500ps window on BUS clocks.

Contextual Info: September 1990 Micro Linear ML1825 High Frequency Power Supply Controller GENERAL DESCRIPTION The ML1825 High Frequency PWM Controller is an IC controller optimized for use in Switch Mode Power Supply designs running at frequencies to 1MHz. Propagation delays are minimal through the

TCA 365

Abstract: PCM30 PDH system 178 08T Bipolar IC For Switching Power Supply Contro c22e LOF atm PMC saturn 78P7200 PCM30 PM4341 PM6341
Contextual Info: S tandardProduct I I / IV — PMC-Sierra, Inc. ISSUE 5 PM7345 S/UNI-PDH SATURN User Network Interface forPDH FEATURES Implements the ATM Direct Cell Mapping into DS1, DS3, E1, E3 transmission systems according to ITU-T Draft Recommendation G.804. Implements the Physical Layer Convergence Protocol PLCP for DS1 and DS3

Contextual Info: GD54/74LS05 HEX INVERTERS WITH OPEN-COLLECTOR OUTPUTS Description This device contains six idenpendent inverts. It performs the Boolean function Y = A. The open col­ lector outputs require pull-up resistor to perform cor­ rectly. Open-collector devices are often used to

LM317T vw

Abstract: A1015 equivalent LCD 16X4 mc68000 S-MOS SYSTEMS INC seD1352 MC68000 schematics
Contextual Info: S-MOS S Y S T E M S A Seiko Epson Affiliate SED1352F0B Dot Matrix Graphics LCD Controller SED1352F0B TECHNICAL MANUAL Issue Date: 06/03/96 Copyright 1996 S-MOS Systems Inc. All rights reserved. This document, and any text derived, extracted or transmitted from it, is the sole property of S-MOS Systems Inc. and may not be used, copied,

LT1014N

Contextual Info: L IN E A R TECHNOLOGY CORP / V LintAB EOE D SSlûMhô DOOMGil r- 7 / - g ? T • LTC 1043 TECHNOLOGY d UQ| Precision Instrumentation Switched-Capacitor Building Block K A TU ftC S DCSCRIPTIOn ■Instrumentation Front End with 120dB CMRR ■Precise, Charge-Balanced Switching

pot core 3C8 3019

Abstract: Ferroxcube Ferrite 3c8 ferroxcube 3c8 material
Contextual Info: July 1992 PRELIMINARY Micro Linear ML4813 Flyback Power Factor Controller GENERAL DESCRIPTION FEATURES The ML4813 is designed to optimally facilitate a discontinuous “flyback" or "buck-boost" type power factor correction system for low power, low cost applications. Special care has been taken in the design

Contextual Info: S TANDARD PRODUCT PM PM C -Sierra, Inc. ISSUES PM7345 S/UNI-PDH SATURN User Network Interface forPDH FEA T URES • Implements the ATM Direct Cell Mapping into DS1, DS3, E1, E3 transmission systems according to ITU-T Draft Recommendation G.804. • Implements the Physical Layer Convergence Protocol PLCP for DS1 and DS3

al897

Contextual Info: 17E D • bbSBIEÖ 0004113 PHILIPS E C G INC ECG1129 TV VERTICAL DEFLECTION SYSTEM semiconductors • TV Vertical Deflection System Function • Oscillator • W ave Shaper • Differential Amplifier • Driving Amplifier • Switching Am plifier • Output Amplifier (SEPP)

ECG1148

Abstract: vn1040
Contextual Info: PHILIPS E C G INC 17E $ • k,b53TSfi DOOMlbb 5 T - 7 4 -0 5 -0 1 E C G 1 1 4 8 AF POWER AMPLIFIER SPLIT POWER SUPPLY semiconductors (Unit i mm) EQUIVALENT CIRCUIT OUTPUT POWER! 50 Watts Typical (RL = 4 Ohm) 35 Watts Typical (R[, = 8 Ohm) OPERATION CHARACTERISTICS/Ta = 25°C, V c c = ±27 V , Rg = 600 Ohm,

Contextual Info: IB M 11T 1645LP 1 M x 64 144 PIN SO D IM M Features • 144 Pin JEDEC Standard, 8 Byte Small Outline Dual In-line Memory Module with 8 Byte busses • 1Mx64 Extended Data Out SO DIMM • Performance: j Wc ! RAS Access Time S60ns fcAC tAA ! CAS Access Time

Contextual Info: Integrated Circuit Systems, Inc. ICS9150-11 Pentium Pro and SDRAM Frequency Generator Features General Description Generates five processor, six bus, one 14.31818MHz and 16 SDRAM clocks. Synchronous clocks skew matched to 250 ps window on PCLKs and 500ps window on BCLKs